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riscv-gcc-1
Commit e2c734c1 by J"orn Rennecke Committed by Joern Rennecke
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* sh.h (OVERRIDE_OPTIONS): Allow first scheduling pass for SH5. 

From-SVN: r61118
parent fc182093
Showing with 11 additions and 4 deletions
gcc/ChangeLog
Thu Jan 9 17:23:19 2003 J"orn Rennecke <joern.rennecke@superh.com>
* sh.h (OVERRIDE_OPTIONS): Allow first scheduling pass for SH5.
2003-01-09 Kazu Hirata <kazu@cs.umass.edu> 2003-01-09 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (*extzv_1_r_h8300): Correct the insn * config/h8300/h8300.md (*extzv_1_r_h8300): Correct the insn
......
gcc/config/sh/sh.h
...@@ -470,10 +470,13 @@ do { \ ...@@ -470,10 +470,13 @@ do { \
if (flag_pic && ! TARGET_PREFERGOT) \ if (flag_pic && ! TARGET_PREFERGOT) \
flag_no_function_cse = 1; \ flag_no_function_cse = 1; \
\ \
/* Never run scheduling before reload, since that can \ if (SMALL_REGISTER_CLASSES) \
break global alloc, and generates slower code anyway due \ { \
to the pressure on R0. */ \ /* Never run scheduling before reload, since that can \
flag_schedule_insns = 0; \ break global alloc, and generates slower code anyway due \
to the pressure on R0. */ \
flag_schedule_insns = 0; \
} \
\ \
/* Allocation boundary (in *bytes*) for the code of a function. \ /* Allocation boundary (in *bytes*) for the code of a function. \
SH1: 32 bit alignment is faster, because instructions are always \ SH1: 32 bit alignment is faster, because instructions are always \
......
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