Commit e1fab8ba by Oleg Endo

sh-common.c: Remove SH5 support.

gcc/
	* common/config/sh/sh-common.c: Remove SH5 support.
	* config/sh/constraints.md: Likewise.
	* config/sh/config/sh/elf.h: Likewise.
	* config/sh/linux.h: Likewise.
	* config/sh/netbsd-elf.h: Likewise.
	* config/sh/predicates.md: Likewise.
	* config/sh/sh-c.c: Likewise.
	* config/sh/sh-protos.h: Likewise.
	* config/sh/sh.c: Likewise.
	* config/sh/sh.h: Likewise.
	* config/sh/sh.md: Likewise.
	* config/sh/sh.opt: Likewise.
	* config/sh/sync.md: Likewise.
	* config/sh/sh64.h: Delete.
	* config/sh/shmedia.h: Likewise.
	* config/sh/shmedia.md: Likewise.
	* config/sh/sshmedia.h: Likewise.
	* config/sh/t-netbsd-sh5-64: Likewise.
	* config/sh/t-sh64: Likewise.
	* config/sh/ushmedia.h: Likewise.

From-SVN: r235544
parent 50e017d0
2016-04-28 Oleg Endo <olegendo@gcc.gnu.org>
* common/config/sh/sh-common.c: Remove SH5 support.
* config/sh/constraints.md: Likewise.
* config/sh/config/sh/elf.h: Likewise.
* config/sh/linux.h: Likewise.
* config/sh/netbsd-elf.h: Likewise.
* config/sh/predicates.md: Likewise.
* config/sh/sh-c.c: Likewise.
* config/sh/sh-protos.h: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.h: Likewise.
* config/sh/sh.md: Likewise.
* config/sh/sh.opt: Likewise.
* config/sh/sync.md: Likewise.
* config/sh/sh64.h: Delete.
* config/sh/shmedia.h: Likewise.
* config/sh/shmedia.md: Likewise.
* config/sh/sshmedia.h: Likewise.
* config/sh/t-netbsd-sh5-64: Likewise.
* config/sh/t-sh64: Likewise.
* config/sh/ushmedia.h: Likewise.
2016-04-28 Uros Bizjak <ubizjak@gmail.com> 2016-04-28 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (sign_extend to memory peephole2s): Use * config/i386/i386.md (sign_extend to memory peephole2s): Use
......
...@@ -148,36 +148,6 @@ sh_handle_option (struct gcc_options *opts, ...@@ -148,36 +148,6 @@ sh_handle_option (struct gcc_options *opts,
= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH4A_SINGLE_ONLY; = (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH4A_SINGLE_ONLY;
return true; return true;
case OPT_m5_32media:
opts->x_target_flags
= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_32MEDIA;
return true;
case OPT_m5_32media_nofpu:
opts->x_target_flags
= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_32MEDIA_NOFPU;
return true;
case OPT_m5_64media:
opts->x_target_flags
= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_64MEDIA;
return true;
case OPT_m5_64media_nofpu:
opts->x_target_flags
= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_64MEDIA_NOFPU;
return true;
case OPT_m5_compact:
opts->x_target_flags
= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_COMPACT;
return true;
case OPT_m5_compact_nofpu:
opts->x_target_flags
= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_COMPACT_NOFPU;
return true;
default: default:
return true; return true;
} }
......
...@@ -26,15 +26,12 @@ ...@@ -26,15 +26,12 @@
;; fldi0 / fldi0 cases ;; fldi0 / fldi0 cases
;; Cxx: Constants other than only CONST_INT ;; Cxx: Constants other than only CONST_INT
;; Ccl: call site label ;; Ccl: call site label
;; Css: signed 16-bit constant, literal or symbolic
;; Csu: unsigned 16-bit constant, literal or symbolic
;; Csy: label or symbol ;; Csy: label or symbol
;; Cpg: non-explicit constants that can be directly loaded into a general ;; Cpg: non-explicit constants that can be directly loaded into a general
;; purpose register in PIC code. Like 's' except we don't allow ;; purpose register in PIC code. Like 's' except we don't allow
;; PIC_ADDR_P ;; PIC_ADDR_P
;; IJKLMNOP: CONT_INT constants ;; IJKLMNOP: CONT_INT constants
;; Ixx: signed xx bit ;; Ixx: signed xx bit
;; J16: 0xffffffff00000000 | 0x00000000ffffffff
;; Jmb: 0x000000FF ;; Jmb: 0x000000FF
;; Jmw: 0x0000FFFF ;; Jmw: 0x0000FFFF
;; Jhb: 0x80000000 ;; Jhb: 0x80000000
...@@ -105,23 +102,13 @@ ...@@ -105,23 +102,13 @@
"R0 register.") "R0 register.")
;; Integer constraints ;; Integer constraints
(define_constraint "I06"
"A signed 6-bit constant, as used in SHmedia beqi, bnei and xori."
(and (match_code "const_int")
(match_test "ival >= -32 && ival <= 31")))
(define_constraint "I08" (define_constraint "I08"
"A signed 8-bit constant, as used in add, sub, etc." "A signed 8-bit constant, as used in add, sub, etc."
(and (match_code "const_int") (and (match_code "const_int")
(match_test "ival >= -128 && ival <= 127"))) (match_test "ival >= -128 && ival <= 127")))
(define_constraint "I10"
"A signed 10-bit constant, as used in SHmedia andi, ori."
(and (match_code "const_int")
(match_test "ival >= -512 && ival <= 511")))
(define_constraint "I16" (define_constraint "I16"
"A signed 16-bit constant, as used in SHmedia movi." "A signed 16-bit constant."
(and (match_code "const_int") (and (match_code "const_int")
(match_test "ival >= -32768 && ival <= 32767"))) (match_test "ival >= -32768 && ival <= 32767")))
...@@ -138,11 +125,6 @@ ...@@ -138,11 +125,6 @@
(match_test "(ival & 255) == 0") (match_test "(ival & 255) == 0")
(match_test "TARGET_SH2A"))) (match_test "TARGET_SH2A")))
(define_constraint "J16"
"0xffffffff00000000 or 0x00000000ffffffff."
(and (match_code "const_int")
(match_test "CONST_OK_FOR_J16 (ival)")))
(define_constraint "Jmb" (define_constraint "Jmb"
"Low byte mask constant 0x000000FF" "Low byte mask constant 0x000000FF"
(and (match_code "const_int") (and (match_code "const_int")
...@@ -190,11 +172,6 @@ ...@@ -190,11 +172,6 @@
(and (match_code "const_int") (and (match_code "const_int")
(match_test "ival >= 0 && ival <= 8191"))) (match_test "ival >= 0 && ival <= 8191")))
(define_constraint "K16"
"An unsigned 16-bit constant, as used in SHmedia shori."
(and (match_code "const_int")
(match_test "ival >= 0 && ival <= 65535")))
(define_constraint "P27" (define_constraint "P27"
"A constant for shift operand 1,2,8 or 16." "A constant for shift operand 1,2,8 or 16."
(and (match_code "const_int") (and (match_code "const_int")
...@@ -239,18 +216,6 @@ ...@@ -239,18 +216,6 @@
(and (match_code "unspec") (and (match_code "unspec")
(match_test "XINT (op, 1) == UNSPEC_CALLER"))) (match_test "XINT (op, 1) == UNSPEC_CALLER")))
(define_constraint "Css"
"A signed 16-bit constant, literal or symbolic."
(and (match_code "const")
(match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
(match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_S16")))
(define_constraint "Csu"
"An unsigned 16-bit constant, literal or symbolic."
(and (match_code "const")
(match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
(match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_U16")))
(define_constraint "Csy" (define_constraint "Csy"
"A label or a symbol." "A label or a symbol."
(ior (match_test "NON_PIC_REFERENCE_P (op)") (ior (match_test "NON_PIC_REFERENCE_P (op)")
......
...@@ -32,7 +32,6 @@ along with GCC; see the file COPYING3. If not see ...@@ -32,7 +32,6 @@ along with GCC; see the file COPYING3. If not see
#define DWARF2_ASM_LINE_DEBUG_INFO 1 #define DWARF2_ASM_LINE_DEBUG_INFO 1
#undef WCHAR_TYPE #undef WCHAR_TYPE
/* #define WCHAR_TYPE (TARGET_SH5 ? "int" : "long int") */
#define WCHAR_TYPE SH_ELF_WCHAR_TYPE #define WCHAR_TYPE SH_ELF_WCHAR_TYPE
#undef WCHAR_TYPE_SIZE #undef WCHAR_TYPE_SIZE
...@@ -44,10 +43,10 @@ along with GCC; see the file COPYING3. If not see ...@@ -44,10 +43,10 @@ along with GCC; see the file COPYING3. If not see
#define LOCAL_LABEL_PREFIX "." #define LOCAL_LABEL_PREFIX "."
#undef SIZE_TYPE #undef SIZE_TYPE
#define SIZE_TYPE (TARGET_SH5 ? "long unsigned int" : "unsigned int") #define SIZE_TYPE ("unsigned int")
#undef PTRDIFF_TYPE #undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_SH5 ? "long int" : "int") #define PTRDIFF_TYPE ("int")
/* Pass -ml and -mrelax to the assembler and linker. */ /* Pass -ml and -mrelax to the assembler and linker. */
#undef ASM_SPEC #undef ASM_SPEC
......
...@@ -81,32 +81,6 @@ along with GCC; see the file COPYING3. If not see ...@@ -81,32 +81,6 @@ along with GCC; see the file COPYING3. If not see
#undef FUNCTION_PROFILER #undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(STREAM,LABELNO) \ #define FUNCTION_PROFILER(STREAM,LABELNO) \
do { \ do { \
if (TARGET_SHMEDIA) \
{ \
fprintf (STREAM, "\tpt\t1f,tr1\n"); \
fprintf (STREAM, "\taddi.l\tr15,-8,r15\n"); \
fprintf (STREAM, "\tst.l\tr15,0,r18\n"); \
if (flag_pic) \
{ \
const char *gofs = "(datalabel _GLOBAL_OFFSET_TABLE_-(0f-.))"; \
fprintf (STREAM, "\tmovi\t((%s>>16)&0xffff),r21\n", gofs); \
fprintf (STREAM, "\tshori\t(%s & 0xffff),r21\n", gofs); \
fprintf (STREAM, "0:\tptrel/u\tr21,tr0\n"); \
fprintf (STREAM, "\tmovi\t((mcount@GOTPLT)&0xffff),r22\n"); \
fprintf (STREAM, "\tgettr\ttr0,r21\n"); \
fprintf (STREAM, "\tadd.l\tr21,r22,r21\n"); \
fprintf (STREAM, "\tld.l\tr21,0,r21\n"); \
fprintf (STREAM, "\tptabs\tr21,tr0\n"); \
} \
else \
fprintf (STREAM, "\tpt\tmcount,tr0\n"); \
fprintf (STREAM, "\tgettr\ttr1,r18\n"); \
fprintf (STREAM, "\tblink\ttr0,r63\n"); \
fprintf (STREAM, "1:\tld.l\tr15,0,r18\n"); \
fprintf (STREAM, "\taddi.l\tr15,8,r15\n"); \
} \
else \
{ \
if (flag_pic) \ if (flag_pic) \
{ \ { \
fprintf (STREAM, "\tmov.l\t3f,r1\n"); \ fprintf (STREAM, "\tmov.l\t3f,r1\n"); \
...@@ -130,7 +104,6 @@ along with GCC; see the file COPYING3. If not see ...@@ -130,7 +104,6 @@ along with GCC; see the file COPYING3. If not see
else \ else \
fprintf (STREAM, "1:\t.long\tmcount\n"); \ fprintf (STREAM, "1:\t.long\tmcount\n"); \
fprintf (STREAM, "2:\tlds.l\t@r15+,pr\n"); \ fprintf (STREAM, "2:\tlds.l\t@r15+,pr\n"); \
} \
} while (0) } while (0)
/* For SH3 and SH4, we use a slot of the unwind frame which correspond /* For SH3 and SH4, we use a slot of the unwind frame which correspond
...@@ -142,7 +115,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -142,7 +115,7 @@ along with GCC; see the file COPYING3. If not see
so as to return itself for 16. */ so as to return itself for 16. */
#undef DBX_REGISTER_NUMBER #undef DBX_REGISTER_NUMBER
#define DBX_REGISTER_NUMBER(REGNO) \ #define DBX_REGISTER_NUMBER(REGNO) \
((! TARGET_SH5 && (REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO)) (((REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO))
/* Since libgcc is compiled with -fpic for this target, we can't use /* Since libgcc is compiled with -fpic for this target, we can't use
__sdivsi3_1 as the division strategy for -O0 and -Os. */ __sdivsi3_1 as the division strategy for -O0 and -Os. */
......
...@@ -67,13 +67,6 @@ along with GCC; see the file COPYING3. If not see ...@@ -67,13 +67,6 @@ along with GCC; see the file COPYING3. If not see
#define FUNCTION_PROFILER(STREAM,LABELNO) \ #define FUNCTION_PROFILER(STREAM,LABELNO) \
do \ do \
{ \ { \
if (TARGET_SHMEDIA32 || TARGET_SHMEDIA64) \
{ \
/* FIXME */ \
sorry ("unimplemented-shmedia profiling"); \
} \
else \
{ \
fprintf((STREAM), "\tmov.l\t%sLP%d,r1\n", \ fprintf((STREAM), "\tmov.l\t%sLP%d,r1\n", \
LOCAL_LABEL_PREFIX, (LABELNO)); \ LOCAL_LABEL_PREFIX, (LABELNO)); \
fprintf((STREAM), "\tmova\t%sLP%dr,r0\n", \ fprintf((STREAM), "\tmova\t%sLP%dr,r0\n", \
...@@ -84,7 +77,6 @@ do \ ...@@ -84,7 +77,6 @@ do \
fprintf((STREAM), "%sLP%d:\t.long\t__mcount\n", \ fprintf((STREAM), "%sLP%d:\t.long\t__mcount\n", \
LOCAL_LABEL_PREFIX, (LABELNO)); \ LOCAL_LABEL_PREFIX, (LABELNO)); \
fprintf((STREAM), "%sLP%dr:\n", LOCAL_LABEL_PREFIX, (LABELNO)); \ fprintf((STREAM), "%sLP%dr:\n", LOCAL_LABEL_PREFIX, (LABELNO)); \
} \
} \ } \
while (0) while (0)
......
...@@ -119,15 +119,6 @@ sh_cpu_cpp_builtins (cpp_reader* pfile) ...@@ -119,15 +119,6 @@ sh_cpu_cpp_builtins (cpp_reader* pfile)
: TARGET_FPU_ANY ? "__SH4_SINGLE_ONLY__" : TARGET_FPU_ANY ? "__SH4_SINGLE_ONLY__"
: "__SH4_NOFPU__"); : "__SH4_NOFPU__");
break; break;
case PROCESSOR_SH5:
{
builtin_define_with_value ("__SH5__",
TARGET_SHMEDIA64 ? "64" : "32", 0);
builtin_define_with_value ("__SHMEDIA__",
TARGET_SHMEDIA ? "1" : "0", 0);
if (! TARGET_FPU_DOUBLE)
builtin_define ("__SH4_NOFPU__");
}
} }
if (TARGET_FPU_ANY) if (TARGET_FPU_ANY)
builtin_define ("__SH_FPU_ANY__"); builtin_define ("__SH_FPU_ANY__");
......
...@@ -124,7 +124,6 @@ extern enum rtx_code prepare_cbranch_operands (rtx *, machine_mode mode, ...@@ -124,7 +124,6 @@ extern enum rtx_code prepare_cbranch_operands (rtx *, machine_mode mode,
extern void expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int); extern void expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int);
extern bool expand_cbranchdi4 (rtx *operands, enum rtx_code comparison); extern bool expand_cbranchdi4 (rtx *operands, enum rtx_code comparison);
extern void sh_emit_scc_to_t (enum rtx_code, rtx, rtx); extern void sh_emit_scc_to_t (enum rtx_code, rtx, rtx);
extern rtx sh_emit_cheap_store_flag (machine_mode, enum rtx_code, rtx, rtx);
extern void sh_emit_compare_and_branch (rtx *, machine_mode); extern void sh_emit_compare_and_branch (rtx *, machine_mode);
extern void sh_emit_compare_and_set (rtx *, machine_mode); extern void sh_emit_compare_and_set (rtx *, machine_mode);
extern bool sh_ashlsi_clobbers_t_reg_p (rtx); extern bool sh_ashlsi_clobbers_t_reg_p (rtx);
...@@ -140,7 +139,6 @@ extern bool gen_shl_and (rtx, rtx, rtx, rtx); ...@@ -140,7 +139,6 @@ extern bool gen_shl_and (rtx, rtx, rtx, rtx);
extern int shl_sext_kind (rtx, rtx, int *); extern int shl_sext_kind (rtx, rtx, int *);
extern int shl_sext_length (rtx); extern int shl_sext_length (rtx);
extern bool gen_shl_sext (rtx, rtx, rtx, rtx); extern bool gen_shl_sext (rtx, rtx, rtx, rtx);
extern rtx gen_datalabel_ref (rtx);
extern int regs_used (rtx, int); extern int regs_used (rtx, int);
extern void fixup_addr_diff_vecs (rtx_insn *); extern void fixup_addr_diff_vecs (rtx_insn *);
extern int get_dest_uid (rtx, int); extern int get_dest_uid (rtx, int);
...@@ -149,8 +147,6 @@ extern enum tls_model tls_symbolic_operand (rtx, machine_mode); ...@@ -149,8 +147,6 @@ extern enum tls_model tls_symbolic_operand (rtx, machine_mode);
extern bool system_reg_operand (rtx, machine_mode); extern bool system_reg_operand (rtx, machine_mode);
extern bool reg_unused_after (rtx, rtx_insn *); extern bool reg_unused_after (rtx, rtx_insn *);
extern int sh_insn_length_adjustment (rtx_insn *); extern int sh_insn_length_adjustment (rtx_insn *);
extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx);
extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx);
extern bool sh_expand_t_scc (rtx *); extern bool sh_expand_t_scc (rtx *);
extern rtx sh_gen_truncate (machine_mode, rtx, int); extern rtx sh_gen_truncate (machine_mode, rtx, int);
extern bool sh_vector_mode_supported_p (machine_mode); extern bool sh_vector_mode_supported_p (machine_mode);
......
This source diff could not be displayed because it is too large. You can view the blob instead.
...@@ -37,9 +37,6 @@ Mask(HARD_SH2A_DOUBLE) ...@@ -37,9 +37,6 @@ Mask(HARD_SH2A_DOUBLE)
;; Set if compiling for SH4 hardware (to be used for insn costs etc.) ;; Set if compiling for SH4 hardware (to be used for insn costs etc.)
Mask(HARD_SH4) Mask(HARD_SH4)
;; Set if we should generate code for a SH5 CPU (either ISA).
Mask(SH5)
;; Set if we should save all target registers. ;; Set if we should save all target registers.
Mask(SAVE_ALL_TARGET_REGS) Mask(SAVE_ALL_TARGET_REGS)
...@@ -180,30 +177,6 @@ m4al ...@@ -180,30 +177,6 @@ m4al
Target RejectNegative Condition(SUPPORT_SH4AL) Target RejectNegative Condition(SUPPORT_SH4AL)
Generate SH4al-dsp code. Generate SH4al-dsp code.
m5-32media
Target RejectNegative Condition(SUPPORT_SH5_32MEDIA)
Generate 32-bit SHmedia code.
m5-32media-nofpu
Target RejectNegative Condition(SUPPORT_SH5_32MEDIA_NOFPU)
Generate 32-bit FPU-less SHmedia code.
m5-64media
Target RejectNegative Condition(SUPPORT_SH5_64MEDIA)
Generate 64-bit SHmedia code.
m5-64media-nofpu
Target RejectNegative Condition(SUPPORT_SH5_64MEDIA_NOFPU)
Generate 64-bit FPU-less SHmedia code.
m5-compact
Target RejectNegative Condition(SUPPORT_SH5_32MEDIA)
Generate SHcompact code.
m5-compact-nofpu
Target RejectNegative Condition(SUPPORT_SH5_32MEDIA_NOFPU)
Generate FPU-less SHcompact code.
maccumulate-outgoing-args maccumulate-outgoing-args
Target Report Var(TARGET_ACCUMULATE_OUTGOING_ARGS) Init(1) Target Report Var(TARGET_ACCUMULATE_OUTGOING_ARGS) Init(1)
Reserve space for outgoing arguments in the function prologue. Reserve space for outgoing arguments in the function prologue.
...@@ -244,17 +217,13 @@ mcbranch-force-delay-slot ...@@ -244,17 +217,13 @@ mcbranch-force-delay-slot
Target Report RejectNegative Var(TARGET_CBRANCH_FORCE_DELAY_SLOT) Init(0) Target Report RejectNegative Var(TARGET_CBRANCH_FORCE_DELAY_SLOT) Init(0)
Force the usage of delay slots for conditional branches. Force the usage of delay slots for conditional branches.
mcut2-workaround
Target RejectNegative Var(TARGET_SH5_CUT2_WORKAROUND)
Enable SH5 cut2 workaround.
mdalign mdalign
Target Report RejectNegative Mask(ALIGN_DOUBLE) Target Report RejectNegative Mask(ALIGN_DOUBLE)
Align doubles at 64-bit boundaries. Align doubles at 64-bit boundaries.
mdiv= mdiv=
Target RejectNegative Joined Var(sh_div_str) Init("") Target RejectNegative Joined Var(sh_div_str) Init("")
Division strategy, one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp, call-div1, call-fp, call-table. Division strategy, one of: call-div1, call-fp, call-table.
mdivsi3_libfunc= mdivsi3_libfunc=
Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("") Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("")
...@@ -272,10 +241,6 @@ mfixed-range= ...@@ -272,10 +241,6 @@ mfixed-range=
Target RejectNegative Joined Var(sh_fixed_range_str) Target RejectNegative Joined Var(sh_fixed_range_str)
Specify range of registers to make fixed. Specify range of registers to make fixed.
mgettrcost=
Target RejectNegative Joined UInteger Var(sh_gettrcost) Init(-1)
Cost to assume for gettr insn.
mhitachi mhitachi
Target Report RejectNegative Mask(HITACHI) Target Report RejectNegative Mask(HITACHI)
Follow Renesas (formerly Hitachi) / SuperH calling conventions. Follow Renesas (formerly Hitachi) / SuperH calling conventions.
...@@ -284,10 +249,6 @@ mieee ...@@ -284,10 +249,6 @@ mieee
Target Var(TARGET_IEEE) Target Var(TARGET_IEEE)
Increase the IEEE compliance for floating-point comparisons. Increase the IEEE compliance for floating-point comparisons.
mindexed-addressing
Target Report Mask(ALLOW_INDEXED_ADDRESS) Condition(SUPPORT_ANY_SH5_32MEDIA)
Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
minline-ic_invalidate minline-ic_invalidate
Target Report Var(TARGET_INLINE_IC_INVALIDATE) Target Report Var(TARGET_INLINE_IC_INVALIDATE)
inline code to invalidate instruction cache entries after setting up nested function trampolines. inline code to invalidate instruction cache entries after setting up nested function trampolines.
...@@ -318,10 +279,6 @@ mprefergot ...@@ -318,10 +279,6 @@ mprefergot
Target Report RejectNegative Mask(PREFERGOT) Target Report RejectNegative Mask(PREFERGOT)
Emit function-calls using global offset table when generating PIC. Emit function-calls using global offset table when generating PIC.
mpt-fixed
Target Report Mask(PT_FIXED) Condition(SUPPORT_ANY_SH5)
Assume pt* instructions won't trap
mrelax mrelax
Target Report RejectNegative Mask(RELAX) Target Report RejectNegative Mask(RELAX)
Shorten address references during linking. Shorten address references during linking.
......
/* Definitions of target machine for GNU compiler for SuperH SH 5.
Copyright (C) 2000-2016 Free Software Foundation, Inc.
Contributed by Alexandre Oliva <aoliva@redhat.com>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#undef SH_ELF_WCHAR_TYPE
#define SH_ELF_WCHAR_TYPE "int"
/* Copyright (C) 2000-2016 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#ifndef _SHMEDIA_H
#define _SHMEDIA_H
#include <ushmedia.h>
#include <sshmedia.h>
#endif
;; DFA scheduling description for SH-5 SHmedia instructions.
;; Copyright (C) 2004-2016 Free Software Foundation, Inc.
;; This file is part of GCC.
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
;; This is just a conversion of the old model using define_function_unit.
;; When executing SHmedia code, the SH-5 is a fairly straightforward
;; single-issue machine. It has four pipelines, the branch unit (br),
;; the integer and multimedia unit (imu), the load/store unit (lsu), and
;; the floating point unit (fpu).
(define_automaton "sh5inst_pipe, sh5fpu_pipe")
(define_cpu_unit "sh5issue" "sh5inst_pipe")
(define_cpu_unit "sh5fds" "sh5fpu_pipe")
;; Every instruction on SH-5 occupies the issue resource for at least one
;; cycle.
(define_insn_reservation "shmedia1" 1
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "!pt_media,ptabs_media,invalidate_line_media,dmpy_media,load_media,fload_media,fcmp_media,fmove_media,fparith_media,dfparith_media,fpconv_media,dfpconv_media,dfmul_media,store_media,fstore_media,mcmp_media,mac_media,d2mpy_media,atrans_media,ustore_media"))
"sh5issue")
;; Specify the various types of instruction which have latency > 1
(define_insn_reservation "shmedia2" 2
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "mcmp_media"))
"sh5issue")
(define_insn_reservation "shmedia3" 3
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "dmpy_media,load_media,fcmp_media,mac_media"))
"sh5issue")
;; but see sh_adjust_cost for mac_media exception.
(define_insn_reservation "shmedia4" 4
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "fload_media,fmove_media"))
"sh5issue")
(define_insn_reservation "shmedia_d2mpy" 4
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "d2mpy_media"))
"sh5issue*2")
(define_insn_reservation "shmedia5" 5
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "pt_media,ptabs_media"))
"sh5issue")
(define_insn_reservation "shmedia6" 6
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "fparith_media,dfparith_media,fpconv_media,dfpconv_media"))
"sh5issue")
(define_insn_reservation "shmedia_invalidate" 7
(and (eq_attr "pipe_model" "sh5media")
(eq_attr "type" "invalidate_line_media"))
"sh5issue*7")
(define_insn_reservation "shmedia_dfmul" 9
(and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "dfmul_media"))
"sh5issue*4")
(define_insn_reservation "shmedia_atrans" 10
(and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "atrans_media"))
"sh5issue*5")
;; Floating-point divide and square-root occupy an additional resource,
;; which is not internally pipelined. However, other instructions
;; can continue to issue.
(define_insn_reservation "shmedia_fdiv" 19
(and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "fdiv_media"))
"sh5issue+sh5fds,sh5fds*18")
(define_insn_reservation "shmedia_dfdiv" 35
(and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "dfdiv_media"))
"sh5issue+sh5fds,sh5fds*34")
/* Copyright (C) 2000-2016 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
/* sshmedia.h: Intrinsics corresponding to SHmedia instructions that
may only be executed in privileged mode. */
#ifndef _SSHMEDIA_H
#define _SSHMEDIA_H
#if __SHMEDIA__
__inline__ static unsigned long long sh_media_GETCON (unsigned int k)
__attribute__((always_inline));
__inline__ static
unsigned long long
sh_media_GETCON (unsigned int k)
{
unsigned long long res;
__asm__ __volatile__ ("getcon cr%1, %0" : "=r" (res) : "n" (k));
return res;
}
__inline__ static void sh_media_PUTCON (unsigned long long mm, unsigned int k)
__attribute__((always_inline));
__inline__ static
void
sh_media_PUTCON (unsigned long long mm, unsigned int k)
{
__asm__ __volatile__ ("putcon %0, cr%1" : : "r" (mm), "n" (k));
}
__inline__ static
unsigned long long
sh_media_GETCFG (unsigned long long mm, int s)
{
unsigned long long res;
__asm__ __volatile__ ("getcfg %1, %2, %0" : "=r" (res) : "r" (mm), "n" (s));
return res;
}
__inline__ static
void
sh_media_PUTCFG (unsigned long long mm, int s, unsigned long long mw)
{
__asm__ __volatile__ ("putcfg %0, %1, %2" : : "r" (mm), "n" (s), "r" (mw));
}
__inline__ static
void
sh_media_SLEEP (void)
{
__asm__ __volatile__ ("sleep");
}
#endif
#endif
...@@ -2131,7 +2131,7 @@ ...@@ -2131,7 +2131,7 @@
[(match_operand:SI 0 "register_operand" "") ;; bool result output [(match_operand:SI 0 "register_operand" "") ;; bool result output
(match_operand:QI 1 "memory_operand" "") ;; memory (match_operand:QI 1 "memory_operand" "") ;; memory
(match_operand:SI 2 "const_int_operand" "")] ;; model (match_operand:SI 2 "const_int_operand" "")] ;; model
"(TARGET_ATOMIC_ANY || TARGET_ENABLE_TAS) && !TARGET_SHMEDIA" "TARGET_ATOMIC_ANY || TARGET_ENABLE_TAS"
{ {
rtx addr = force_reg (Pmode, XEXP (operands[1], 0)); rtx addr = force_reg (Pmode, XEXP (operands[1], 0));
...@@ -2168,7 +2168,7 @@ ...@@ -2168,7 +2168,7 @@
(const_int 0))) (const_int 0)))
(set (mem:QI (match_dup 0)) (set (mem:QI (match_dup 0))
(unspec:QI [(const_int 128)] UNSPEC_ATOMIC))] (unspec:QI [(const_int 128)] UNSPEC_ATOMIC))]
"TARGET_ENABLE_TAS && !TARGET_SHMEDIA" "TARGET_ENABLE_TAS"
"tas.b @%0" "tas.b @%0"
[(set_attr "insn_class" "co_group")]) [(set_attr "insn_class" "co_group")])
......
MULTILIB_DIRNAMES= $(MULTILIB_RAW_DIRNAMES:/media64=)
# Copyright (C) 2002-2016 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
MULTILIB_CPU_DIRS= $(ML_sh1) $(ML_sh2e) $(ML_sh2) $(ML_sh3e) $(ML_sh3) $(ML_sh4_nofpu) $(ML_sh4_single_only) $(ML_sh4_single) $(ML_sh4) $(ML_sh5_32media:m5-32media/=media32) $(ML_sh5_32media_nofpu:m5-32media-nofpu/=nofpu/media32) $(ML_sh5_compact:m5-compact/=compact) $(ML_sh5_compact_nofpu:m5-compact-nofpu/=nofpu/compact) $(ML_sh5_64media:m5-64media/=media64) $(ML_sh5_64media_nofpu:m5-64media-nofpu/=nofpu/media64)
MULTILIB_RAW_DIRNAMES= $(MULTILIB_ENDIAN:/mb= mb) $(MULTILIB_CPU_DIRS:/=)
MULTILIB_DIRNAMES= $(MULTILIB_RAW_DIRNAMES)
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