sh-common.c: Remove SH5 support.

gcc/
	* common/config/sh/sh-common.c: Remove SH5 support.
	* config/sh/constraints.md: Likewise.
	* config/sh/config/sh/elf.h: Likewise.
	* config/sh/linux.h: Likewise.
	* config/sh/netbsd-elf.h: Likewise.
	* config/sh/predicates.md: Likewise.
	* config/sh/sh-c.c: Likewise.
	* config/sh/sh-protos.h: Likewise.
	* config/sh/sh.c: Likewise.
	* config/sh/sh.h: Likewise.
	* config/sh/sh.md: Likewise.
	* config/sh/sh.opt: Likewise.
	* config/sh/sync.md: Likewise.
	* config/sh/sh64.h: Delete.
	* config/sh/shmedia.h: Likewise.
	* config/sh/shmedia.md: Likewise.
	* config/sh/sshmedia.h: Likewise.
	* config/sh/t-netbsd-sh5-64: Likewise.
	* config/sh/t-sh64: Likewise.
	* config/sh/ushmedia.h: Likewise.

From-SVN: r235544

gcc/ChangeLog

+2016-04-28  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	* common/config/sh/sh-common.c: Remove SH5 support.
+	* config/sh/constraints.md: Likewise.
+	* config/sh/config/sh/elf.h: Likewise.
+	* config/sh/linux.h: Likewise.
+	* config/sh/netbsd-elf.h: Likewise.
+	* config/sh/predicates.md: Likewise.
+	* config/sh/sh-c.c: Likewise.
+	* config/sh/sh-protos.h: Likewise.
+	* config/sh/sh.c: Likewise.
+	* config/sh/sh.h: Likewise.
+	* config/sh/sh.md: Likewise.
+	* config/sh/sh.opt: Likewise.
+	* config/sh/sync.md: Likewise.
+	* config/sh/sh64.h: Delete.
+	* config/sh/shmedia.h: Likewise.
+	* config/sh/shmedia.md: Likewise.
+	* config/sh/sshmedia.h: Likewise.
+	* config/sh/t-netbsd-sh5-64: Likewise.
+	* config/sh/t-sh64: Likewise.
+	* config/sh/ushmedia.h: Likewise.
+
 2016-04-28  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.md (sign_extend to memory peephole2s): Use

gcc/common/config/sh/sh-common.c

@@ -148,36 +148,6 @@ sh_handle_option (struct gcc_options *opts,
 	= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH4A_SINGLE_ONLY;
       return true;
 
-    case OPT_m5_32media:
-      opts->x_target_flags
-	= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_32MEDIA;
-      return true;
-
-    case OPT_m5_32media_nofpu:
-      opts->x_target_flags
-	= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_32MEDIA_NOFPU;
-      return true;
-
-    case OPT_m5_64media:
-      opts->x_target_flags
-	= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_64MEDIA;
-      return true;
-
-    case OPT_m5_64media_nofpu:
-      opts->x_target_flags
-	= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_64MEDIA_NOFPU;
-      return true;
-
-    case OPT_m5_compact:
-      opts->x_target_flags
-	= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_COMPACT;
-      return true;
-
-    case OPT_m5_compact_nofpu:
-      opts->x_target_flags
-	= (opts->x_target_flags & ~MASK_ARCH) | SELECT_SH5_COMPACT_NOFPU;
-      return true;
-
     default:
       return true;
     }

gcc/config/sh/constraints.md

@@ -26,15 +26,12 @@
 ;;       fldi0 / fldi0 cases
 ;; Cxx: Constants other than only CONST_INT
 ;;  Ccl: call site label
-;;  Css: signed 16-bit constant, literal or symbolic
-;;  Csu: unsigned 16-bit constant, literal or symbolic
 ;;  Csy: label or symbol
 ;;  Cpg: non-explicit constants that can be directly loaded into a general
 ;;       purpose register in PIC code.  Like 's' except we don't allow
 ;;       PIC_ADDR_P
 ;; IJKLMNOP: CONT_INT constants
 ;;  Ixx: signed xx bit
-;;  J16: 0xffffffff00000000 | 0x00000000ffffffff
 ;;  Jmb: 0x000000FF
 ;;  Jmw: 0x0000FFFF
 ;;  Jhb: 0x80000000
@@ -105,23 +102,13 @@
   "R0 register.")
 
 ;; Integer constraints
-(define_constraint "I06"
-  "A signed 6-bit constant, as used in SHmedia beqi, bnei and xori."
-  (and (match_code "const_int")
-       (match_test "ival >= -32 && ival <= 31")))
-
 (define_constraint "I08"
   "A signed 8-bit constant, as used in add, sub, etc."
   (and (match_code "const_int")
        (match_test "ival >= -128 && ival <= 127")))
 
-(define_constraint "I10"
-  "A signed 10-bit constant, as used in SHmedia andi, ori."
-  (and (match_code "const_int")
-       (match_test "ival >= -512 && ival <= 511")))
-
 (define_constraint "I16"
-  "A signed 16-bit constant, as used in SHmedia movi."
+  "A signed 16-bit constant."
   (and (match_code "const_int")
        (match_test "ival >= -32768 && ival <= 32767")))
 
@@ -138,11 +125,6 @@
        (match_test "(ival & 255) == 0")
        (match_test "TARGET_SH2A")))
 
-(define_constraint "J16"
-  "0xffffffff00000000 or 0x00000000ffffffff."
-  (and (match_code "const_int")
-       (match_test "CONST_OK_FOR_J16 (ival)")))
-
 (define_constraint "Jmb"
   "Low byte mask constant 0x000000FF"
   (and (match_code "const_int")
@@ -190,11 +172,6 @@
   (and (match_code "const_int")
        (match_test "ival >= 0 && ival <= 8191")))
 
-(define_constraint "K16"
-  "An unsigned 16-bit constant, as used in SHmedia shori."
-  (and (match_code "const_int")
-       (match_test "ival >= 0 && ival <= 65535")))
- 
 (define_constraint "P27"
   "A constant for shift operand 1,2,8 or 16."
   (and (match_code "const_int")
@@ -239,18 +216,6 @@
   (and (match_code "unspec")
        (match_test "XINT (op, 1) == UNSPEC_CALLER")))
 
-(define_constraint "Css"
-  "A signed 16-bit constant, literal or symbolic."
-  (and (match_code "const")
-       (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
-       (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_S16")))
-
-(define_constraint "Csu"
-  "An unsigned 16-bit constant, literal or symbolic."
-  (and (match_code "const")
-       (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
-       (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_EXTRACT_U16")))
-
 (define_constraint "Csy"
   "A label or a symbol."
   (ior (match_test "NON_PIC_REFERENCE_P (op)")

gcc/config/sh/elf.h

@@ -32,7 +32,6 @@ along with GCC; see the file COPYING3.  If not see
 #define DWARF2_ASM_LINE_DEBUG_INFO 1
 
 #undef WCHAR_TYPE
-/* #define WCHAR_TYPE (TARGET_SH5 ? "int" : "long int")  */
 #define WCHAR_TYPE SH_ELF_WCHAR_TYPE
    
 #undef WCHAR_TYPE_SIZE
@@ -44,10 +43,10 @@ along with GCC; see the file COPYING3.  If not see
 #define LOCAL_LABEL_PREFIX "."
 
 #undef SIZE_TYPE
-#define SIZE_TYPE (TARGET_SH5 ? "long unsigned int" : "unsigned int")
+#define SIZE_TYPE ("unsigned int")
 
 #undef PTRDIFF_TYPE
-#define PTRDIFF_TYPE (TARGET_SH5 ? "long int" : "int")
+#define PTRDIFF_TYPE ("int")
 
 /* Pass -ml and -mrelax to the assembler and linker.  */
 #undef ASM_SPEC

gcc/config/sh/linux.h

@@ -81,32 +81,6 @@ along with GCC; see the file COPYING3.  If not see
 #undef FUNCTION_PROFILER
 #define FUNCTION_PROFILER(STREAM,LABELNO)				\
   do {									\
-    if (TARGET_SHMEDIA)							\
-      {									\
-	fprintf (STREAM, "\tpt\t1f,tr1\n");				\
-	fprintf (STREAM, "\taddi.l\tr15,-8,r15\n");			\
-	fprintf (STREAM, "\tst.l\tr15,0,r18\n");			\
-	if (flag_pic)							\
-	  {								\
-	    const char *gofs = "(datalabel _GLOBAL_OFFSET_TABLE_-(0f-.))"; \
-	    fprintf (STREAM, "\tmovi\t((%s>>16)&0xffff),r21\n", gofs);	\
-	    fprintf (STREAM, "\tshori\t(%s & 0xffff),r21\n", gofs);	\
-	    fprintf (STREAM, "0:\tptrel/u\tr21,tr0\n");			\
-	    fprintf (STREAM, "\tmovi\t((mcount@GOTPLT)&0xffff),r22\n");	\
-	    fprintf (STREAM, "\tgettr\ttr0,r21\n");			\
-	    fprintf (STREAM, "\tadd.l\tr21,r22,r21\n");			\
-	    fprintf (STREAM, "\tld.l\tr21,0,r21\n");			\
-	    fprintf (STREAM, "\tptabs\tr21,tr0\n");			\
-	  }								\
-	else								\
-	  fprintf (STREAM, "\tpt\tmcount,tr0\n");			\
-	fprintf (STREAM, "\tgettr\ttr1,r18\n");				\
-	fprintf (STREAM, "\tblink\ttr0,r63\n");				\
-	fprintf (STREAM, "1:\tld.l\tr15,0,r18\n");			\
-	fprintf (STREAM, "\taddi.l\tr15,8,r15\n");			\
-      }									\
-    else								\
-      {									\
 	if (flag_pic)							\
 	  {								\
 	    fprintf (STREAM, "\tmov.l\t3f,r1\n");			\
@@ -130,7 +104,6 @@ along with GCC; see the file COPYING3.  If not see
 	else								\
 	  fprintf (STREAM, "1:\t.long\tmcount\n");			\
 	fprintf (STREAM, "2:\tlds.l\t@r15+,pr\n");			\
-      }									\
   } while (0)
 
 /* For SH3 and SH4, we use a slot of the unwind frame which correspond
@@ -142,7 +115,7 @@ along with GCC; see the file COPYING3.  If not see
    so as to return itself for 16.  */
 #undef DBX_REGISTER_NUMBER
 #define DBX_REGISTER_NUMBER(REGNO) \
-  ((! TARGET_SH5 && (REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO))
+  (((REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO))
 
 /* Since libgcc is compiled with -fpic for this target, we can't use
    __sdivsi3_1 as the division strategy for -O0 and -Os.  */

gcc/config/sh/netbsd-elf.h

@@ -67,13 +67,6 @@ along with GCC; see the file COPYING3.  If not see
 #define FUNCTION_PROFILER(STREAM,LABELNO)				\
 do									\
   {									\
-    if (TARGET_SHMEDIA32 || TARGET_SHMEDIA64)				\
-      {									\
-	/* FIXME */							\
-	sorry ("unimplemented-shmedia profiling");			\
-      }									\
-    else								\
-      {									\
         fprintf((STREAM), "\tmov.l\t%sLP%d,r1\n",			\
                 LOCAL_LABEL_PREFIX, (LABELNO));				\
         fprintf((STREAM), "\tmova\t%sLP%dr,r0\n",			\
@@ -84,7 +77,6 @@ do									\
         fprintf((STREAM), "%sLP%d:\t.long\t__mcount\n",			\
                 LOCAL_LABEL_PREFIX, (LABELNO));				\
         fprintf((STREAM), "%sLP%dr:\n", LOCAL_LABEL_PREFIX, (LABELNO));	\
-      }									\
   }									\
 while (0)
 

gcc/config/sh/predicates.md

@@ -17,70 +17,6 @@
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.
 
-;; TODO: Add a comment here.
-(define_predicate "trapping_target_operand"
-  (match_code "if_then_else")
-{
-  rtx cond, mem, res, tar, and_expr;
-
-  if (GET_MODE (op) != PDImode)
-    return 0;
-  cond = XEXP (op, 0);
-  mem = XEXP (op, 1);
-  res = XEXP (op, 2);
-  if (!MEM_P (mem)
-      || (GET_CODE (res) != SIGN_EXTEND && GET_CODE (res) != TRUNCATE))
-    return 0;
-  tar = XEXP (res, 0);
-  if (!rtx_equal_p (XEXP (mem, 0), tar)
-      || GET_MODE (tar) != Pmode)
-    return 0;
-  if (GET_CODE (cond) == CONST)
-    {
-      cond = XEXP (cond, 0);
-      if (!satisfies_constraint_Csy (tar))
-	return 0;
-      if (GET_CODE (tar) == CONST)
-	tar = XEXP (tar, 0);
-    }
-  else if (!arith_reg_operand (tar, VOIDmode)
-	   && ! satisfies_constraint_Csy (tar))
-    return 0;
-  if (GET_CODE (cond) != EQ)
-    return 0;
-  and_expr = XEXP (cond, 0);
-  return (GET_CODE (and_expr) == AND
-	  && rtx_equal_p (XEXP (and_expr, 0), tar)
-	  && CONST_INT_P (XEXP (and_expr, 1))
-	  && CONST_INT_P (XEXP (cond, 1))
-	  && INTVAL (XEXP (and_expr, 1)) == 3
-	  && INTVAL (XEXP (cond, 1)) == 3);
-})
-
-;; A logical operand that can be used in an shmedia and insn.
-(define_predicate "and_operand"
-  (match_code "subreg,reg,const_int")
-{
-  if (logical_operand (op, mode))
-    return 1;
-
-  /* Check mshflo.l / mshflhi.l opportunities.  */
-  if (TARGET_SHMEDIA
-      && mode == DImode
-      && satisfies_constraint_J16 (op))
-    return 1;
-
-  return 0;
-})
-
-;; Like arith_reg_dest, but this predicate is defined with
-;; define_special_predicate, not define_predicate.
-(define_special_predicate "any_arith_reg_dest"
-  (match_code "subreg,reg")
-{
-  return arith_reg_dest (op, mode);
-})
-
 ;; Like register_operand, but this predicate is defined with
 ;; define_special_predicate, not define_predicate.
 (define_special_predicate "any_register_operand"
@@ -93,35 +29,7 @@
 (define_predicate "arith_operand"
   (match_code "subreg,reg,const_int,truncate")
 {
-  if (arith_reg_operand (op, mode))
-    return 1;
-
-  if (TARGET_SHMEDIA)
-    {
-      /* FIXME: We should be checking whether the CONST_INT fits in a
-	 signed 16-bit here, but this causes reload_cse to crash when
-	 attempting to transform a sequence of two 64-bit sets of the
-	 same register from literal constants into a set and an add,
-	 when the difference is too wide for an add.  */
-      if (CONST_INT_P (op)
-	  || satisfies_constraint_Css (op))
-	return 1;
-      else if (GET_CODE (op) == TRUNCATE
-	       && REG_P (XEXP (op, 0))
-	       && ! system_reg_operand (XEXP (op, 0), VOIDmode)
-	       && (mode == VOIDmode || mode == GET_MODE (op))
-	       && (GET_MODE_SIZE (GET_MODE (op))
-		   < GET_MODE_SIZE (GET_MODE (XEXP (op, 0))))
-	       && (! FP_REGISTER_P (REGNO (XEXP (op, 0)))
-		   || GET_MODE_SIZE (GET_MODE (op)) == 4))
-	return register_operand (XEXP (op, 0), VOIDmode);
-      else
-	return 0;
-    }
-  else if (satisfies_constraint_I08 (op))
-    return 1;
-
-  return 0;
+  return arith_reg_operand (op, mode) || satisfies_constraint_I08 (op);
 })
 
 ;; Like above, but for DImode destinations: forbid paradoxical DImode
@@ -130,10 +38,6 @@
 (define_predicate "arith_reg_dest"
   (match_code "subreg,reg")
 {
-  if (mode == DImode && GET_CODE (op) == SUBREG
-      && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) < 8
-      && TARGET_SHMEDIA)
-    return 0;
   return arith_reg_operand (op, mode);
 })
 
@@ -160,11 +64,7 @@
   /* Allow a no-op sign extension - compare LOAD_EXTEND_OP.
      We allow SImode here, as not using an FP register is just a matter of
      proper register allocation.  */
-  if (TARGET_SHMEDIA
-      && GET_MODE (op) == DImode && GET_CODE (op) == SIGN_EXTEND
-      && GET_MODE (XEXP (op, 0)) == SImode
-      && GET_CODE (XEXP (op, 0)) != SUBREG)
-    return register_operand (XEXP (op, 0), VOIDmode);
+
 #if 0 /* Can't do this because of PROMOTE_MODE for unsigned vars.  */
   if (GET_MODE (op) == SImode && GET_CODE (op) == SIGN_EXTEND
       && GET_MODE (XEXP (op, 0)) == HImode
@@ -236,47 +136,6 @@
        (ior (match_test "INTVAL (op) == 255")
 	    (match_test "INTVAL (op) == 65535"))))
 
-;; Returns 1 if OP is a floating point operator with two operands.
-(define_predicate "binary_float_operator"
-  (and (match_code "plus,minus,mult,div")
-       (match_test "GET_MODE (op) == mode")))
-
-;; Returns 1 if OP is a logical operator with two operands.
-(define_predicate "binary_logical_operator"
-  (and (match_code "and,ior,xor")
-       (match_test "GET_MODE (op) == mode")))
-
-;; Return 1 if OP is an address suitable for a cache manipulation operation.
-;; MODE has the meaning as in address_operand.
-(define_special_predicate "cache_address_operand"
-  (match_code "plus,reg")
-{
-  if (GET_CODE (op) == PLUS)
-    {
-      if (!REG_P (XEXP (op, 0)))
-	return 0;
-      if (!CONST_INT_P (XEXP (op, 1))
-	  || (INTVAL (XEXP (op, 1)) & 31))
-	return 0;
-    }
-  else if (!REG_P (op))
-    return 0;
-  return address_operand (op, mode);
-})
-
-;; Returns 1 if OP is a valid source operand for shmedia cmpgt / cmpgtu.
-(define_predicate "cmp_operand"
-  (match_code "subreg,reg,const_int")
-{
-  if (satisfies_constraint_N (op))
-    return 1;
-  if (TARGET_SHMEDIA
-      && mode != DImode && GET_CODE (op) == SUBREG
-      && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) > 4)
-    return 0;
-  return arith_reg_operand (op, mode);
-})
-
 ;; Returns true if OP is an operand that can be used as the first operand in
 ;; the cstoresi4 expander pattern.
 (define_predicate "cmpsi_operand"
@@ -289,53 +148,6 @@
   return arith_operand (op, mode);
 })
 
-;; Returns true if OP is a comutative float operator.
-;; This predicate is currently unused.
-;;(define_predicate "commutative_float_operator"
-;;  (and (match_code "plus,mult")
-;;       (match_test "GET_MODE (op) == mode")))
-
-;; Returns true if OP is a equal or not equal operator.
-(define_predicate "equality_comparison_operator"
-  (match_code "eq,ne"))
-
-;; Returns true if OP is an arithmetic operand that is zero extended during
-;; an operation.
-(define_predicate "extend_reg_operand"
-  (match_code "subreg,reg,truncate")
-{
-  return (GET_CODE (op) == TRUNCATE
-	  ? arith_operand
-	  : arith_reg_operand) (op, mode);
-})
-
-;; Like extend_reg_operand, but also allow a constant 0.
-(define_predicate "extend_reg_or_0_operand"
-  (match_code "subreg,reg,truncate,const_int")
-{
-  return (GET_CODE (op) == TRUNCATE
-	  ? arith_operand
-	  : arith_reg_or_0_operand) (op, mode);
-})
-
-;; Like arith_reg_operand, but this predicate does not accept SIGN_EXTEND.
-(define_predicate "ext_dest_operand"
-  (match_code "subreg,reg")
-{
-  return arith_reg_operand (op, mode);
-})
-
-;; Returns true if OP can be used as a destination register for shmedia floating
-;; point to integer conversions.
-(define_predicate "fp_arith_reg_dest"
-  (match_code "subreg,reg")
-{
-  if (mode == DImode && GET_CODE (op) == SUBREG
-      && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) < 8)
-    return 0;
-  return fp_arith_reg_operand (op, mode);
-})
-
 ;; Returns true if OP is a floating point register that can be used in floating
 ;; point arithmetic operations.
 (define_predicate "fp_arith_reg_operand"
@@ -390,12 +202,9 @@
 (define_predicate "fpul_operand"
   (match_code "reg")
 {
-  if (TARGET_SHMEDIA)
-    return fp_arith_reg_operand (op, mode);
-
-  return (REG_P (op)
-	  && (REGNO (op) == FPUL_REG || REGNO (op) >= FIRST_PSEUDO_REGISTER)
-	  && GET_MODE (op) == mode);
+  return REG_P (op)
+	 && (REGNO (op) == FPUL_REG || REGNO (op) >= FIRST_PSEUDO_REGISTER)
+	 && GET_MODE (op) == mode;
 })
 
 ;; Returns true if OP is a valid fpul input operand for the fsca insn.
@@ -467,10 +276,7 @@
 
 ;; Returns 1 if the operand can be used in a zero_extend.
 (define_predicate "zero_extend_operand"
-  (ior (and (match_test "TARGET_SHMEDIA")
-	    (match_operand 0 "general_extend_operand"))
-       (and (match_test "! TARGET_SHMEDIA")
-	    (match_operand 0 "arith_reg_operand"))))
+  (match_operand 0 "arith_reg_operand"))
 
 ;; Returns 1 if OP can be source of a simple move operation. Same as
 ;; general_operand, but a LABEL_REF is valid, PRE_DEC is invalid as
@@ -523,10 +329,6 @@
       rtx mem_rtx = MEM_P (op) ? op : SUBREG_REG (op);
       rtx x = XEXP (mem_rtx, 0);
 
-      if (! ALLOW_INDEXED_ADDRESS
-	  && GET_CODE (x) == PLUS && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1)))
-	return false;
-
       if (GET_CODE (x) == PLUS)
 	{
 	  rtx y = XEXP (x, 0);
@@ -571,15 +373,6 @@
 	  return true;
     }
 
-  if (TARGET_SHMEDIA
-      && (GET_CODE (op) == PARALLEL || GET_CODE (op) == CONST_VECTOR)
-      && sh_rep_vec (op, mode))
-    return 1;
-  if (TARGET_SHMEDIA && 1
-      && GET_CODE (op) == SUBREG && GET_MODE (op) == mode
-      && SUBREG_REG (op) == const0_rtx && subreg_lowpart_p (op))
-    /* FIXME */ abort (); /* return 1; */
-
   return general_operand (op, mode);
 })
 
@@ -615,10 +408,6 @@
   /* Only pre dec allowed.  */
   if (MEM_P (op) && GET_CODE (XEXP (op, 0)) == POST_INC)
     return 0;
-  if (mode == DImode && TARGET_SHMEDIA && GET_CODE (op) == SUBREG
-      && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) < 8
-      && ! (reload_in_progress || reload_completed))
-    return 0;
 
   if (mode == GET_MODE (op)
       && (MEM_P (op) || (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))))
@@ -626,10 +415,6 @@
       rtx mem_rtx = MEM_P (op) ? op : SUBREG_REG (op);
       rtx x = XEXP (mem_rtx, 0);
 
-      if (! ALLOW_INDEXED_ADDRESS
-	  && GET_CODE (x) == PLUS && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1)))
-	return false;
-
       if (GET_CODE (x) == PLUS)
 	{
 	  rtx y = XEXP (x, 0);
@@ -677,22 +462,6 @@
   return general_operand (op, mode);
 })
 
-;; Returns 1 if OP is a POST_INC on stack pointer register.
-(define_predicate "sh_no_delay_pop_operand"
-  (match_code "mem")
-{
-  rtx inside;
-  inside = XEXP (op, 0);
-
-  if (GET_CODE (op) == MEM && GET_MODE (op) == SImode 
-      && GET_CODE (inside) == POST_INC 
-      && GET_CODE (XEXP (inside, 0)) == REG
-      && REGNO (XEXP (inside, 0)) == SP_REG)
-    return 1;
-
-  return 0;
-})
-
 ;; Returns 1 if OP is a MEM that can be source of a simple move operation.
 (define_predicate "unaligned_load_operand"
   (match_code "mem")
@@ -741,65 +510,11 @@
 	 && sh_legitimate_index_p (mode, XEXP (plus0_rtx, 1), TARGET_SH2A, true);
 })
 
-;; Returns true if OP is some kind of greater comparision.
-(define_predicate "greater_comparison_operator"
-  (match_code "gt,ge,gtu,geu"))
-
-;; Returns true if OP is an operand suitable for shmedia reload_inqi and
-;; reload_inhi insns.
-(define_predicate "inqhi_operand"
-  (match_code "truncate")
-{
-  if (GET_CODE (op) != TRUNCATE || mode != GET_MODE (op))
-    return 0;
-  op = XEXP (op, 0);
-  /* Can't use true_regnum here because copy_cost wants to know about
-     SECONDARY_INPUT_RELOAD_CLASS.  */
-  return REG_P (op) && FP_REGISTER_P (REGNO (op));
-})
-
-;; Returns true if OP is a general purpose integer register.
-;; This predicate is currently unused.
-;;(define_special_predicate "int_gpr_dest"
-;;  (match_code "subreg,reg")
-;;{
-;;  machine_mode op_mode = GET_MODE (op);
-;;
-;;  if (GET_MODE_CLASS (op_mode) != MODE_INT
-;;      || GET_MODE_SIZE (op_mode) >= UNITS_PER_WORD)
-;;    return 0;
-;;  if (! reload_completed)
-;;    return 0;
-;;  return true_regnum (op) <= LAST_GENERAL_REG;
-;;})
-
-;; Returns true if OP is some kind of less comparison.
-(define_predicate "less_comparison_operator"
-  (match_code "lt,le,ltu,leu"))
-
 ;; Returns 1 if OP is a valid source operand for a logical operation.
 (define_predicate "logical_operand"
   (match_code "subreg,reg,const_int")
 {
-  if (TARGET_SHMEDIA
-      && mode != DImode && GET_CODE (op) == SUBREG
-      && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) > 4)
-    return 0;
-
-  if (arith_reg_operand (op, mode))
-    return 1;
-
-  if (TARGET_SHMEDIA)
-    {
-      if (satisfies_constraint_I10 (op))
-	return 1;
-      else
-	return 0;
-    }
-  else if (satisfies_constraint_K08 (op))
-    return 1;
-
-  return 0;
+  return arith_reg_operand (op, mode) || satisfies_constraint_K08 (op);
 })
 
 ;; Returns true if OP is a valid constant source operand for a logical
@@ -813,70 +528,20 @@
 (define_predicate "logical_and_operand"
   (match_code "subreg,reg,const_int")
 {
-  if (logical_operand (op, mode))
-    return 1;
-
-  if (! TARGET_SHMEDIA
-      && (satisfies_constraint_Jmb (op) || satisfies_constraint_Jmw (op)))
-    return 1;
-
-  return 0;
+  return logical_operand (op, mode) || satisfies_constraint_Jmb (op)
+	 || satisfies_constraint_Jmw (op);
 })
 
 ;; Returns true if OP is a logical operator.
 (define_predicate "logical_operator"
   (match_code "and,ior,xor"))
 
-;; Like arith_reg_operand, but for register source operands of narrow
-;; logical SHMEDIA operations: forbid subregs of DImode / TImode regs.
 (define_predicate "logical_reg_operand"
   (match_code "subreg,reg")
 {
-  if (TARGET_SHMEDIA
-      && GET_CODE (op) == SUBREG
-      && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) > 4
-      && mode != DImode)
-    return 0;
   return arith_reg_operand (op, mode);
 })
 
-;; Returns true if OP is a valid bit offset value for the shmedia mextr insns.
-(define_predicate "mextr_bit_offset"
-  (match_code "const_int")
-{
-  HOST_WIDE_INT i;
-
-  if (!CONST_INT_P (op))
-    return 0;
-  i = INTVAL (op);
-  return i >= 1 * 8 && i <= 7 * 8 && (i & 7) == 0;
-})
-
-;; Returns true if OP is a constant -1, 0 or an zero extended register that
-;; can be used as an operator in the *subsi3_media insn.
-(define_predicate "minuend_operand"
-  (match_code "subreg,reg,truncate,const_int")
-{
-  return op == constm1_rtx || extend_reg_or_0_operand (op, mode);
-})
-
-;; Returns true if OP is a noncommutative floating point operator.
-;; This predicate is currently unused.
-;;(define_predicate "noncommutative_float_operator"
-;;  (and (match_code "minus,div")
-;;       (match_test "GET_MODE (op) == mode")))
-
-;; UNORDERED is only supported on SHMEDIA.
-
-(define_predicate "sh_float_comparison_operator"
-  (ior (match_operand 0 "ordered_comparison_operator")
-       (and (match_test "TARGET_SHMEDIA")
-	    (match_code "unordered"))))
-
-(define_predicate "shmedia_cbranch_comparison_operator"
-  (ior (match_operand 0 "equality_comparison_operator")
-       (match_operand 0 "greater_comparison_operator")))
-
 ;; Returns true if OP is a constant vector.
 (define_predicate "sh_const_vec"
   (match_code "const_vector")
@@ -927,16 +592,6 @@
   return 1;
 })
 
-;; Like register_operand, but take into account that SHMEDIA can use
-;; the constant zero like a general register.
-(define_predicate "sh_register_operand"
-  (match_code "reg,subreg,const_int,const_double")
-{
-  if (op == CONST0_RTX (mode) && TARGET_SHMEDIA)
-    return 1;
-  return register_operand (op, mode);
-})
-
 ;; Returns true if OP is a vector which is composed of one element that is
 ;; repeated.
 (define_predicate "sh_rep_vec"
@@ -972,38 +627,8 @@
 {
   /* Allow T_REG as shift count for dynamic shifts, although it is not
      really possible.  It will then be copied to a general purpose reg.  */
-  if (! TARGET_SHMEDIA)
-    return const_int_operand (op, mode) || arith_reg_operand (op, mode)
-	   || (TARGET_DYNSHIFT && t_reg_operand (op, mode));
-
-  return (CONSTANT_P (op)
-	  ? (CONST_INT_P (op)
-	     ? (unsigned) INTVAL (op) < GET_MODE_BITSIZE (mode)
-	     : nonmemory_operand (op, mode))
-	  : shift_count_reg_operand (op, mode));
-})
-
-;; Returns true if OP is a valid shift count operand in a register which can
-;; be used by shmedia shift insns.
-(define_predicate "shift_count_reg_operand"
-  (match_code "subreg,reg,zero_extend,sign_extend")
-{
-  if ((GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND
-       || (GET_CODE (op) == SUBREG && SUBREG_BYTE (op) == 0))
-      && (mode == VOIDmode || mode == GET_MODE (op))
-      && GET_MODE_BITSIZE (GET_MODE (XEXP (op, 0))) >= 6
-      && GET_MODE_CLASS (GET_MODE (XEXP (op, 0))) == MODE_INT)
-    {
-      mode = VOIDmode;
-      do
-	op = XEXP (op, 0);
-      while ((GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND
-	      || GET_CODE (op) == TRUNCATE)
-	     && GET_MODE_BITSIZE (GET_MODE (XEXP (op, 0))) >= 6
-	     && GET_MODE_CLASS (GET_MODE (XEXP (op, 0))) == MODE_INT);
-
-    }
-  return arith_reg_operand (op, mode);
+  return const_int_operand (op, mode) || arith_reg_operand (op, mode)
+	 || (TARGET_DYNSHIFT && t_reg_operand (op, mode));
 })
 
 ;; Predicates for matching operands that are constant shift
@@ -1029,105 +654,10 @@
        (ior (match_test "! satisfies_constraint_P27 (op)")
 	    (match_test "satisfies_constraint_M (op)"))))
 
-;; Returns true if OP is some kind of a shift operator.
-(define_predicate "shift_operator"
-  (match_code "ashift,ashiftrt,lshiftrt"))
-
 ;; Returns true if OP is a symbol reference.
 (define_predicate "symbol_ref_operand"
   (match_code "symbol_ref"))
 
-;; Same as target_reg_operand, except that label_refs and symbol_refs
-;; are accepted before reload.
-(define_special_predicate "target_operand"
-  (match_code "subreg,reg,label_ref,symbol_ref,const,unspec")
-{
-  if (mode != VOIDmode && mode != Pmode)
-    return 0;
-
-  if ((GET_MODE (op) == Pmode || GET_MODE (op) == VOIDmode)
-      && satisfies_constraint_Csy (op))
-    return ! reload_completed;
-
-  return target_reg_operand (op, mode);
-})
-
-;; A predicate that accepts pseudos and branch target registers.
-(define_special_predicate "target_reg_operand"
-  (match_code "subreg,reg")
-{
-  if (mode == VOIDmode
-     ? GET_MODE (op) != Pmode && GET_MODE (op) != PDImode
-     : mode != GET_MODE (op))
-    return 0;
-
-  if (GET_CODE (op) == SUBREG)
-    op = XEXP (op, 0);
-
-  if (!REG_P (op))
-    return 0;
-
-  /* We must protect ourselves from matching pseudos that are virtual
-     register, because they will eventually be replaced with hardware
-     registers that aren't branch-target registers.  */
-  if (REGNO (op) > LAST_VIRTUAL_REGISTER
-      || TARGET_REGISTER_P (REGNO (op)))
-    return 1;
-
-  return 0;
-})
-
-;; Returns true if OP is a valid operand for the shmedia mperm.w insn.
-(define_special_predicate "trunc_hi_operand"
-  (match_code "subreg,reg,truncate")
-{
-  machine_mode op_mode = GET_MODE (op);
-
-  if (op_mode != SImode && op_mode != DImode
-      && op_mode != V4HImode && op_mode != V2SImode)
-    return 0;
-  return extend_reg_operand (op, mode);
-})
-
-;; Returns true if OP is an address suitable for an unaligned access
-;; instruction.
-(define_special_predicate "ua_address_operand"
-  (match_code "subreg,reg,plus")
-{
-  if (GET_CODE (op) == PLUS
-      && (! satisfies_constraint_I06 (XEXP (op, 1))))
-    return 0;
-  return address_operand (op, QImode);
-})
-
-;; Returns true if OP is a valid offset for an unaligned memory address.
-(define_predicate "ua_offset"
-  (match_code "const_int")
-{
-  return satisfies_constraint_I06 (op);
-})
-
-;; Returns true if OP is a floating point operator with one operand.
-(define_predicate "unary_float_operator"
-  (and (match_code "abs,neg,sqrt")
-       (match_test "GET_MODE (op) == mode")))
-
-;; Return 1 if OP is a valid source operand for xor.
-(define_predicate "xor_operand"
-  (match_code "subreg,reg,const_int")
-{
-  if (CONST_INT_P (op))
-    return (TARGET_SHMEDIA
-	    ? (satisfies_constraint_I06 (op)
-	       || (!can_create_pseudo_p () && INTVAL (op) == 0xff))
-	    : satisfies_constraint_K08 (op));
-  if (TARGET_SHMEDIA
-      && mode != DImode && GET_CODE (op) == SUBREG
-      && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) > 4)
-    return 0;
-  return arith_reg_operand (op, mode);
-})
-
 (define_predicate "bitwise_memory_operand"
   (match_code "mem")
 {

gcc/config/sh/sh-c.c

@@ -119,15 +119,6 @@ sh_cpu_cpp_builtins (cpp_reader* pfile)
 		      : TARGET_FPU_ANY ? "__SH4_SINGLE_ONLY__"
 		      : "__SH4_NOFPU__");
       break;
-    case PROCESSOR_SH5:
-      {
-	builtin_define_with_value ("__SH5__",
-				   TARGET_SHMEDIA64 ? "64" : "32", 0);
-	builtin_define_with_value ("__SHMEDIA__",
-				   TARGET_SHMEDIA ? "1" : "0", 0);
-	if (! TARGET_FPU_DOUBLE)
-	  builtin_define ("__SH4_NOFPU__");
-      }
     }
   if (TARGET_FPU_ANY)
     builtin_define ("__SH_FPU_ANY__");

gcc/config/sh/sh-protos.h

@@ -124,7 +124,6 @@ extern enum rtx_code prepare_cbranch_operands (rtx *, machine_mode mode,
 extern void expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int);
 extern bool expand_cbranchdi4 (rtx *operands, enum rtx_code comparison);
 extern void sh_emit_scc_to_t (enum rtx_code, rtx, rtx);
-extern rtx sh_emit_cheap_store_flag (machine_mode, enum rtx_code, rtx, rtx);
 extern void sh_emit_compare_and_branch (rtx *, machine_mode);
 extern void sh_emit_compare_and_set (rtx *, machine_mode);
 extern bool sh_ashlsi_clobbers_t_reg_p (rtx);
@@ -140,7 +139,6 @@ extern bool gen_shl_and (rtx, rtx, rtx, rtx);
 extern int shl_sext_kind (rtx, rtx, int *);
 extern int shl_sext_length (rtx);
 extern bool gen_shl_sext (rtx, rtx, rtx, rtx);
-extern rtx gen_datalabel_ref (rtx);
 extern int regs_used (rtx, int);
 extern void fixup_addr_diff_vecs (rtx_insn *);
 extern int get_dest_uid (rtx, int);
@@ -149,8 +147,6 @@ extern enum tls_model tls_symbolic_operand (rtx, machine_mode);
 extern bool system_reg_operand (rtx, machine_mode);
 extern bool reg_unused_after (rtx, rtx_insn *);
 extern int sh_insn_length_adjustment (rtx_insn *);
-extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx);
-extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx);
 extern bool sh_expand_t_scc (rtx *);
 extern rtx sh_gen_truncate (machine_mode, rtx, int);
 extern bool sh_vector_mode_supported_p (machine_mode);

gcc/config/sh/sh.h

@@ -74,28 +74,10 @@ extern int code_for_indirect_jump_scratch;
    FPU is disabled (which makes it compatible with SH4al-dsp).  */
 #define TARGET_SH4A_FP (TARGET_SH4A && TARGET_FPU_ANY)
 
-/* Nonzero if we should generate code using the SHcompact instruction
-   set and 32-bit ABI.  */
-#define TARGET_SHCOMPACT (TARGET_SH5 && TARGET_SH1)
-
-/* Nonzero if we should generate code using the SHmedia instruction
-   set and ABI.  */
-#define TARGET_SHMEDIA (TARGET_SH5 && ! TARGET_SH1)
-
-/* Nonzero if we should generate code using the SHmedia ISA and 32-bit
-   ABI.  */
-#define TARGET_SHMEDIA32 (TARGET_SH5 && ! TARGET_SH1 && TARGET_SH_E)
-
-/* Nonzero if we should generate code using the SHmedia ISA and 64-bit
-   ABI.  */
-#define TARGET_SHMEDIA64 (TARGET_SH5 && ! TARGET_SH1 && ! TARGET_SH_E)
-
-/* Nonzero if we should generate code using SHmedia FPU instructions.  */
-#define TARGET_SHMEDIA_FPU (TARGET_SHMEDIA && TARGET_FPU_DOUBLE)
 
 /* This is not used by the SH2E calling convention  */
 #define TARGET_VARARGS_PRETEND_ARGS(FUN_DECL) \
-  (TARGET_SH1 && ! TARGET_SH2E && ! TARGET_SH5 \
+  (TARGET_SH1 && ! TARGET_SH2E \
    && ! (TARGET_HITACHI || sh_attr_renesas_p (FUN_DECL)))
 
 #ifndef TARGET_CPU_DEFAULT
@@ -108,19 +90,6 @@ extern int code_for_indirect_jump_scratch;
 #define SUPPORT_SH2A_SINGLE 1
 #endif
 
-#define TARGET_DIVIDE_INV \
-  (sh_div_strategy == SH_DIV_INV || sh_div_strategy == SH_DIV_INV_MINLAT \
-   || sh_div_strategy == SH_DIV_INV20U || sh_div_strategy == SH_DIV_INV20L \
-   || sh_div_strategy == SH_DIV_INV_CALL \
-   || sh_div_strategy == SH_DIV_INV_CALL2 || sh_div_strategy == SH_DIV_INV_FP)
-#define TARGET_DIVIDE_FP (sh_div_strategy == SH_DIV_FP)
-#define TARGET_DIVIDE_INV_FP (sh_div_strategy == SH_DIV_INV_FP)
-#define TARGET_DIVIDE_CALL2 (sh_div_strategy == SH_DIV_CALL2)
-#define TARGET_DIVIDE_INV_MINLAT (sh_div_strategy == SH_DIV_INV_MINLAT)
-#define TARGET_DIVIDE_INV20U (sh_div_strategy == SH_DIV_INV20U)
-#define TARGET_DIVIDE_INV20L (sh_div_strategy == SH_DIV_INV20L)
-#define TARGET_DIVIDE_INV_CALL (sh_div_strategy == SH_DIV_INV_CALL)
-#define TARGET_DIVIDE_INV_CALL2 (sh_div_strategy == SH_DIV_INV_CALL2)
 #define TARGET_DIVIDE_CALL_DIV1 (sh_div_strategy == SH_DIV_CALL_DIV1)
 #define TARGET_DIVIDE_CALL_FP (sh_div_strategy == SH_DIV_CALL_FP)
 #define TARGET_DIVIDE_CALL_TABLE (sh_div_strategy == SH_DIV_CALL_TABLE)
@@ -151,12 +120,6 @@ extern int code_for_indirect_jump_scratch;
 #define SELECT_SH4A_SINGLE_ONLY  (MASK_SH4A | SELECT_SH4_SINGLE_ONLY)
 #define SELECT_SH4A		 (MASK_SH4A | SELECT_SH4)
 #define SELECT_SH4A_SINGLE	 (MASK_SH4A | SELECT_SH4_SINGLE)
-#define SELECT_SH5_64MEDIA	 (MASK_SH5 | MASK_SH4)
-#define SELECT_SH5_64MEDIA_NOFPU (MASK_SH5)
-#define SELECT_SH5_32MEDIA	 (MASK_SH5 | MASK_SH4 | MASK_SH_E)
-#define SELECT_SH5_32MEDIA_NOFPU (MASK_SH5 | MASK_SH_E)
-#define SELECT_SH5_COMPACT	 (MASK_SH5 | MASK_SH4 | SELECT_SH3E)
-#define SELECT_SH5_COMPACT_NOFPU (MASK_SH5 | SELECT_SH3)
 
 #if SUPPORT_SH1
 #define SUPPORT_SH2 1
@@ -192,25 +155,10 @@ extern int code_for_indirect_jump_scratch;
 #define SUPPORT_SH4A_SINGLE 1
 #endif
 
-#if SUPPORT_SH5_COMPAT
-#define SUPPORT_SH5_32MEDIA 1
-#endif
-
-#if SUPPORT_SH5_COMPACT_NOFPU
-#define SUPPORT_SH5_32MEDIA_NOFPU 1
-#endif
-
-#define SUPPORT_ANY_SH5_32MEDIA \
-  (SUPPORT_SH5_32MEDIA || SUPPORT_SH5_32MEDIA_NOFPU)
-#define SUPPORT_ANY_SH5_64MEDIA \
-  (SUPPORT_SH5_64MEDIA || SUPPORT_SH5_64MEDIA_NOFPU)
-#define SUPPORT_ANY_SH5 \
-  (SUPPORT_ANY_SH5_32MEDIA || SUPPORT_ANY_SH5_64MEDIA)
-
 /* Reset all target-selection flags.  */
 #define MASK_ARCH (MASK_SH1 | MASK_SH2 | MASK_SH3 | MASK_SH_E | MASK_SH4 \
 		   | MASK_HARD_SH2A | MASK_HARD_SH2A_DOUBLE | MASK_SH4A \
-		   | MASK_HARD_SH4 | MASK_FPU_SINGLE | MASK_SH5 \
+		   | MASK_HARD_SH4 | MASK_FPU_SINGLE \
 		   | MASK_FPU_SINGLE_ONLY)
 
 /* This defaults us to big-endian.  */
@@ -286,10 +234,7 @@ extern int code_for_indirect_jump_scratch;
 %{m2a-single:--isa=sh2a} \
 %{m2a-single-only:--isa=sh2a} \
 %{m2a-nofpu:--isa=sh2a-nofpu} \
-%{m5-compact*:--isa=SHcompact} \
-%{m5-32media*:--isa=SHmedia --abi=32} \
-%{m5-64media*:--isa=SHmedia --abi=64} \
-%{m4al:-dsp} %{mcut2-workaround:-cut2-workaround}"
+%{m4al:-dsp}"
 
 #define ASM_SPEC SH_ASM_SPEC
 
@@ -307,7 +252,7 @@ extern int code_for_indirect_jump_scratch;
 #if TARGET_CPU_DEFAULT & MASK_HARD_SH4 && !(TARGET_CPU_DEFAULT & MASK_SH_E)
 #define SUBTARGET_ASM_ISA_SPEC "%{!m1:%{!m2:%{!m3*:%{m4-nofpu|!m4*:%{!m5:-isa=sh4-nofpu}}}}}"
 #else
-/* If there were an -isa option for sh5-nofpu then it would also go here. */
+
 #define SUBTARGET_ASM_ISA_SPEC \
  "%{m4-nofpu:-isa=sh4-nofpu} " ASM_ISA_DEFAULT_SPEC
 #endif
@@ -325,24 +270,8 @@ extern int code_for_indirect_jump_scratch;
 #define LINK_EMUL_PREFIX "sh%{ml:l}"
 #endif
 
-#if TARGET_CPU_DEFAULT & MASK_SH5
-#if TARGET_CPU_DEFAULT & MASK_SH_E
-#define LINK_DEFAULT_CPU_EMUL "32"
-#if TARGET_CPU_DEFAULT & MASK_SH1
-#define ASM_ISA_SPEC_DEFAULT "--isa=SHcompact"
-#else
-#define ASM_ISA_SPEC_DEFAULT "--isa=SHmedia --abi=32"
-#endif /* MASK_SH1 */
-#else /* !MASK_SH_E */
-#define LINK_DEFAULT_CPU_EMUL "64"
-#define ASM_ISA_SPEC_DEFAULT "--isa=SHmedia --abi=64"
-#endif /* MASK_SH_E */
-#define ASM_ISA_DEFAULT_SPEC \
-" %{!m1:%{!m2*:%{!m3*:%{!m4*:%{!m5*:" ASM_ISA_SPEC_DEFAULT "}}}}}"
-#else /* !MASK_SH5 */
 #define LINK_DEFAULT_CPU_EMUL ""
 #define ASM_ISA_DEFAULT_SPEC ""
-#endif /* MASK_SH5 */
 
 #define SUBTARGET_LINK_EMUL_SUFFIX "%{mfdpic:_fd}"
 #define SUBTARGET_LINK_SPEC ""
@@ -352,9 +281,7 @@ extern int code_for_indirect_jump_scratch;
 
 #define SH_LINK_SPEC "\
 -m %(link_emul_prefix)\
-%{m5-compact*|m5-32media*:32}\
-%{m5-64media*:64}\
-%{!m1:%{!m2:%{!m3*:%{!m4*:%{!m5*:%(link_default_cpu_emul)}}}}}\
+%{!m1:%{!m2:%{!m3*:%{!m4*:%(link_default_cpu_emul)}}}}\
 %(subtarget_link_emul_suffix) \
 %{mrelax:-relax} %(subtarget_link_spec)"
 
@@ -419,7 +346,7 @@ enum sh_divide_strategy_e {
 extern enum sh_divide_strategy_e sh_div_strategy;
 
 #ifndef SH_DIV_STRATEGY_DEFAULT
-#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL
+#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL_DIV1
 #endif
 
 #define SUBTARGET_OVERRIDE_OPTIONS (void) 0
@@ -450,7 +377,7 @@ extern enum sh_divide_strategy_e sh_div_strategy;
 #define INT_TYPE_SIZE 32
 
 /* Width in bits of a `long'.  */
-#define LONG_TYPE_SIZE (TARGET_SHMEDIA64 ? 64 : 32)
+#define LONG_TYPE_SIZE (32)
 
 /* Width in bits of a `long long'.  */
 #define LONG_LONG_TYPE_SIZE 64
@@ -459,7 +386,7 @@ extern enum sh_divide_strategy_e sh_div_strategy;
 #define LONG_DOUBLE_TYPE_SIZE 64
 
 /* Width of a word, in units (bytes).  */
-#define UNITS_PER_WORD	(TARGET_SHMEDIA ? 8 : 4)
+#define UNITS_PER_WORD	(4)
 #define MIN_UNITS_PER_WORD 4
 
 /* Scaling factor for Dwarf data offsets for CFI information.
@@ -471,10 +398,10 @@ extern enum sh_divide_strategy_e sh_div_strategy;
 
 /* Width in bits of a pointer.
    See also the macro `Pmode' defined below.  */
-#define POINTER_SIZE  (TARGET_SHMEDIA64 ? 64 : 32)
+#define POINTER_SIZE  (32)
 
 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
-#define PARM_BOUNDARY  	(TARGET_SH5 ? 64 : 32)
+#define PARM_BOUNDARY  	(32)
 
 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 #define STACK_BOUNDARY  BIGGEST_ALIGNMENT
@@ -482,17 +409,16 @@ extern enum sh_divide_strategy_e sh_div_strategy;
 /* The log (base 2) of the cache line size, in bytes.  Processors prior to
    SH2 have no actual cache, but they fetch code in chunks of 4 bytes.
    The SH2/3 have 16 byte cache lines, and the SH4 has a 32 byte cache line */
-#define CACHE_LOG ((TARGET_HARD_SH4 || TARGET_SH5) ? 5 : TARGET_SH2 ? 4 : 2)
+#define CACHE_LOG (TARGET_HARD_SH4 ? 5 : TARGET_SH2 ? 4 : 2)
 
 /* ABI given & required minimum allocation boundary (in *bits*) for the
    code of a function.  */
-#define FUNCTION_BOUNDARY (16 << TARGET_SHMEDIA)
+#define FUNCTION_BOUNDARY (16)
 
 /* On SH5, the lowest bit is used to indicate SHmedia functions, so
    the vbit must go into the delta field of
    pointers-to-member-functions.  */
-#define TARGET_PTRMEMFUNC_VBIT_LOCATION \
-  (TARGET_SH5 ? ptrmemfunc_vbit_in_delta : ptrmemfunc_vbit_in_pfn)
+#define TARGET_PTRMEMFUNC_VBIT_LOCATION (ptrmemfunc_vbit_in_pfn)
 
 /* Alignment of field after `int : 0' in a structure.  */
 #define EMPTY_FIELD_BOUNDARY  32
@@ -501,7 +427,7 @@ extern enum sh_divide_strategy_e sh_div_strategy;
 #define BIGGEST_ALIGNMENT  (TARGET_ALIGN_DOUBLE ? 64 : 32)
 
 /* The best alignment to use in cases where we have a choice.  */
-#define FASTEST_ALIGNMENT (TARGET_SH5 ? 64 : 32)
+#define FASTEST_ALIGNMENT (32)
 
 /* Make strings word-aligned so strcpy from constants will be faster.  */
 #define CONSTANT_ALIGNMENT(EXP, ALIGN)	\
@@ -555,11 +481,11 @@ extern enum sh_divide_strategy_e sh_div_strategy;
 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
 
 /* The base two logarithm of the known minimum alignment of an insn length.  */
-#define INSN_LENGTH_ALIGNMENT(A_INSN)					\
-  (NONJUMP_INSN_P (A_INSN)						\
-   ? 1 << TARGET_SHMEDIA						\
-   : JUMP_P (A_INSN) || CALL_P (A_INSN)					\
-   ? 1 << TARGET_SHMEDIA						\
+#define INSN_LENGTH_ALIGNMENT(A_INSN)		\
+  (NONJUMP_INSN_P (A_INSN)			\
+   ? 1						\
+   : JUMP_P (A_INSN) || CALL_P (A_INSN)		\
+   ? 1						\
    : CACHE_LOG)
 
 /* Standard register usage.  */
@@ -680,14 +606,13 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 /* There are many other relevant definitions in sh.md's md_constants.  */
 
 #define FIRST_GENERAL_REG R0_REG
-#define LAST_GENERAL_REG (FIRST_GENERAL_REG + (TARGET_SHMEDIA ? 63 : 15))
+#define LAST_GENERAL_REG (FIRST_GENERAL_REG + (15))
 #define FIRST_FP_REG DR0_REG
-#define LAST_FP_REG  (FIRST_FP_REG + \
-		      (TARGET_SHMEDIA_FPU ? 63 : TARGET_SH2E ? 15 : -1))
+#define LAST_FP_REG  (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1))
 #define FIRST_XD_REG XD0_REG
 #define LAST_XD_REG  (FIRST_XD_REG + ((TARGET_SH4 && TARGET_FMOVD) ? 7 : -1))
 #define FIRST_TARGET_REG TR0_REG
-#define LAST_TARGET_REG  (FIRST_TARGET_REG + (TARGET_SHMEDIA ? 7 : -1))
+#define LAST_TARGET_REG  (FIRST_TARGET_REG + (-1))
 
 /* Registers that can be accessed through bank0 or bank1 depending on sr.md.  */
 #define FIRST_BANKED_REG R0_REG
@@ -727,14 +652,9 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 #define TARGET_REGISTER_P(REGNO) \
   ((int) (REGNO) >= FIRST_TARGET_REG && (int) (REGNO) <= LAST_TARGET_REG)
 
-#define SHMEDIA_REGISTER_P(REGNO) \
-  (GENERAL_REGISTER_P (REGNO) || FP_REGISTER_P (REGNO) \
-   || TARGET_REGISTER_P (REGNO))
-
-/* This is to be used in TARGET_CONDITIONAL_REGISTER_USAGE, to mark
-   registers that should be fixed.  */
 #define VALID_REGISTER_P(REGNO) \
-  (SHMEDIA_REGISTER_P (REGNO) || XD_REGISTER_P (REGNO) \
+  (GENERAL_REGISTER_P (REGNO) || FP_REGISTER_P (REGNO) \
+   || XD_REGISTER_P (REGNO) \
    || (REGNO) == AP_REG || (REGNO) == RAP_REG \
    || (REGNO) == FRAME_POINTER_REGNUM \
    || (TARGET_SH1 && (SPECIAL_REGISTER_P (REGNO) || (REGNO) == PR_REG)) \
@@ -743,11 +663,8 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 /* The mode that should be generally used to store a register by
    itself in the stack, or to load it back.  */
 #define REGISTER_NATURAL_MODE(REGNO) \
-  (FP_REGISTER_P (REGNO) ? SFmode \
-   : XD_REGISTER_P (REGNO) ? DFmode \
-   : TARGET_SHMEDIA && ! HARD_REGNO_CALL_PART_CLOBBERED ((REGNO), DImode) \
-   ? DImode \
-   : SImode)
+  (FP_REGISTER_P (REGNO) ? SFmode : XD_REGISTER_P (REGNO) ? DFmode : SImode)
+
 
 #define FIRST_PSEUDO_REGISTER 156
 
@@ -868,18 +785,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
   1,      1,      0,      0,						\
 }
 
-/* Only the lower 32-bits of R10-R14 are guaranteed to be preserved
-   across SHcompact function calls.  We can't tell whether a called
-   function is SHmedia or SHcompact, so we assume it may be when
-   compiling SHmedia code with the 32-bit ABI, since that's the only
-   ABI that can be linked with SHcompact code.  */
-#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) \
-  (TARGET_SHMEDIA32 \
-   && GET_MODE_SIZE (MODE) > 4 \
-   && (((REGNO) >= FIRST_GENERAL_REG + 10 \
-	&& (REGNO) <= FIRST_GENERAL_REG + 15) \
-       || TARGET_REGISTER_P (REGNO) \
-       || (REGNO) == PR_MEDIA_REG))
+#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) (false)
 
 /* Return number of consecutive hard regs needed starting at reg REGNO
    to hold something of mode MODE.
@@ -890,8 +796,6 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 #define HARD_REGNO_NREGS(REGNO, MODE) \
    (XD_REGISTER_P (REGNO) \
     ? ((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD - 1)) / (2*UNITS_PER_WORD)) \
-    : (TARGET_SHMEDIA && FP_REGISTER_P (REGNO)) \
-    ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD/2 - 1) / (UNITS_PER_WORD/2)) \
     : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
 
 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.  */
@@ -907,13 +811,8 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
    floating-point mode.  */
 #define MODES_TIEABLE_P(MODE1, MODE2) \
   ((MODE1) == (MODE2) \
-   || (TARGET_SHMEDIA \
-       && GET_MODE_SIZE (MODE1) == GET_MODE_SIZE (MODE2) \
-       && INTEGRAL_MODE_P (MODE1) && INTEGRAL_MODE_P (MODE2)) \
    || (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
-       && (TARGET_SHMEDIA ? ((GET_MODE_SIZE (MODE1) <= 4) \
-			      && (GET_MODE_SIZE (MODE2) <= 4)) \
-			  : ((MODE1) != SFmode && (MODE2) != SFmode))))
+       && (((MODE1) != SFmode && (MODE2) != SFmode))))
 
 /* Specify the modes required to caller save a given hard regno.  */
 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)	\
@@ -993,19 +892,13 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
 #define ARG_POINTER_REGNUM	AP_REG
 
 /* Register in which the static-chain is passed to a function.  */
-#define STATIC_CHAIN_REGNUM	(TARGET_SH5 ? 1 : 3)
+#define STATIC_CHAIN_REGNUM	(3)
 
 /* Don't default to pcc-struct-return, because we have already specified
    exactly how to return structures in the TARGET_RETURN_IN_MEMORY
    target hook.  */
 #define DEFAULT_PCC_STRUCT_RETURN 0
 
-#define SHMEDIA_REGS_STACK_ADJUST() \
-  (TARGET_SHCOMPACT && crtl->saves_all_registers \
-   ? (8 * (/* r28-r35 */ 8 + /* r44-r59 */ 16 + /* tr5-tr7 */ 3) \
-      + (TARGET_FPU_ANY ? 4 * (/* fr36 - fr63 */ 28) : 0)) \
-   : 0)
-
 
 /* Define the classes of registers for register constraints in the
    machine description.  Also define ranges of constants.
@@ -1177,20 +1070,13 @@ extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
    145,146,147,148,149,152,153,154,155  }
 
 /* The class value for index registers, and the one for base regs.  */
-#define INDEX_REG_CLASS \
-  (!ALLOW_INDEXED_ADDRESS ? NO_REGS : TARGET_SHMEDIA ? GENERAL_REGS : R0_REGS)
-#define BASE_REG_CLASS	 GENERAL_REGS
+#define INDEX_REG_CLASS R0_REGS
+#define BASE_REG_CLASS GENERAL_REGS
 
 /* Defines for sh.md and constraints.md.  */
 
 #define CONST_OK_FOR_I08(VALUE) (((HOST_WIDE_INT)(VALUE))>= -128 \
 				 && ((HOST_WIDE_INT)(VALUE)) <= 127)
-#define CONST_OK_FOR_I16(VALUE) (((HOST_WIDE_INT)(VALUE)) >= -32768 \
-				 && ((HOST_WIDE_INT)(VALUE)) <= 32767)
-
-#define CONST_OK_FOR_J16(VALUE) \
-  ((HOST_BITS_PER_WIDE_INT >= 64 && (VALUE) == (HOST_WIDE_INT) 0xffffffff) \
-   || (HOST_BITS_PER_WIDE_INT >= 64 && (VALUE) == (HOST_WIDE_INT) (HOST_WIDE_INT_M1U << 32)))
 
 #define CONST_OK_FOR_K08(VALUE) (((HOST_WIDE_INT)(VALUE))>= 0 \
 				 && ((HOST_WIDE_INT)(VALUE)) <= 255)
@@ -1204,10 +1090,7 @@ extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
    If TARGET_SHMEDIA, we need two FP registers per word.
    Otherwise we will need at most one register per word.  */
 #define CLASS_MAX_NREGS(CLASS, MODE) \
-    (TARGET_SHMEDIA \
-     && TEST_HARD_REG_BIT (reg_class_contents[CLASS], FIRST_FP_REG) \
-     ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD/2 - 1) / (UNITS_PER_WORD/2) \
-     : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
+  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 
 /* If defined, gives a class of registers that cannot be used as the
    operand of a SUBREG that changes the mode of the object illegally.
@@ -1222,17 +1105,17 @@ extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
    These macros are used only in other macro definitions below.  */
 #define NPARM_REGS(MODE) \
   (TARGET_FPU_ANY && (MODE) == SFmode \
-   ? (TARGET_SH5 ? 12 : 8) \
+   ? 8 \
    : (TARGET_SH4 || TARGET_SH2A_DOUBLE) \
      && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
 	 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
-   ? (TARGET_SH5 ? 12 : 8) \
-   : (TARGET_SH5 ? 8 : 4))
+   ? 8 \
+   : 4)
 
-#define FIRST_PARM_REG (FIRST_GENERAL_REG + (TARGET_SH5 ? 2 : 4))
-#define FIRST_RET_REG  (FIRST_GENERAL_REG + (TARGET_SH5 ? 2 : 0))
+#define FIRST_PARM_REG (FIRST_GENERAL_REG + 4)
+#define FIRST_RET_REG  (FIRST_GENERAL_REG + 0)
 
-#define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4))
+#define FIRST_FP_PARM_REG (FIRST_FP_REG + 4)
 #define FIRST_FP_RET_REG FIRST_FP_REG
 
 /* Define this if pushing a word on the stack
@@ -1261,10 +1144,8 @@ extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
 
 /* Value is the number of bytes of arguments automatically popped when
    calling a subroutine.
-   CUM is the accumulated argument list.
-
-   On SHcompact, the call trampoline pops arguments off the stack.  */
-#define CALL_POPS_ARGS(CUM) (TARGET_SHCOMPACT ? (CUM).stack_regs * 8 : 0)
+   CUM is the accumulated argument list.  */
+#define CALL_POPS_ARGS(CUM) (0)
 
 /* Some subroutine macros specific to this machine.  */
 
@@ -1337,93 +1218,19 @@ struct sh_args {
      by reference.  */
     int byref;
 
-  /* call_cookie is a bitmask used by call expanders, as well as
-     function prologue and epilogues, to allow SHcompact to comply
-     with the SH5 32-bit ABI, that requires 64-bit registers to be
-     used even though only the lower 32-bit half is visible in
-     SHcompact mode.  The strategy is to call SHmedia trampolines.
-
-     The alternatives for each of the argument-passing registers are
-     (a) leave it unchanged; (b) pop it off the stack; (c) load its
-     contents from the address in it; (d) add 8 to it, storing the
-     result in the next register, then (c); (e) copy it from some
-     floating-point register,
-
-     Regarding copies from floating-point registers, r2 may only be
-     copied from dr0.  r3 may be copied from dr0 or dr2.  r4 maybe
-     copied from dr0, dr2 or dr4.  r5 maybe copied from dr0, dr2,
-     dr4 or dr6.  r6 may be copied from dr0, dr2, dr4, dr6 or dr8.
-     r7 through to r9 may be copied from dr0, dr2, dr4, dr8, dr8 or
-     dr10.
-
-     The bit mask is structured as follows:
-
-     - 1 bit to tell whether to set up a return trampoline.
-
-     - 3 bits to count the number consecutive registers to pop off the
-       stack.
-
-     - 4 bits for each of r9, r8, r7 and r6.
-
-     - 3 bits for each of r5, r4, r3 and r2.
-
-     - 3 bits set to 0 (the most significant ones)
-
-        3           2            1           0
-       1098 7654 3210 9876 5432 1098 7654 3210
-       FLPF LPFL PFLP FFLP FFLP FFLP FFLP SSST
-       2223 3344 4555 6666 7777 8888 9999 SSS-
-
-     - If F is set, the register must be copied from an FP register,
-       whose number is encoded in the remaining bits.
-
-     - Else, if L is set, the register must be loaded from the address
-       contained in it.  If the P bit is *not* set, the address of the
-       following dword should be computed first, and stored in the
-       following register.
-
-     - Else, if P is set, the register alone should be popped off the
-       stack.
-
-     - After all this processing, the number of registers represented
-       in SSS will be popped off the stack.  This is an optimization
-       for pushing/popping consecutive registers, typically used for
-       varargs and large arguments partially passed in registers.
-
-     - If T is set, a return trampoline will be set up for 64-bit
-     return values to be split into 2 32-bit registers.  */
-    long call_cookie;
-
   /* This is set to nonzero when the call in question must use the Renesas ABI,
      even without the -mrenesas option.  */
     int renesas_abi;
 };
 
-#define CALL_COOKIE_RET_TRAMP_SHIFT 0
-#define CALL_COOKIE_RET_TRAMP(VAL) ((VAL) << CALL_COOKIE_RET_TRAMP_SHIFT)
-#define CALL_COOKIE_STACKSEQ_SHIFT 1
-#define CALL_COOKIE_STACKSEQ(VAL) ((VAL) << CALL_COOKIE_STACKSEQ_SHIFT)
-#define CALL_COOKIE_STACKSEQ_GET(COOKIE) \
-  (((COOKIE) >> CALL_COOKIE_STACKSEQ_SHIFT) & 7)
-#define CALL_COOKIE_INT_REG_SHIFT(REG) \
-  (4 * (7 - (REG)) + (((REG) <= 2) ? ((REG) - 2) : 1) + 3)
-#define CALL_COOKIE_INT_REG(REG, VAL) \
-  ((VAL) << CALL_COOKIE_INT_REG_SHIFT (REG))
-#define CALL_COOKIE_INT_REG_GET(COOKIE, REG) \
-  (((COOKIE) >> CALL_COOKIE_INT_REG_SHIFT (REG)) & ((REG) < 4 ? 7 : 15))
-
 #define CUMULATIVE_ARGS  struct sh_args
 
 #define GET_SH_ARG_CLASS(MODE) \
   ((TARGET_FPU_ANY && (MODE) == SFmode) \
    ? SH_ARG_FLOAT \
-   /* There's no mention of complex float types in the SH5 ABI, so we
-      should presumably handle them as aggregate types.  */ \
-   : TARGET_SH5 && GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
-   ? SH_ARG_INT \
    : TARGET_FPU_DOUBLE && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
 			   || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
-   ? SH_ARG_FLOAT : SH_ARG_INT)
+     ? SH_ARG_FLOAT : SH_ARG_INT)
 
 /* Initialize a variable CUM of type CUMULATIVE_ARGS
    for a call to a function whose data type is FNTYPE.
@@ -1458,78 +1265,11 @@ struct sh_args {
    foo (float a, __complex float b); a: fr5 b.real: fr4 b.imag: fr7  */
 #define FUNCTION_ARG_SCmode_WART 1
 
-/* If an argument of size 5, 6 or 7 bytes is to be passed in a 64-bit
-   register in SHcompact mode, it must be padded in the most
-   significant end.  This means that passing it by reference wouldn't
-   pad properly on a big-endian machine.  In this particular case, we
-   pass this argument on the stack, in a way that the call trampoline
-   will load its value into the appropriate register.  */
-#define SHCOMPACT_FORCE_ON_STACK(MODE,TYPE) \
-  ((MODE) == BLKmode \
-   && TARGET_SHCOMPACT \
-   && TARGET_BIG_ENDIAN \
-   && int_size_in_bytes (TYPE) > 4 \
-   && int_size_in_bytes (TYPE) < 8)
-
 /* Minimum alignment for an argument to be passed by callee-copy
    reference.  We need such arguments to be aligned to 8 byte
    boundaries, because they'll be loaded using quad loads.  */
 #define SH_MIN_ALIGN_FOR_CALLEE_COPY (8 * BITS_PER_UNIT)
 
-/* The SH5 ABI requires floating-point arguments to be passed to
-   functions without a prototype in both an FP register and a regular
-   register or the stack.  When passing the argument in both FP and
-   general-purpose registers, list the FP register first.  */
-#define SH5_PROTOTYPELESS_FLOAT_ARG(CUM,MODE) \
-  (gen_rtx_PARALLEL							\
-   ((MODE),								\
-    gen_rtvec (2,							\
-	       gen_rtx_EXPR_LIST					\
-	       (VOIDmode,						\
-		((CUM).arg_count[(int) SH_ARG_INT] < NPARM_REGS (SImode) \
-		 ? gen_rtx_REG ((MODE), FIRST_FP_PARM_REG		\
-				+ (CUM).arg_count[(int) SH_ARG_FLOAT])	\
-		 : NULL_RTX),						\
-		const0_rtx),						\
-	       gen_rtx_EXPR_LIST					\
-	       (VOIDmode,						\
-		((CUM).arg_count[(int) SH_ARG_INT] < NPARM_REGS (SImode) \
-		 ? gen_rtx_REG ((MODE), FIRST_PARM_REG			\
-				+ (CUM).arg_count[(int) SH_ARG_INT])	\
-		 : gen_rtx_REG ((MODE), FIRST_FP_PARM_REG		\
-				+ (CUM).arg_count[(int) SH_ARG_FLOAT])), \
-		const0_rtx))))
-
-/* The SH5 ABI requires regular registers or stack slots to be
-   reserved for floating-point arguments.  Registers are taken care of
-   in FUNCTION_ARG_ADVANCE, but stack slots must be reserved here.
-   Unfortunately, there's no way to just reserve a stack slot, so
-   we'll end up needlessly storing a copy of the argument in the
-   stack.  For incoming arguments, however, the PARALLEL will be
-   optimized to the register-only form, and the value in the stack
-   slot won't be used at all.  */
-#define SH5_PROTOTYPED_FLOAT_ARG(CUM,MODE,REG) \
-  ((CUM).arg_count[(int) SH_ARG_INT] < NPARM_REGS (SImode)		\
-   ? gen_rtx_REG ((MODE), (REG))					\
-   : gen_rtx_PARALLEL ((MODE),						\
-		       gen_rtvec (2,					\
-				  gen_rtx_EXPR_LIST			\
-				  (VOIDmode, NULL_RTX,			\
-				   const0_rtx),				\
-				  gen_rtx_EXPR_LIST			\
-				  (VOIDmode, gen_rtx_REG ((MODE),	\
-							  (REG)),	\
-				   const0_rtx))))
-
-#define SH5_WOULD_BE_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
-  (TARGET_SH5							\
-   && ((MODE) == BLKmode || (MODE) == TImode || (MODE) == CDImode \
-       || (MODE) == DCmode) \
-   && ((CUM).arg_count[(int) SH_ARG_INT]			\
-       + (((MODE) == BLKmode ? int_size_in_bytes (TYPE)		\
-			     : GET_MODE_SIZE (MODE))		\
-	  + 7) / 8) > NPARM_REGS (SImode))
-
 /* Perform any needed actions needed for a function that is receiving a
    variable number of arguments.  */
 
@@ -1539,19 +1279,10 @@ struct sh_args {
    from the trapa instruction.  */
 #define FUNCTION_PROFILER(STREAM,LABELNO)			\
 {								\
-  if (TARGET_SHMEDIA)						\
-    {								\
-      fprintf((STREAM), "\tmovi\t33,r0\n");			\
-      fprintf((STREAM), "\ttrapa\tr0\n");			\
-      asm_fprintf((STREAM), "\t.long\t%LLP%d\n", (LABELNO));	\
-    }								\
-  else								\
-    {								\
-      fprintf((STREAM), "\t.align\t2\n");			\
-      fprintf((STREAM), "\ttrapa\t#33\n");			\
-      fprintf((STREAM), "\t.align\t2\n");			\
-      asm_fprintf((STREAM), "\t.long\t%LLP%d\n", (LABELNO));	\
-    }								\
+  fprintf((STREAM), "\t.align\t2\n");				\
+  fprintf((STREAM), "\ttrapa\t#33\n");				\
+  fprintf((STREAM), "\t.align\t2\n");				\
+  asm_fprintf((STREAM), "\t.long\t%LLP%d\n", (LABELNO));	\
 }
 
 /* Define this macro if the code for function profiling should come
@@ -1575,14 +1306,13 @@ struct sh_args {
    6 000c 00000000 	l2:	.long   function  */
 
 /* Length in units of the trampoline for entering a nested function.  */
-#define TRAMPOLINE_SIZE \
-  (TARGET_SHMEDIA64 ? 40 : TARGET_SH5 ? 24 : TARGET_FDPIC ? 32 : 16)
+#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : 16)
 
 /* Alignment required for a trampoline in bits.  */
 #define TRAMPOLINE_ALIGNMENT \
   ((CACHE_LOG < 3 \
-    || (optimize_size && ! (TARGET_HARD_SH4 || TARGET_SH5))) ? 32 \
-   : TARGET_SHMEDIA ? 256 : 64)
+    || (optimize_size && ! (TARGET_HARD_SH4))) ? 32 \
+   : 64)
 
 /* A C expression whose value is RTL representing the value of the return
    address for the frame COUNT steps up from the current frame.
@@ -1596,8 +1326,7 @@ struct sh_args {
    prologue.  This RTL is either a REG, indicating that the return
    value is saved in REG, or a MEM representing a location in
    the stack.  */
-#define INCOMING_RETURN_ADDR_RTX \
-  gen_rtx_REG (Pmode, TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG)
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, PR_REG)
 
 /* Addressing modes, and classification of registers for them.  */
 #define HAVE_POST_INCREMENT  TARGET_SH1
@@ -1627,10 +1356,7 @@ struct sh_args {
   (GENERAL_OR_AP_REGISTER_P (REGNO) \
    || GENERAL_OR_AP_REGISTER_P (reg_renumber[(REGNO)]))
 #define REGNO_OK_FOR_INDEX_P(REGNO) \
-  (TARGET_SHMEDIA \
-   ? (GENERAL_REGISTER_P (REGNO) \
-      || GENERAL_REGISTER_P ((unsigned) reg_renumber[(REGNO)])) \
-   : (REGNO) == R0_REG || (unsigned) reg_renumber[(REGNO)] == R0_REG)
+  ((REGNO) == R0_REG || (unsigned) reg_renumber[(REGNO)] == R0_REG)
 
 /* True if SYMBOL + OFFSET constants must refer to something within
    SYMBOL's section.  */
@@ -1655,14 +1381,12 @@ struct sh_args {
 
 /* Nonzero if X is a reg that can be used as an index.  */
 #define REG_OK_FOR_INDEX_P(X, STRICT)			\
-  ((TARGET_SHMEDIA ? GENERAL_REGISTER_P (REGNO (X))	\
-    : REGNO (X) == R0_REG)				\
+  ((REGNO (X) == R0_REG)				\
    || (!STRICT && REGNO (X) >= FIRST_PSEUDO_REGISTER))
 
 /* Nonzero if X/OFFSET is a reg that can be used as an index.  */
 #define SUBREG_OK_FOR_INDEX_P(X, OFFSET, STRICT)	\
-  ((TARGET_SHMEDIA ? GENERAL_REGISTER_P (REGNO (X))	\
-    : REGNO (X) == R0_REG && OFFSET == 0)		\
+  ((REGNO (X) == R0_REG && OFFSET == 0)			\
    || (!STRICT && REGNO (X) >= FIRST_PSEUDO_REGISTER))
 
 /* Macros for extra constraints.  */
@@ -1683,13 +1407,6 @@ struct sh_args {
 	   && !PIC_ADDR_P (OP)						\
 	   && GET_CODE (OP) != LABEL_REF)))
 
-/* Check whether OP is a datalabel unspec.  */
-#define DATALABEL_REF_NO_CONST_P(OP) \
-  (GET_CODE (OP) == UNSPEC \
-   && XINT ((OP), 1) == UNSPEC_DATALABEL \
-   && XVECLEN ((OP), 0) == 1 \
-   && GET_CODE (XVECEXP ((OP), 0, 0)) == LABEL_REF)
-
 #define GOT_ENTRY_P(OP) \
   (GET_CODE (OP) == CONST && GET_CODE (XEXP ((OP), 0)) == UNSPEC \
    && XINT (XEXP ((OP), 0), 1) == UNSPEC_GOT)
@@ -1721,24 +1438,16 @@ struct sh_args {
   (GET_CODE (OP) == LABEL_REF || GET_CODE (OP) == SYMBOL_REF \
    || (GET_CODE (OP) == CONST \
        && (GET_CODE (XEXP ((OP), 0)) == LABEL_REF \
-	   || GET_CODE (XEXP ((OP), 0)) == SYMBOL_REF \
-	   || DATALABEL_REF_NO_CONST_P (XEXP ((OP), 0)))) \
+	   || GET_CODE (XEXP ((OP), 0)) == SYMBOL_REF)) \
    || (GET_CODE (OP) == CONST && GET_CODE (XEXP ((OP), 0)) == PLUS \
        && (GET_CODE (XEXP (XEXP ((OP), 0), 0)) == SYMBOL_REF \
-	   || GET_CODE (XEXP (XEXP ((OP), 0), 0)) == LABEL_REF \
-	   || DATALABEL_REF_NO_CONST_P (XEXP (XEXP ((OP), 0), 0))) \
+	   || GET_CODE (XEXP (XEXP ((OP), 0), 0)) == LABEL_REF) \
        && CONST_INT_P (XEXP (XEXP ((OP), 0), 1))))
 
 #define PIC_REFERENCE_P(OP) \
   (GOT_ENTRY_P (OP) || GOTPLT_ENTRY_P (OP) \
    || GOTOFF_P (OP) || PIC_ADDR_P (OP))
 
-#define MOVI_SHORI_BASE_OPERAND_P(OP) \
-  (flag_pic \
-   ? (GOT_ENTRY_P (OP) || GOTPLT_ENTRY_P (OP)  || GOTOFF_P (OP) \
-      || PCREL_SYMOFF_P (OP)) \
-   : NON_PIC_REFERENCE_P (OP))
-
 #define MAYBE_BASE_REGISTER_RTX_P(X, STRICT)			\
   ((REG_P (X) && REG_OK_FOR_BASE_P (X, STRICT))	\
    || (GET_CODE (X) == SUBREG					\
@@ -1766,8 +1475,6 @@ struct sh_args {
 #define INDEX_REGISTER_RTX_P(X) MAYBE_INDEX_REGISTER_RTX_P(X, false)
 #endif
 
-#define ALLOW_INDEXED_ADDRESS \
-  ((!TARGET_SHMEDIA32 && !TARGET_SHCOMPACT) || TARGET_ALLOW_INDEXED_ADDRESS)
 
 /* A C compound statement that attempts to replace X, which is an address
    that needs reloading, with a valid memory address for an operand of
@@ -1808,10 +1515,10 @@ struct sh_args {
 #define DEFAULT_SIGNED_CHAR  1
 
 /* The type of size_t unsigned int.  */
-#define SIZE_TYPE (TARGET_SH5 ? "long unsigned int" : "unsigned int")
+#define SIZE_TYPE ("unsigned int")
 
 #undef  PTRDIFF_TYPE
-#define PTRDIFF_TYPE (TARGET_SH5 ? "long int" : "int")
+#define PTRDIFF_TYPE ("int")
 
 #define WCHAR_TYPE "short unsigned int"
 #define WCHAR_TYPE_SIZE 16
@@ -1820,7 +1527,7 @@ struct sh_args {
 
 /* Max number of bytes we can move from memory to memory
    in one reasonably fast instruction.  */
-#define MOVE_MAX (TARGET_SHMEDIA ? 8 : 4)
+#define MOVE_MAX (4)
 
 /* Maximum value possibly taken by MOVE_MAX.  Must be defined whenever
    MOVE_MAX is not a compile-time constant.  */
@@ -1828,7 +1535,7 @@ struct sh_args {
 
 /* Max number of bytes we want move_by_pieces to be able to copy
    efficiently.  */
-#define MOVE_MAX_PIECES (TARGET_SH4 || TARGET_SHMEDIA ? 8 : 4)
+#define MOVE_MAX_PIECES (TARGET_SH4 ? 8 : 4)
 
 /* Define if operations between registers always perform the operation
    on the full register even if a narrower mode is specified.  */
@@ -1841,9 +1548,7 @@ struct sh_args {
    For SHmedia, we can truncate to QImode easier using zero extension.
    FP registers can load SImode values, but don't implicitly sign-extend
    them to DImode.  */
-#define LOAD_EXTEND_OP(MODE) \
- (((MODE) == QImode  && TARGET_SHMEDIA) ? ZERO_EXTEND \
-  : (MODE) != SImode ? SIGN_EXTEND : UNKNOWN)
+#define LOAD_EXTEND_OP(MODE) ((MODE) != SImode ? SIGN_EXTEND : UNKNOWN)
 
 /* Define if loading short immediate values into registers sign extends.  */
 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
@@ -1878,9 +1583,7 @@ struct sh_args {
 #define SHIFT_COUNT_TRUNCATED (0)
 
 /* All integers have the same format so truncation is easy.  */
-/* But SHmedia must sign-extend DImode when truncating to SImode.  */
-#define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) \
- (!TARGET_SHMEDIA || (INPREC) < 64 || (OUTPREC) >= 64)
+#define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) (true)
 
 /* Define this if addresses of constant functions
    shouldn't be put through pseudo regs where they can be cse'd.
@@ -1889,7 +1592,7 @@ struct sh_args {
 /*#define NO_FUNCTION_CSE 1*/
 
 /* The machine modes of pointers and functions.  */
-#define Pmode  (TARGET_SHMEDIA64 ? DImode : SImode)
+#define Pmode  (SImode)
 #define FUNCTION_MODE  Pmode
 
 /* The multiply insn on the SH1 and the divide insns on the SH1 and SH2
@@ -1929,8 +1632,7 @@ struct sh_args {
 	((! nonpic_symbol_mentioned_p (X)			\
 	  && (GET_CODE (X) != SYMBOL_REF			\
 	      || ! CONSTANT_POOL_ADDRESS_P (X)			\
-	      || ! nonpic_symbol_mentioned_p (get_pool_constant (X)))) \
-	 || (TARGET_SHMEDIA && GET_CODE (X) == LABEL_REF))
+	      || ! nonpic_symbol_mentioned_p (get_pool_constant (X)))))
 
 #define SYMBOLIC_CONST_P(X)	\
 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF)	\
@@ -1944,7 +1646,7 @@ struct sh_args {
    register information here is not used for SFmode.  */
 #define REGCLASS_HAS_GENERAL_REG(CLASS) \
   ((CLASS) == GENERAL_REGS || (CLASS) == R0_REGS || (CLASS) == NON_SP_REGS \
-    || (! TARGET_SHMEDIA && (CLASS) == SIBCALL_REGS))
+    || ((CLASS) == SIBCALL_REGS))
 
 #define REGCLASS_HAS_FP_REG(CLASS) \
   ((CLASS) == FP0_REGS || (CLASS) == FP_REGS \
@@ -1971,19 +1673,13 @@ struct sh_args {
 #define SET_ASM_OP		"\t.set\t"
 
 /* How to change between sections.  */
-#define TEXT_SECTION_ASM_OP	(TARGET_SHMEDIA32 \
-				? "\t.section\t.text..SHmedia32,\"ax\"" \
-				: "\t.text")
+#define TEXT_SECTION_ASM_OP	"\t.text"
 #define DATA_SECTION_ASM_OP	"\t.data"
 
 #if defined CRT_BEGIN || defined CRT_END
 /* Arrange for TEXT_SECTION_ASM_OP to be a compile-time constant.  */
-# undef TEXT_SECTION_ASM_OP
-# if __SHMEDIA__ == 1 && __SH5__ == 32
-#  define TEXT_SECTION_ASM_OP "\t.section\t.text..SHmedia32,\"ax\""
-# else
-#  define TEXT_SECTION_ASM_OP "\t.text"
-# endif
+#undef TEXT_SECTION_ASM_OP
+#define TEXT_SECTION_ASM_OP "\t.text"
 #endif
 
 #ifndef BSS_SECTION_ASM_OP
@@ -2027,24 +1723,12 @@ struct sh_args {
 
 #define ASM_OUTPUT_REG_PUSH(file, v) \
 {							\
-  if (TARGET_SHMEDIA)					\
-    {							\
-      fprintf ((file), "\taddi.l\tr15,-8,r15\n");	\
-      fprintf ((file), "\tst.q\tr15,0,r%d\n", (v));	\
-    }							\
-  else							\
-    fprintf ((file), "\tmov.l\tr%d,@-r15\n", (v));	\
+  fprintf ((file), "\tmov.l\tr%d,@-r15\n", (v));	\
 }
 
 #define ASM_OUTPUT_REG_POP(file, v) \
 {							\
-  if (TARGET_SHMEDIA)					\
-    {							\
-      fprintf ((file), "\tld.q\tr15,0,r%d\n", (v));	\
-      fprintf ((file), "\taddi.l\tr15,8,r15\n");	\
-    }							\
-  else							\
-    fprintf ((file), "\tmov.l\t@r15+,r%d\n", (v));	\
+  fprintf ((file), "\tmov.l\t@r15+,r%d\n", (v));	\
 }
 
 /* DBX register number for a given compiler register number.  */
@@ -2064,34 +1748,32 @@ struct sh_args {
 #define SH_DBX_REGISTER_NUMBER(REGNO) \
   (IN_RANGE ((REGNO), \
 	     (unsigned HOST_WIDE_INT) FIRST_GENERAL_REG, \
-	     FIRST_GENERAL_REG + (TARGET_SH5 ? 63U :15U)) \
+	     FIRST_GENERAL_REG + 15U) \
    ? ((unsigned) (REGNO) - FIRST_GENERAL_REG) \
    : ((int) (REGNO) >= FIRST_FP_REG \
      && ((int) (REGNO) \
-	 <= (FIRST_FP_REG + \
-	     ((TARGET_SH5 && TARGET_FPU_ANY) ? 63 : TARGET_SH2E ? 15 : -1)))) \
-   ? ((unsigned) (REGNO) - FIRST_FP_REG \
-      + (TARGET_SH5 ? 77 : 25)) \
+	 <= (FIRST_FP_REG + (TARGET_SH2E ? 15 : -1)))) \
+   ? ((unsigned) (REGNO) - FIRST_FP_REG + 25) \
    : XD_REGISTER_P (REGNO) \
-   ? ((unsigned) (REGNO) - FIRST_XD_REG + (TARGET_SH5 ? 289 : 87)) \
+   ? ((unsigned) (REGNO) - FIRST_XD_REG + 87) \
    : TARGET_REGISTER_P (REGNO) \
    ? ((unsigned) (REGNO) - FIRST_TARGET_REG + 68) \
    : (REGNO) == PR_REG \
-   ? (TARGET_SH5 ? 18 : 17) \
+   ? (17) \
    : (REGNO) == PR_MEDIA_REG \
-   ? (TARGET_SH5 ? 18 : (unsigned) -1) \
+   ? ((unsigned) -1) \
    : (REGNO) == GBR_REG \
-   ? (TARGET_SH5 ? 238 : 18) \
+   ? (18) \
    : (REGNO) == MACH_REG \
-   ? (TARGET_SH5 ? 239 : 20) \
+   ? (20) \
    : (REGNO) == MACL_REG \
-   ? (TARGET_SH5 ? 240 : 21) \
+   ? (21) \
    : (REGNO) == T_REG \
-   ? (TARGET_SH5 ? 242 : 22) \
+   ? (22) \
    : (REGNO) == FPUL_REG \
-   ? (TARGET_SH5 ? 244 : 23) \
+   ? (23) \
    : (REGNO) == FPSCR_REG \
-   ? (TARGET_SH5 ? 243 : 24) \
+   ? (24) \
    : (unsigned) -1)
 
 /* This is how to output a reference to a symbol_ref.  On SH5,
@@ -2099,8 +1781,6 @@ struct sh_args {
 #define ASM_OUTPUT_SYMBOL_REF(FILE,SYM)			\
   do 							\
     {							\
-      if (TARGET_SH5 && !SYMBOL_REF_FUNCTION_P (SYM))	\
-	fputs ("datalabel ", (FILE));			\
       assemble_name ((FILE), XSTR ((SYM), 0));		\
     }							\
   while (0)
@@ -2123,30 +1803,12 @@ struct sh_args {
   switch (GET_MODE (BODY))						\
     {									\
     case SImode:							\
-      if (TARGET_SH5)							\
-	{								\
-	  asm_fprintf ((STREAM), "\t.long\t%LL%d-datalabel %LL%d\n",	\
-		       (VALUE), (REL));					\
-	  break;							\
-	}								\
       asm_fprintf ((STREAM), "\t.long\t%LL%d-%LL%d\n", (VALUE),(REL));	\
       break;								\
     case HImode:							\
-      if (TARGET_SH5)							\
-	{								\
-	  asm_fprintf ((STREAM), "\t.word\t%LL%d-datalabel %LL%d\n",	\
-		       (VALUE), (REL));					\
-	  break;							\
-	}								\
       asm_fprintf ((STREAM), "\t.word\t%LL%d-%LL%d\n", (VALUE),(REL));	\
       break;								\
     case QImode:							\
-      if (TARGET_SH5)							\
-	{								\
-	  asm_fprintf ((STREAM), "\t.byte\t%LL%d-datalabel %LL%d\n",	\
-		       (VALUE), (REL));					\
-	  break;							\
-	}								\
       asm_fprintf ((STREAM), "\t.byte\t%LL%d-%LL%d\n", (VALUE),(REL));	\
       break;								\
     default:								\
@@ -2188,8 +1850,7 @@ enum processor_type {
   PROCESSOR_SH3,
   PROCESSOR_SH3E,
   PROCESSOR_SH4,
-  PROCESSOR_SH4A,
-  PROCESSOR_SH5
+  PROCESSOR_SH4A
 };
 
 #define sh_cpu_attr ((enum attr_cpu)sh_cpu)
@@ -2240,10 +1901,9 @@ extern int current_function_interrupt;
   if (GET_MODE_CLASS (MODE) == MODE_INT			\
       && GET_MODE_SIZE (MODE) < 4/* ! UNITS_PER_WORD */)\
     (UNSIGNEDP) = ((MODE) == SImode ? 0 : (UNSIGNEDP)),	\
-    (MODE) = (TARGET_SH1 ? SImode \
-	      : TARGET_SHMEDIA32 ? SImode : DImode);
+    (MODE) = (TARGET_SH1 ? SImode : DImode);
 
-#define MAX_FIXED_MODE_SIZE (TARGET_SH5 ? 128 : 64)
+#define MAX_FIXED_MODE_SIZE (64)
 
 /* Better to allocate once the maximum space for outgoing args in the
    prologue rather than duplicate around each call.  */
@@ -2264,11 +1924,9 @@ extern int current_function_interrupt;
 #define EPILOGUE_USES(REGNO) ((TARGET_SH2E || TARGET_SH4) \
 			      && (REGNO) == FPSCR_REG)
 
-#define DWARF_FRAME_RETURN_COLUMN \
-  (TARGET_SH5 ? DWARF_FRAME_REGNUM (PR_MEDIA_REG) : DWARF_FRAME_REGNUM (PR_REG))
+#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (PR_REG))
 
-#define EH_RETURN_DATA_REGNO(N)	\
-  ((N) < 4 ? (N) + (TARGET_SH5 ? 2U : 4U) : INVALID_REGNUM)
+#define EH_RETURN_DATA_REGNO(N)	((N) < 4 ? (N) + 4U : INVALID_REGNUM)
 
 #define EH_RETURN_STACKADJ_REGNO STATIC_CHAIN_REGNUM
 #define EH_RETURN_STACKADJ_RTX	gen_rtx_REG (Pmode, EH_RETURN_STACKADJ_REGNO)
@@ -2280,7 +1938,7 @@ extern int current_function_interrupt;
     ? ((GLOBAL) ? DW_EH_PE_indirect | DW_EH_PE_datarel : DW_EH_PE_pcrel) \
     : ((flag_pic && (GLOBAL) ? DW_EH_PE_indirect : 0) \
        | (flag_pic ? DW_EH_PE_pcrel : DW_EH_PE_absptr))) \
-   | ((CODE) ? 0 : (TARGET_SHMEDIA64 ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)))
+   | ((CODE) ? 0 : DW_EH_PE_sdata4))
 
 /* Handle special EH pointer encodings.  Absolute, pc-relative, and
    indirect are handled automatically.  */
@@ -2306,7 +1964,7 @@ extern int current_function_interrupt;
       } \
   } while (0)
 
-#if (defined CRT_BEGIN || defined CRT_END) && ! __SHMEDIA__
+#if (defined CRT_BEGIN || defined CRT_END)
 /* SH constant pool breaks the devices in crtstuff.c to control section
    in where code resides.  We have to write it as asm code.  */
 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
@@ -2318,6 +1976,6 @@ extern int current_function_interrupt;
 0:	.p2align 2\n\
 1:	.long	" USER_LABEL_PREFIX #FUNC " - 0b\n\
 2:\n" TEXT_SECTION_ASM_OP);
-#endif /* (defined CRT_BEGIN || defined CRT_END) && ! __SHMEDIA__ */
+#endif /* (defined CRT_BEGIN || defined CRT_END) */
 
 #endif /* ! GCC_SH_H */

gcc/config/sh/sh.opt

@@ -37,9 +37,6 @@ Mask(HARD_SH2A_DOUBLE)
 ;; Set if compiling for SH4 hardware (to be used for insn costs etc.)
 Mask(HARD_SH4)
 
-;; Set if we should generate code for a SH5 CPU (either ISA).
-Mask(SH5)
-
 ;; Set if we should save all target registers.
 Mask(SAVE_ALL_TARGET_REGS)
 
@@ -180,30 +177,6 @@ m4al
 Target RejectNegative Condition(SUPPORT_SH4AL)
 Generate SH4al-dsp code.
 
-m5-32media
-Target RejectNegative Condition(SUPPORT_SH5_32MEDIA)
-Generate 32-bit SHmedia code.
-
-m5-32media-nofpu
-Target RejectNegative Condition(SUPPORT_SH5_32MEDIA_NOFPU)
-Generate 32-bit FPU-less SHmedia code.
-
-m5-64media
-Target RejectNegative Condition(SUPPORT_SH5_64MEDIA)
-Generate 64-bit SHmedia code.
-
-m5-64media-nofpu
-Target RejectNegative Condition(SUPPORT_SH5_64MEDIA_NOFPU)
-Generate 64-bit FPU-less SHmedia code.
-
-m5-compact
-Target RejectNegative Condition(SUPPORT_SH5_32MEDIA)
-Generate SHcompact code.
-
-m5-compact-nofpu
-Target RejectNegative Condition(SUPPORT_SH5_32MEDIA_NOFPU)
-Generate FPU-less SHcompact code.
-
 maccumulate-outgoing-args
 Target Report Var(TARGET_ACCUMULATE_OUTGOING_ARGS) Init(1)
 Reserve space for outgoing arguments in the function prologue.
@@ -244,17 +217,13 @@ mcbranch-force-delay-slot
 Target Report RejectNegative Var(TARGET_CBRANCH_FORCE_DELAY_SLOT) Init(0)
 Force the usage of delay slots for conditional branches.
 
-mcut2-workaround
-Target RejectNegative Var(TARGET_SH5_CUT2_WORKAROUND)
-Enable SH5 cut2 workaround.
-
 mdalign
 Target Report RejectNegative Mask(ALIGN_DOUBLE)
 Align doubles at 64-bit boundaries.
 
 mdiv=
 Target RejectNegative Joined Var(sh_div_str) Init("")
-Division strategy, one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp, call-div1, call-fp, call-table.
+Division strategy, one of: call-div1, call-fp, call-table.
 
 mdivsi3_libfunc=
 Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("")
@@ -272,10 +241,6 @@ mfixed-range=
 Target RejectNegative Joined Var(sh_fixed_range_str)
 Specify range of registers to make fixed.
 
-mgettrcost=
-Target RejectNegative Joined UInteger Var(sh_gettrcost) Init(-1)
-Cost to assume for gettr insn.
-
 mhitachi
 Target Report RejectNegative Mask(HITACHI)
 Follow Renesas (formerly Hitachi) / SuperH calling conventions.
@@ -284,10 +249,6 @@ mieee
 Target Var(TARGET_IEEE)
 Increase the IEEE compliance for floating-point comparisons.
 
-mindexed-addressing
-Target Report Mask(ALLOW_INDEXED_ADDRESS) Condition(SUPPORT_ANY_SH5_32MEDIA)
-Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
-
 minline-ic_invalidate
 Target Report Var(TARGET_INLINE_IC_INVALIDATE)
 inline code to invalidate instruction cache entries after setting up nested function trampolines.
@@ -318,10 +279,6 @@ mprefergot
 Target Report RejectNegative Mask(PREFERGOT)
 Emit function-calls using global offset table when generating PIC.
 
-mpt-fixed
-Target Report Mask(PT_FIXED) Condition(SUPPORT_ANY_SH5)
-Assume pt* instructions won't trap
-
 mrelax
 Target Report RejectNegative Mask(RELAX)
 Shorten address references during linking.

gcc/config/sh/sh64.h

-/* Definitions of target machine for GNU compiler for SuperH SH 5.
-   Copyright (C) 2000-2016 Free Software Foundation, Inc.
-   Contributed by Alexandre Oliva <aoliva@redhat.com>
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3.  If not see
-<http://www.gnu.org/licenses/>.  */
-
-#undef SH_ELF_WCHAR_TYPE
-#define SH_ELF_WCHAR_TYPE "int"

gcc/config/sh/shmedia.h

-/* Copyright (C) 2000-2016 Free Software Foundation, Inc.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
-<http://www.gnu.org/licenses/>.  */
-
-#ifndef _SHMEDIA_H
-#define _SHMEDIA_H
-
-#include <ushmedia.h>
-#include <sshmedia.h>
-
-#endif

gcc/config/sh/shmedia.md

-;; DFA scheduling description for SH-5 SHmedia instructions.
-;; Copyright (C) 2004-2016 Free Software Foundation, Inc.
-
-;; This file is part of GCC.
-
-;; GCC is free software; you can redistribute it and/or modify
-;; it under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 3, or (at your option)
-;; any later version.
-
-;; GCC is distributed in the hope that it will be useful,
-;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-;; GNU General Public License for more details.
-
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING3.  If not see
-;; <http://www.gnu.org/licenses/>.
-
-;; This is just a conversion of the old model using define_function_unit.
-
-;; When executing SHmedia code, the SH-5 is a fairly straightforward
-;; single-issue machine.  It has four pipelines, the branch unit (br),
-;; the integer and multimedia unit (imu), the load/store unit (lsu), and
-;; the floating point unit (fpu).
-
-(define_automaton "sh5inst_pipe, sh5fpu_pipe")
-
-(define_cpu_unit "sh5issue" "sh5inst_pipe")
-
-(define_cpu_unit "sh5fds" "sh5fpu_pipe")
-
-;; Every instruction on SH-5 occupies the issue resource for at least one
-;; cycle.
-(define_insn_reservation "shmedia1" 1
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "!pt_media,ptabs_media,invalidate_line_media,dmpy_media,load_media,fload_media,fcmp_media,fmove_media,fparith_media,dfparith_media,fpconv_media,dfpconv_media,dfmul_media,store_media,fstore_media,mcmp_media,mac_media,d2mpy_media,atrans_media,ustore_media"))
-  "sh5issue")
-
-;; Specify the various types of instruction which have latency > 1
-(define_insn_reservation "shmedia2" 2
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "mcmp_media"))
-  "sh5issue")
-
-(define_insn_reservation "shmedia3" 3
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "dmpy_media,load_media,fcmp_media,mac_media"))
-  "sh5issue")
-;; but see sh_adjust_cost for mac_media exception.
-
-(define_insn_reservation "shmedia4" 4
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "fload_media,fmove_media"))
-  "sh5issue")
-
-(define_insn_reservation "shmedia_d2mpy" 4
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "d2mpy_media"))
-  "sh5issue*2")
-
-(define_insn_reservation "shmedia5" 5
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "pt_media,ptabs_media"))
-  "sh5issue")
-
-(define_insn_reservation "shmedia6" 6
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "fparith_media,dfparith_media,fpconv_media,dfpconv_media"))
-  "sh5issue")
-
-(define_insn_reservation "shmedia_invalidate" 7
-  (and (eq_attr "pipe_model" "sh5media")
-       (eq_attr "type" "invalidate_line_media"))
-  "sh5issue*7")
-
-(define_insn_reservation "shmedia_dfmul" 9
-  (and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "dfmul_media"))
-  "sh5issue*4")
-
-(define_insn_reservation "shmedia_atrans" 10
-  (and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "atrans_media"))
-  "sh5issue*5")
-
-;; Floating-point divide and square-root occupy an additional resource,
-;; which is not internally pipelined.  However, other instructions
-;; can continue to issue.
-(define_insn_reservation "shmedia_fdiv" 19
-  (and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "fdiv_media"))
-  "sh5issue+sh5fds,sh5fds*18")
-
-(define_insn_reservation "shmedia_dfdiv" 35
-  (and (eq_attr "pipe_model" "sh5media") (eq_attr "type" "dfdiv_media"))
-  "sh5issue+sh5fds,sh5fds*34")

gcc/config/sh/sshmedia.h

-/* Copyright (C) 2000-2016 Free Software Foundation, Inc.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
-<http://www.gnu.org/licenses/>.  */
-
-
-/* sshmedia.h: Intrinsics corresponding to SHmedia instructions that
-   may only be executed in privileged mode.  */
-
-#ifndef _SSHMEDIA_H
-#define _SSHMEDIA_H
-
-#if __SHMEDIA__
-__inline__ static unsigned long long sh_media_GETCON (unsigned int k)
-  __attribute__((always_inline));
-
-__inline__ static
-unsigned long long
-sh_media_GETCON (unsigned int k)
-{
-  unsigned long long res;
-  __asm__ __volatile__ ("getcon	cr%1, %0" : "=r" (res) : "n" (k));
-  return res;
-}
-
-__inline__ static void sh_media_PUTCON (unsigned long long mm, unsigned int k)
-  __attribute__((always_inline));
-
-__inline__ static
-void
-sh_media_PUTCON (unsigned long long mm, unsigned int k)
-{
-  __asm__ __volatile__ ("putcon	%0, cr%1" : : "r" (mm), "n" (k));
-}
-
-__inline__ static
-unsigned long long
-sh_media_GETCFG (unsigned long long mm, int s)
-{
-  unsigned long long res;
-  __asm__ __volatile__ ("getcfg	%1, %2, %0" : "=r" (res) : "r" (mm), "n" (s));
-  return res;
-}
-
-__inline__ static
-void
-sh_media_PUTCFG (unsigned long long mm, int s, unsigned long long mw)
-{
-  __asm__ __volatile__ ("putcfg	%0, %1, %2" : : "r" (mm), "n" (s), "r" (mw));
-}
-
-__inline__ static
-void
-sh_media_SLEEP (void)
-{
-  __asm__ __volatile__ ("sleep");
-}
-#endif
-
-#endif

gcc/config/sh/sync.md

@@ -2131,7 +2131,7 @@
   [(match_operand:SI 0 "register_operand" "")		;; bool result output
    (match_operand:QI 1 "memory_operand" "")		;; memory
    (match_operand:SI 2 "const_int_operand" "")]		;; model
-  "(TARGET_ATOMIC_ANY || TARGET_ENABLE_TAS) && !TARGET_SHMEDIA"
+  "TARGET_ATOMIC_ANY || TARGET_ENABLE_TAS"
 {
   rtx addr = force_reg (Pmode, XEXP (operands[1], 0));
 
@@ -2168,7 +2168,7 @@
 	       (const_int 0)))
    (set (mem:QI (match_dup 0))
 	(unspec:QI [(const_int 128)] UNSPEC_ATOMIC))]
-  "TARGET_ENABLE_TAS && !TARGET_SHMEDIA"
+  "TARGET_ENABLE_TAS"
   "tas.b	@%0"
   [(set_attr "insn_class" "co_group")])
 

gcc/config/sh/t-netbsd-sh5-64

-MULTILIB_DIRNAMES= $(MULTILIB_RAW_DIRNAMES:/media64=)

gcc/config/sh/t-sh64

-# Copyright (C) 2002-2016 Free Software Foundation, Inc.
-#
-# This file is part of GCC.
-#
-# GCC is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3, or (at your option)
-# any later version.
-#
-# GCC is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GCC; see the file COPYING3.  If not see
-# <http://www.gnu.org/licenses/>.
-
-MULTILIB_CPU_DIRS= $(ML_sh1) $(ML_sh2e) $(ML_sh2) $(ML_sh3e) $(ML_sh3) $(ML_sh4_nofpu) $(ML_sh4_single_only) $(ML_sh4_single) $(ML_sh4) $(ML_sh5_32media:m5-32media/=media32) $(ML_sh5_32media_nofpu:m5-32media-nofpu/=nofpu/media32) $(ML_sh5_compact:m5-compact/=compact) $(ML_sh5_compact_nofpu:m5-compact-nofpu/=nofpu/compact) $(ML_sh5_64media:m5-64media/=media64) $(ML_sh5_64media_nofpu:m5-64media-nofpu/=nofpu/media64)
-
-MULTILIB_RAW_DIRNAMES= $(MULTILIB_ENDIAN:/mb= mb) $(MULTILIB_CPU_DIRS:/=)
-MULTILIB_DIRNAMES= $(MULTILIB_RAW_DIRNAMES)

gcc/config/sh/ushmedia.h

-/* Copyright (C) 2000-2016 Free Software Foundation, Inc.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
-<http://www.gnu.org/licenses/>.  */
-
-
-/* ushmedia.h: Intrinsics corresponding to SHmedia instructions that
-   may be executed in both user and privileged mode.  */
-
-#ifndef _USHMEDIA_H
-#define _USHMEDIA_H
-
-#if __SHMEDIA__
-#if ! __SH4_NO_FPU
-typedef float __GCC_FV __attribute__ ((vector_size (4 * sizeof (float))));
-typedef float __GCC_MTRX __attribute__ ((vector_size (16 * sizeof (float))));
-#endif
-
-static __inline unsigned long long
-sh_media_MABS_L (unsigned long long mm)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_absv2si2 ((v2si) mm);
-}
-
-static __inline unsigned long long
-sh_media_MABS_W (unsigned long long mm)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_absv4hi2 ((v4hi) mm);
-}
-
-static __inline unsigned long long
-sh_media_MADD_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_addv2si3 ((v2si) mm, (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MADD_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_addv4hi3 ((v4hi) mm, (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MADDS_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_ssaddv2si3 ((v2si) mm, (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MADDS_UB (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_usaddv8qi3 ((v8qi) mm, (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MADDS_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_ssaddv4hi3 ((v4hi) mm, (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCMPEQ_B (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MCMPEQ_B ((v8qi) mm,
-							   (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCMPEQ_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sh_media_MCMPEQ_L ((v2si) mm,
-							   (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCMPEQ_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MCMPEQ_W ((v4hi) mm,
-							   (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCMPGT_UB (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MCMPGT_UB ((v8qi) mm,
-							   (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCMPGT_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sh_media_MCMPGT_L ((v2si) mm,
-							   (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCMPGT_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MCMPGT_W ((v4hi) mm,
-							   (v4hi) mn);
-}
-
-#define sh_media_MCMV __builtin_sh_media_MCMV
-
-static __inline unsigned long long
-sh_media_MCNVS_LW (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-  typedef unsigned int uv2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sh_media_MCNVS_LW ((v2si) mm,
-							   (uv2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCNVS_WB (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MCNVS_WB ((v4hi) mm,
-							   (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MCNVS_WUB (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MCNVS_WUB ((v4hi) mm,
-							    (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MEXTR1 (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MEXTR1 ((v8qi) mm,
-							 (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MEXTR2 (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MEXTR2 ((v8qi) mm,
-							 (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MEXTR3 (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MEXTR3 ((v8qi) mm,
-							 (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MEXTR4 (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MEXTR4 ((v8qi) mm,
-							 (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MEXTR5 (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MEXTR5 ((v8qi) mm,
-							 (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MEXTR6 (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MEXTR6 ((v8qi) mm,
-							 (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MEXTR7 (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MEXTR7 ((v8qi) mm,
-							 (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMACFX_WL (unsigned long long mm, unsigned long long mn,
-		    unsigned long long mw)
-{
-  typedef float v2hi __attribute__ ((mode(V2HI)));
-  typedef float v2si __attribute__ ((mode(V2SI)));
-  typedef unsigned int uv2si __attribute__ ((mode(V2SI)));
-
-  long mm_l = (long) mm;
-  long mn_l = (long) mn;
-
-  return ((unsigned long long)
-    __builtin_sh_media_MMACFX_WL ((v2hi) mm_l, (v2hi) mn_l,
-				  (uv2si) mw));
-}
-
-static __inline unsigned long long
-sh_media_MMACNFX_WL (unsigned long long mm, unsigned long long mn,
-		     unsigned long long mw)
-{
-  typedef float v2hi __attribute__ ((mode(V2HI)));
-  typedef float v2si __attribute__ ((mode(V2SI)));
-  typedef unsigned int uv2si __attribute__ ((mode(V2SI)));
-
-  long mm_l = (long) mm;
-  long mn_l = (long) mn;
-
-  return ((unsigned long long)
-    __builtin_sh_media_MMACNFX_WL ((v2hi) mm_l, (v2hi) mn_l,
-				   (uv2si) mw));
-}
-
-static __inline unsigned long long
-sh_media_MMUL_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_mulv2si3 ((v2si) mm, (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMUL_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_mulv4hi3 ((v4hi) mm, (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMULFX_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sh_media_MMULFX_L ((v2si) mm,
-							   (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMULFX_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MMULFX_W ((v4hi) mm,
-							   (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMULFXRP_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MMULFXRP_W ((v4hi) mm,
-							     (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMULHI_WL (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MMULHI_WL ((v4hi) mm,
-							    (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMULLO_WL (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MMULLO_WL ((v4hi) mm,
-							    (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MMULSUM_WQ (unsigned long long mm, unsigned long long mn,
-		     unsigned long long mw)
-{
-  typedef unsigned int uv4hi __attribute__ ((mode(V4HI)));
-
-  return __builtin_sh_media_MMULSUM_WQ ((uv4hi) mm, (uv4hi) mn, mw);
-}
-
-static __inline unsigned long long
-sh_media_MPERM_W (unsigned long long mm, unsigned int mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MPERM_W ((v4hi) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSAD_UBQ (unsigned long long mm, unsigned long long mn,
-		   unsigned long long mw)
-{
-  typedef unsigned int uv8qi __attribute__ ((mode(V8QI)));
-
-  return __builtin_sh_media_MSAD_UBQ ((uv8qi) mm, (uv8qi) mn, mw);
-}
-
-static __inline unsigned long long
-sh_media_MSHALDS_L (unsigned long long mm, unsigned int mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHALDS_L ((v2si) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHALDS_W (unsigned long long mm, unsigned int mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHALDS_W ((v4hi) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHARD_L (unsigned long long mm, unsigned int mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_ashrv2si3 ((v2si) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHARD_W (unsigned long long mm, unsigned int mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_ashrv4hi3 ((v4hi) mm, mn);
-}
-
-#define sh_media_MSHARDS_Q __builtin_sh_media_MSHARDS_Q
-
-static __inline unsigned long long
-sh_media_MSHFHI_B (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHFHI_B ((v8qi) mm,
-							   (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHFHI_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHFHI_L ((v2si) mm,
-							   (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHFHI_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHFHI_W ((v4hi) mm,
-							   (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHFLO_B (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHFLO_B ((v8qi) mm,
-							   (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHFLO_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHFLO_L ((v2si) mm,
-							   (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHFLO_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sh_media_MSHFLO_W ((v4hi) mm,
-							   (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHLLD_L (unsigned long long mm, unsigned int mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_ashlv2si3 ((v2si) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHLLD_W (unsigned long long mm, unsigned int mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_ashlv4hi3 ((v4hi) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHLRD_L (unsigned long long mm, unsigned int mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_lshrv2si3 ((v2si) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSHLRD_W (unsigned long long mm, unsigned int mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_lshrv4hi3 ((v4hi) mm, mn);
-}
-
-static __inline unsigned long long
-sh_media_MSUB_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_subv2si3 ((v2si) mm, (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSUB_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_subv4hi3 ((v4hi) mm, (v4hi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSUBS_L (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v2si __attribute__ ((mode(V2SI)));
-
-  return (unsigned long long) __builtin_sssubv2si3 ((v2si) mm, (v2si) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSUBS_UB (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_ussubv8qi3 ((v8qi) mm, (v8qi) mn);
-}
-
-static __inline unsigned long long
-sh_media_MSUBS_W (unsigned long long mm, unsigned long long mn)
-{
-  typedef float v4hi __attribute__ ((mode(V4HI)));
-
-  return (unsigned long long) __builtin_sssubv4hi3 ((v4hi) mm, (v4hi) mn);
-}
-
-#if ! __SH4_NOFPU__
-/* Floating-point Intrinsics */
-
-#define sh_media_FABS_D __builtin_fabs
-#define sh_media_FABS_S __builtin_fabsf
-#define sh_media_FCMPUN_D __builtin_isunordered
-#define sh_media_FCMPUN_S __builtin_isunordered
-
-static __inline float sh_media_FCOSA_S (float fg)
-{
-  union { int i; float f; } u;
-
-  u.f = fg;
-  return __builtin_sh_media_FCOSA_S (u.i);
-}
-
-static __inline float
-sh_media_FGETSCR (void)
-{ 
-  float f;
-
-  __asm volatile ("fgetscr %0" : "=f" (f));
-  return f;
-}
-
-static __inline float
-sh_media_FIPR_S (const void *fvg, const void *fvh)
-{
-  typedef float v4sf __attribute__ ((mode(V4SF)));
-  v4sf vg = *(v4sf*) fvg;
-  v4sf vh = *(v4sf*) fvh;
-
-  return __builtin_sh_media_FIPR_S (vg, vh);
-}
-
-#if 0
-/* This gives different results for -O0  */
-static __inline float
-sh_media_FMAC_S (float fg, float fh, float fq)
-{
-  return fg * fh + fq;
-}
-#else
-
-#define sh_media_FMAC_S __builtin_sh_media_FMAC_S
-#endif
-
-static __inline long long
-sh_media_FMOV_DQ (double dg)
-{
-  union { long long l; double d; } u;
-
-  u.d = dg;
-  return u.l;
-}
-
-static __inline float
-sh_media_FMOV_LS (int mm)
-{
-  union { int i; float f; } u;
-
-  u.i = mm;
-  return u.f;
-}
-
-static __inline double
-sh_media_FMOV_QD (long long mm)
-{
-  union { long long l; double d; } u;
-
-  u.l = mm;
-  return u.d;
-}
-
-static __inline int
-sh_media_FMOV_SL (float fg)
-{
-  union { int i; float f; } u;
-
-  u.f = fg;
-  return u.i;
-}
-
-static __inline void
-sh_media_FPUTSCR (float fg)
-{ 
-  __asm volatile ("fputscr %0" : : "f" (fg));
-}
-
-static __inline float sh_media_FSINA_S (float fg)
-{
-  union { int i; float f; } u;
-
-  u.f = fg;
-  return __builtin_sh_media_FSINA_S (u.i);
-}
-
-/* Can't use __builtin_sqrt / __builtin_sqrtf because they still implement
-   error handling unless -ffast-math is used.  */
-#define sh_media_FSQRT_D __builtin_sh_media_FSQRT_D
-#define sh_media_FSQRT_S __builtin_sh_media_FSQRT_S
-#define sh_media_FSRRA_S __builtin_sh_media_FSRRA_S
-
-static __inline void
-sh_media_FTRV_S (const void *mtrxg, const void *fvh, void *fvf)
-{
-  typedef float v16sf __attribute__ ((mode(V16SF)));
-  typedef float v4sf __attribute__ ((mode(V4SF)));
-  v16sf mtrx = *(v16sf*) mtrxg;
-  v4sf vh = *(v4sf*) fvh;
-
-  *(v4sf*) fvf = __builtin_sh_media_FTRV_S (mtrx, vh);
-}
-#endif /* ! __SH4_NOFPU__ */
-
-/* Not implemented here: Control and Configuration intrinsics.  */
-/* Misaligned Access Support intrinsics */
-
-static __inline unsigned long long
-sh_media_LDHI_L (void *p, int s)
-{
-  return __builtin_sh_media_LDHI_L ((char *)p + s);
-}
-
-static __inline unsigned long long
-sh_media_LDHI_Q (void *p, int s)
-{
-  return __builtin_sh_media_LDHI_Q ((char *)p + s);
-}
-
-static __inline unsigned long long
-sh_media_LDLO_L (void *p, int s)
-{
-  return __builtin_sh_media_LDLO_L ((char *)p + s);
-}
-
-static __inline unsigned long long
-sh_media_LDLO_Q (void *p, int s)
-{
-  return __builtin_sh_media_LDLO_Q ((char *)p + s);
-}
-
-static __inline void
-sh_media_STHI_L (void *p, int s, unsigned int mw)
-{
-  __builtin_sh_media_STHI_L ((char*)p + s, mw);
-}
-
-static __inline void
-sh_media_STHI_Q (void *p, int s, unsigned long long mw)
-{
-  __builtin_sh_media_STHI_Q ((char*)p + s, mw);
-}
-
-static __inline void
-sh_media_STLO_L (void *p, int s, unsigned int mw)
-{
-  __builtin_sh_media_STLO_L ((char*)p + s, mw);
-}
-
-static __inline void
-sh_media_STLO_Q (void *p, int s, unsigned long long mw)
-{
-  __builtin_sh_media_STLO_Q ((char*)p + s, mw);
-}
-
-/* Miscellaneous intrinsics */
-
-#define sh_media_NSB __builtin_sh_media_NSB
-
-static __inline unsigned long long
-sh_media_BYTEREV (unsigned long long mm)
-{
-  typedef float v8qi __attribute__ ((mode(V8QI)));
-
-  return (unsigned long long) __builtin_sh_media_BYTEREV ((v8qi) mm);
-}
-
-__inline__ static unsigned long long
-sh_media_CMVEQ (unsigned long long mm, unsigned long long mn, unsigned long long mw) __attribute__ ((always_inline));
-
-__inline__ static unsigned long long
-sh_media_CMVEQ (unsigned long long mm, unsigned long long mn, unsigned long long mw)
-{
-  return mm == 0 ? mn : mw;
-}
-
-__inline__ static unsigned long long
-sh_media_CMVNE (unsigned long long mm, unsigned long long mn, unsigned long long mw) __attribute__ ((always_inline));
-
-__inline__ static unsigned long long
-sh_media_CMVNE (unsigned long long mm, unsigned long long mn, unsigned long long mw)
-{
-  return mm != 0 ? mn : mw;
-}
-
-static __inline long long
-sh_media_ADDZ_L (unsigned int mm, unsigned int mn)
-{
-  return mm + mn;
-}
-
-/* NOP and Synchronization intrinsics not implemented here.  */
-
-static __inline__ void sh_media_PREFO(void *mm, int s)
-{
-  __builtin_sh_media_PREFO (mm + s, 0, 0);
-}
-
-/* Event Handling intrinsics not implemented here.  */
-
-/* Old asm stuff */
-
-static __inline__
-void
-sh_media_NOP (void)
-{
-  __asm__ ("nop" : :);
-}
-
-__inline__ static
-unsigned long long
-sh_media_SWAP_Q (void *mm, long long mn, unsigned long long mw)
-{
-  unsigned long long res;
-  unsigned long long *addr = (unsigned long long *)((char *)mm + mn);
-  __asm__ ("swap.q	%m1, %0" : "=r" (res), "+o" (*addr) : "0" (mw));
-  return res;
-}
-
-__inline__ static
-void     
-sh_media_SYNCI (void)
-{
-  __asm__ __volatile__ ("synci");
-}
-
-__inline__ static
-void     
-sh_media_SYNCO (void)
-{
-  __asm__ __volatile__ ("synco");
-}
-
-__inline__ static
-void
-sh_media_ALLOCO (void *mm, int s)
-{
-  __builtin_sh_media_ALLOCO (mm + s);
-}
-
-__inline__ static
-void
-sh_media_ICBI (void *mm, int s)
-{
-  __asm__ __volatile__ ("icbi	%m0" : : "o" (((char*)mm)[s]));
-}
-
-__inline__ static
-void
-sh_media_OCBI (void *mm, int s)
-{
-  __asm__ __volatile__ ("ocbi	%m0" : : "o" (((char*)mm)[s]));
-}
-
-__inline__ static
-void
-sh_media_OCBP (void *mm, int s)
-{
-  __asm__ __volatile__ ("ocbp	%m0" : : "o" (((char*)mm)[s]));
-}
-
-__inline__ static
-void
-sh_media_OCBWB (void *mm, int s)
-{
-  __asm__ __volatile__ ("ocbwb	%m0" : : "o" (((char*)mm)[s]));
-}
-
-__inline__ static
-void
-sh_media_PREFI (void *mm, int s)
-{
-  __asm__ __volatile__ ("prefi	%m0" : : "o" (((char*)mm)[s]));
-}
-
-__inline__ static
-void
-sh_media_BRK (void)
-{
-  __asm__ __volatile__ ("brk");
-}
-
-__inline__ static
-void
-sh_media_TRAPA (unsigned long long mm)
-{
-  __asm__ __volatile__ ("trapa	%%0" : : "r" (mm));
-}
-
-__inline__ static
-short         
-sh_media_unaligned_LD_W (void *p)
-{
-#if __LITTLE_ENDIAN__
-  return (((unsigned char *)p)[0]
-	  | (((short)((__signed__ char *)p)[1]) << 8));
-#else
-  return ((((short)((__signed__ char *)p)[0]) << 8)
-	  | ((unsigned char *)p)[1]);
-#endif
-}
-
-__inline__ static
-unsigned short
-sh_media_unaligned_LD_UW (void *p)
-{
-  unsigned char *addr = p;
-#if __LITTLE_ENDIAN__
-  return sh_media_MSHFLO_B (addr[0], addr[1]);
-#else
-  return sh_media_MSHFLO_B (addr[1], addr[0]);
-#endif
-}
-
-/* We don't use the sh_media_LD* functions here because that turned out
-   to impede constant propagation of the offsets into the ldhi / ldlo
-   instructions.  */
-__inline__ static
-int           
-sh_media_unaligned_LD_L (void *p)
-{
-#if __LITTLE_ENDIAN__
-  return (__builtin_sh_media_LDHI_L ((char *)p + 3)
-	  | __builtin_sh_media_LDLO_L (p));
-#else
-  return (__builtin_sh_media_LDLO_L ((char *)p + 3)
-	  | __builtin_sh_media_LDHI_L (p));
-#endif
-}
-
-__inline__ static
-long long     
-sh_media_unaligned_LD_Q (void *p)
-{
-#if __LITTLE_ENDIAN__
-  return (__builtin_sh_media_LDHI_Q ((char *)p + 7)
-	  | __builtin_sh_media_LDLO_Q (p));
-#else
-  return (__builtin_sh_media_LDLO_Q ((char *)p + 7)
-	  | __builtin_sh_media_LDHI_Q (p));
-#endif
-}
-
-__inline__ static
-void
-sh_media_unaligned_ST_W (void *p, unsigned int k)
-{
-  char *addr = p;
-#if __LITTLE_ENDIAN__
-  addr[0] = k;
-  addr[1] = k >> 8;
-#else
-  addr[1] = k;
-  addr[0] = k >> 8;
-#endif
-}
-
-/* We don't use the sh_media_ST* functions here because that turned out
-   to impede constant propagation of the offsets into the ldhi / ldlo
-   instructions.  */
-__inline__ static
-void
-sh_media_unaligned_ST_L (void *p, unsigned int k)
-{
-#if __LITTLE_ENDIAN__
-  __builtin_sh_media_STHI_L (p + 3, k);
-  __builtin_sh_media_STLO_L (p, k);
-#else
-  __builtin_sh_media_STLO_L (p + 3, k);
-  __builtin_sh_media_STHI_L (p, k);
-#endif
-}
-
-__inline__ static
-void
-sh_media_unaligned_ST_Q (void *p, unsigned long long k)
-{
-#if __LITTLE_ENDIAN__
-  __builtin_sh_media_STHI_Q (p + 7, k);
-  __builtin_sh_media_STLO_Q (p, k);
-#else
-  __builtin_sh_media_STLO_Q (p + 7, k);
-  __builtin_sh_media_STHI_Q (p, k);
-#endif
-}
-
-#if ! __SH4_NOFPU__
-__inline__ static
-void
-sh_media_FVCOPY_S (const void *fvg, void *fvf)
-{
-  const __GCC_FV *g = fvg;
-  __GCC_FV *f = fvf;
-  *f = *g;
-}
-
-__inline__ static
-void
-sh_media_FVADD_S (const void *fvg, const void *fvh, void *fvf)
-{
-  const float *g = fvg, *h = fvh;
-  float *f = fvf;
-#if 1
-  int i;
-
-  for (i = 0; i < 4; i++)
-    f[i] = g[i] + h[i];
-#else
-  f[0] = g[0] + h[0];
-  f[1] = g[1] + h[1];
-  f[2] = g[2] + h[2];
-  f[3] = g[3] + h[3];
-#endif
-}
-
-__inline__ static
-void
-sh_media_FVSUB_S (const void *fvg, const void *fvh, void *fvf)
-{
-  const float *g = fvg, *h = fvh;
-  float *f = fvf;
-#if 1
-  int i;
-
-  for (i = 0; i < 4; i++)
-    f[i] = g[i] - h[i];
-#else
-  f[0] = g[0] - h[0];
-  f[1] = g[1] - h[1];
-  f[2] = g[2] - h[2];
-  f[3] = g[3] - h[3];
-#endif
-}
-
-__inline__ static
-void
-sh_media_FMTRXCOPY_S (const void *mtrxg, void *mtrxf)
-{
-  const __GCC_MTRX *g = mtrxg;
-  __GCC_MTRX *f = mtrxf;
-  *f = *g;
-}
-
-__inline__ static
-void
-sh_media_FMTRXADD_S (const void *mtrxg, const void *mtrxh, void *mtrxf)
-{
-  const __GCC_FV *g = mtrxg, *h = mtrxh;
-  __GCC_FV *f = mtrxf;
-#if 1
-  int i;
-
-  for (i = 0; i < 4; i++)
-    sh_media_FVADD_S (&g[i], &h[i], &f[i]);
-#else
-  sh_media_FVADD_S (&g[0], &h[0], &f[0]);
-  sh_media_FVADD_S (&g[1], &h[1], &f[1]);
-  sh_media_FVADD_S (&g[2], &h[2], &f[2]);
-  sh_media_FVADD_S (&g[3], &h[3], &f[3]);
-#endif
-}
-
-__inline__ static
-void
-sh_media_FMTRXSUB_S (const void *mtrxg, const void *mtrxh, void *mtrxf)
-{
-  const __GCC_FV *g = mtrxg, *h = mtrxh;
-  __GCC_FV *f = mtrxf;
-#if 1
-  int i;
-
-  for (i = 0; i < 4; i++)
-    sh_media_FVSUB_S (&g[i], &h[i], &f[i]);
-#else
-  sh_media_FVSUB_S (&g[0], &h[0], &f[0]);
-  sh_media_FVSUB_S (&g[1], &h[1], &f[1]);
-  sh_media_FVSUB_S (&g[2], &h[2], &f[2]);
-  sh_media_FVSUB_S (&g[3], &h[3], &f[3]);
-#endif
-}
-
-__inline__ static
-void
-sh_media_FTRVADD_S (const void *mtrxg, const void *fvh, const void *fvi,
-		    void *fvf)
-{
-  sh_media_FTRV_S (mtrxg, fvh, fvf);
-  sh_media_FVADD_S (fvf, fvi, fvf);
-}
-
-__inline__ static
-void
-sh_media_FTRVSUB_S (const void *mtrxg, const void *fvh, const void *fvi,
-		    void *fvf)
-{
-  sh_media_FTRV_S (mtrxg, fvh, fvf);
-  sh_media_FVSUB_S (fvf, fvi, fvf);
-}
-
-__inline__ static
-void
-sh_media_FMTRXMUL_S (const void *mtrxg, const void *mtrxh, void *mtrxf)
-{
-  const __GCC_FV *g = mtrxg;
-  __GCC_FV *f = mtrxf;
-#if 1
-  int j;
-
-  for (j = 0; j < 4; j++)
-    sh_media_FTRV_S (mtrxh, &g[j], &f[j]);
-#else
-  sh_media_FTRV_S (mtrxh, &g[0], &f[0]);
-  sh_media_FTRV_S (mtrxh, &g[1], &f[1]);
-  sh_media_FTRV_S (mtrxh, &g[2], &f[2]);
-  sh_media_FTRV_S (mtrxh, &g[3], &f[3]);
-#endif
-}
-
-__inline__ static
-void
-sh_media_FMTRXMULADD_S (const void *mtrxg, const void *mtrxh,
-			const void *mtrxi, void *mtrxf)
-{
-  const __GCC_FV *g = mtrxg, *i = mtrxi;
-  __GCC_FV *f = mtrxf;
-#if 1
-  int j;
-
-  for (j = 0; j < 4; j++)
-    sh_media_FTRVADD_S (mtrxh, &g[j], &i[j], &f[j]);
-#else
-  sh_media_FTRVADD_S (mtrxh, &g[0], &i[0], &f[0]);
-  sh_media_FTRVADD_S (mtrxh, &g[1], &i[1], &f[1]);
-  sh_media_FTRVADD_S (mtrxh, &g[2], &i[2], &f[2]);
-  sh_media_FTRVADD_S (mtrxh, &g[3], &i[3], &f[3]);
-#endif
-}
-
-__inline__ static
-void
-sh_media_FMTRXMULSUB_S (const void *mtrxg, const void *mtrxh,
-			const void *mtrxi, void *mtrxf)
-{
-  const __GCC_FV *g = mtrxg, *i = mtrxi;
-  __GCC_FV *f = mtrxf;
-#if 1
-  int j;
-
-  for (j = 0; j < 4; j++)
-    sh_media_FTRVSUB_S (mtrxh, &g[j], &i[j], &f[j]);
-#else
-  sh_media_FTRVSUB_S (mtrxh, &g[0], &i[0], &f[0]);
-  sh_media_FTRVSUB_S (mtrxh, &g[1], &i[1], &f[1]);
-  sh_media_FTRVSUB_S (mtrxh, &g[2], &i[2], &f[2]);
-  sh_media_FTRVSUB_S (mtrxh, &g[3], &i[3], &f[3]);
-#endif
-}
-#endif /* ! __SH4_NOFPU__ */
-
-#endif /* __SHMEDIA__ */
-
-#endif /* _USHMEDIA_H */