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riscv-gcc-1
Commit d699058e by Richard Henderson Committed by Richard Henderson
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* config/alpha/alpha.md (ashldi_se): Re-enable. 

From-SVN: r50083
parent eadccfbb
Showing with 18 additions and 17 deletions
gcc/ChangeLog
2002-02-26 Richard Henderson <rth@redhat.com> 2002-02-26 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.md (ashldi_se): Re-enable.
2002-02-26 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.c (alpha_encode_section_info): Examine * config/alpha/alpha.c (alpha_encode_section_info): Examine
MODULE_LOCAL_P; improve commentary. MODULE_LOCAL_P; improve commentary.
......
gcc/config/alpha/alpha.md
...@@ -1597,23 +1597,20 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi" ...@@ -1597,23 +1597,20 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi"
} }
[(set_attr "type" "iadd,shift")]) [(set_attr "type" "iadd,shift")])
;; ??? The following pattern is made by combine, but earlier phases (define_insn "*ashldi_se"
;; (specifically flow) can't handle it. This occurs in jump.c. Deal [(set (match_operand:DI 0 "register_operand" "=r")
;; with this in a better way at some point. (sign_extend:DI
;;(define_insn "" (subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
;; [(set (match_operand:DI 0 "register_operand" "=r") (match_operand:DI 2 "const_int_operand" "P"))
;; (sign_extend:DI 0)))]
;; (subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3"
;; (match_operand:DI 2 "const_int_operand" "P")) {
;; 0)))] if (operands[2] == const1_rtx)
;; "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3" return "addl %r1,%r1,%0";
;;{ else
;; if (operands[2] == const1_rtx) return "s%P2addl %r1,0,%0";
;; return "addl %r1,%r1,%0"; }
;; else [(set_attr "type" "iadd")])
;; return "s%P2addl %r1,0,%0";
;;}
;; [(set_attr "type" "iadd")])
(define_insn "lshrdi3" (define_insn "lshrdi3"
[(set (match_operand:DI 0 "register_operand" "=r") [(set (match_operand:DI 0 "register_operand" "=r")
......
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