Commit d262c86c by Segher Boessenkool Committed by Segher Boessenkool

re PR target/64180 (PowerPC carry bit improvements)

	PR target/64180
	* config/rs6000/rs6000.md (*add<mode>3_internal1): Remove addic
	alternative.

From-SVN: r218592
parent 79cdc851
2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> 2014-12-10 Segher Boessenkool <segher@kernel.crashing.org>
PR target/64180 PR target/64180
* config/rs6000/rs6000.md (*add<mode>3_internal1): Remove addic
alternative.
2014-12-10 Segher Boessenkool <segher@kernel.crashing.org>
PR target/64180
* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2, * config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
*ctr<mode>_internal5, *ctr<mode>_internal6): Change "r" alternatives *ctr<mode>_internal5, *ctr<mode>_internal6): Change "r" alternatives
to "b". Increase length. to "b". Increase length.
...@@ -1491,17 +1491,14 @@ ...@@ -1491,17 +1491,14 @@
} }
}) })
;; Discourage ai/addic because of carry but provide it in an alternative
;; allowing register zero as source.
(define_insn "*add<mode>3_internal1" (define_insn "*add<mode>3_internal1"
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,?r,r") [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r")
(plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,r,b") (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b")
(match_operand:GPR 2 "add_operand" "r,I,I,L")))] (match_operand:GPR 2 "add_operand" "r,I,L")))]
"!DECIMAL_FLOAT_MODE_P (GET_MODE (operands[0])) && !DECIMAL_FLOAT_MODE_P (GET_MODE (operands[1]))" "!DECIMAL_FLOAT_MODE_P (GET_MODE (operands[0])) && !DECIMAL_FLOAT_MODE_P (GET_MODE (operands[1]))"
"@ "@
add %0,%1,%2 add %0,%1,%2
addi %0,%1,%2 addi %0,%1,%2
addic %0,%1,%2
addis %0,%1,%v2" addis %0,%1,%v2"
[(set_attr "type" "add")]) [(set_attr "type" "add")])
......
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