re PR target/64180 (PowerPC carry bit improvements)

	PR target/64180
	* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
	*ctr<mode>_internal5, *ctr<mode>_internal6): Change "r" alternatives
	to "b".  Increase length.
	(splitters for these): Split to cmp+addi instead of addic.

From-SVN: r218591

gcc/ChangeLog

 2014-12-10  Segher Boessenkool  <segher@kernel.crashing.org>
 
 	PR target/64180
+	* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
+	*ctr<mode>_internal5, *ctr<mode>_internal6): Change "r" alternatives
+	to "b".  Increase length.
+	(splitters for these): Split to cmp+addi instead of addic.
+
+2014-12-10  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	PR target/64180
 	* config/rs6000/darwin.md (macho_low_si): Remove "r" alternative.
 	(macho_low_di): Ditto.
 	* config/rs6000/rs6000.md (*largetoc_low): Ditto.

gcc/config/rs6000/rs6000.md

@@ -13490,7 +13490,7 @@
 
 (define_insn "*ctr<mode>_internal1"
   [(set (pc)
-	(if_then_else (ne (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+	(if_then_else (ne (match_operand:P 1 "register_operand" "c,*b,*b,*b")
 			  (const_int 1))
 		      (label_ref (match_operand 0 "" ""))
 		      (pc)))
@@ -13510,11 +13510,11 @@
     return \"bdz $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16,16")])
+   (set_attr "length" "*,16,20,20")])
 
 (define_insn "*ctr<mode>_internal2"
   [(set (pc)
-	(if_then_else (ne (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+	(if_then_else (ne (match_operand:P 1 "register_operand" "c,*b,*b,*b")
 			  (const_int 1))
 		      (pc)
 		      (label_ref (match_operand 0 "" ""))))
@@ -13534,13 +13534,13 @@
     return \"bdnz $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16,16")])
+   (set_attr "length" "*,16,20,20")])
 
 ;; Similar but use EQ
 
 (define_insn "*ctr<mode>_internal5"
   [(set (pc)
-	(if_then_else (eq (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+	(if_then_else (eq (match_operand:P 1 "register_operand" "c,*b,*b,*b")
 			  (const_int 1))
 		      (label_ref (match_operand 0 "" ""))
 		      (pc)))
@@ -13560,11 +13560,11 @@
     return \"bdnz $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16,16")])
+   (set_attr "length" "*,16,20,20")])
 
 (define_insn "*ctr<mode>_internal6"
   [(set (pc)
-	(if_then_else (eq (match_operand:P 1 "register_operand" "c,*r,*r,*r")
+	(if_then_else (eq (match_operand:P 1 "register_operand" "c,*b,*b,*b")
 			  (const_int 1))
 		      (pc)
 		      (label_ref (match_operand 0 "" ""))))
@@ -13584,7 +13584,7 @@
     return \"bdz $+8\;b %l0\";
 }"
   [(set_attr "type" "branch")
-   (set_attr "length" "*,12,16,16")])
+   (set_attr "length" "*,16,20,20")])
 
 ;; Now the splitters if we could not allocate the CTR register
 
@@ -13600,13 +13600,12 @@
    (clobber (match_scratch:CC 3 ""))
    (clobber (match_scratch:P 4 ""))]
   "reload_completed"
-  [(parallel [(set (match_dup 3)
-		   (compare:CC (plus:P (match_dup 1)
-					(const_int -1))
-			       (const_int 0)))
-	      (set (match_dup 0)
-		   (plus:P (match_dup 1)
-			    (const_int -1)))])
+  [(set (match_dup 3)
+	(compare:CC (match_dup 1)
+		    (const_int 1)))
+   (set (match_dup 0)
+	(plus:P (match_dup 1)
+		(const_int -1)))
    (set (pc) (if_then_else (match_dup 7)
 			   (match_dup 5)
 			   (match_dup 6)))]
@@ -13626,13 +13625,12 @@
    (clobber (match_scratch:CC 3 ""))
    (clobber (match_scratch:P 4 ""))]
   "reload_completed && ! gpc_reg_operand (operands[0], SImode)"
-  [(parallel [(set (match_dup 3)
-		   (compare:CC (plus:P (match_dup 1)
-					(const_int -1))
-			       (const_int 0)))
-	      (set (match_dup 4)
-		   (plus:P (match_dup 1)
-			    (const_int -1)))])
+  [(set (match_dup 3)
+	(compare:CC (match_dup 1)
+		    (const_int 1)))
+   (set (match_dup 4)
+	(plus:P (match_dup 1)
+		(const_int -1)))
    (set (match_dup 0)
 	(match_dup 4))
    (set (pc) (if_then_else (match_dup 7)