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riscv-gcc-1
Commit ce9c43a1 by Stuart Hastings Committed by Stuart Hastings
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* gcc/config/i386/i386.md (fixuns_truncdfhi2): Require SSE2. 

From-SVN: r121891
parent a13c5b70
Showing with 5 additions and 1 deletions
gcc/ChangeLog
2007-02-13 Stuart Hastings <stuart@apple.com>
* gcc/config/i386/i386.md (fixuns_truncdfhi2): Require SSE2.
2007-02-13 Richard Henderson <rth@redhat.com> 2007-02-13 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.c (alpha_stdarg_optimize_hook): Strip * config/alpha/alpha.c (alpha_stdarg_optimize_hook): Strip
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gcc/config/i386/i386.md
...@@ -4390,7 +4390,7 @@ ...@@ -4390,7 +4390,7 @@
(fix:SI (match_operand:DF 1 "nonimmediate_operand" ""))) (fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))
(set (match_operand:HI 0 "nonimmediate_operand" "") (set (match_operand:HI 0 "nonimmediate_operand" "")
(subreg:HI (match_dup 2) 0))] (subreg:HI (match_dup 2) 0))]
"TARGET_SSE_MATH" "TARGET_SSE_MATH && TARGET_SSE2"
"operands[2] = gen_reg_rtx (SImode);") "operands[2] = gen_reg_rtx (SImode);")
;; When SSE is available, it is always faster to use it! ;; When SSE is available, it is always faster to use it!
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