New tests.

From-SVN: r35959

gcc/testsuite/ChangeLog

+2000-08-24  Richard Henderson  <rth@cygnus.com>
+
+	* gcc.dg/ia64-sync-1.c: New test.
+	* gcc.dg/ia64-sync-2.c: New test.
+	* gcc.dg/ia64-asm-1.c: New test.
+
 2000-08-24  Joseph S. Myers  <jsm28@cam.ac.uk>
 
 	* gcc.dg/c99-scanf-2.c: Remove test for scanf "Z" length.

gcc/testsuite/gcc.dg/ia64-asm-1.c

+/* { dg-do run { target ia64-*-* } } */
+/* { dg-options } */
+
+/* Test that "=S" properly avoids the post-increment on the memory address.  */
+
+static void foo(int *x)
+{
+  long i;
+  for (i = 0; i < 100; ++i)
+    __asm__("st4 %0 = r0" : "=S"(x[i]));
+}
+
+int main()
+{
+  int array[100];
+  long i;
+
+  for (i = 0; i < 100; ++i)
+    array[i] = -1;
+
+  foo(array);
+
+  for (i = 0; i < 100; ++i)
+    if (array[i])
+      abort ();
+  return 0;
+}

gcc/testsuite/gcc.dg/ia64-sync-1.c

+/* { dg-do run { target ia64-*-* } } */
+/* { dg-options } */
+
+/* Test basic functionality of the intrinsics.  The operations should
+   not be optimized away if no one checks the return values.  */
+
+#include <ia64intrin.h>
+
+static int AI[12];
+static int init_noret_si[12] = { 0, 0, 0, 1, 0, 0, 0, 0, -1, 0, 0, 0 };
+static int test_noret_si[12] = { 1, 1, 1, 0, 1, 4, 22, -12, 7, 8, 9, 7 };
+
+static void
+do_noret_si (void)
+{
+  __sync_val_compare_and_swap(AI+0, 0, 1);
+  __sync_bool_compare_and_swap(AI+1, 0, 1);
+  __sync_lock_test_and_set(AI+2, 1);
+  __sync_lock_release(AI+3);
+
+  __sync_fetch_and_add(AI+4, 1);
+  __sync_fetch_and_add(AI+5, 4);
+  __sync_fetch_and_add(AI+6, 22);
+  __sync_fetch_and_sub(AI+7, 12);
+  __sync_fetch_and_and(AI+8, 7);
+  __sync_fetch_and_or(AI+9, 8);
+  __sync_fetch_and_xor(AI+10, 9);
+  __sync_fetch_and_nand(AI+11, 7);
+}
+
+static long AL[12];
+static long init_noret_di[12] = { 0, 0, 0, 1, 0, 0, 0, 0, -1, 0, 0, 0 };
+static long test_noret_di[12] = { 1, 1, 1, 0, 1, 4, 22, -12, 7, 8, 9, 7 };
+
+static void
+do_noret_di (void)
+{
+  __sync_val_compare_and_swap(AL+0, 0, 1);
+  __sync_bool_compare_and_swap(AL+1, 0, 1);
+  __sync_lock_test_and_set(AL+2, 1);
+  __sync_lock_release(AL+3);
+
+  __sync_fetch_and_add(AL+4, 1);
+  __sync_fetch_and_add(AL+5, 4);
+  __sync_fetch_and_add(AL+6, 22);
+  __sync_fetch_and_sub(AL+7, 12);
+  __sync_fetch_and_and(AL+8, 7);
+  __sync_fetch_and_or(AL+9, 8);
+  __sync_fetch_and_xor(AL+10, 9);
+  __sync_fetch_and_nand(AL+11, 7);
+}
+
+int main()
+{
+  memcpy(AI, init_noret_si, sizeof(init_noret_si));
+  memcpy(AL, init_noret_di, sizeof(init_noret_di));
+
+  do_noret_si ();
+  do_noret_di ();
+
+  if (memcmp (AI, test_noret_si, sizeof(test_noret_si)))
+    abort ();
+  if (memcmp (AL, test_noret_di, sizeof(test_noret_di)))
+    abort ();
+
+  return 0;
+}

gcc/testsuite/gcc.dg/ia64-sync-2.c

+/* { dg-do run { target ia64-*-* } } */
+/* { dg-options } */
+
+/* Test basic functionality of the intrinsics.  */
+
+#include <ia64intrin.h>
+
+static int AI[18];
+static int init_si[18] = { 0,0,0,1,0,0,0,0,-1,0,0,0,0,0,-1,0,0,0 };
+static int test_si[18] = { 1,1,1,1,1,4,22,-12,7,8,9,7,1,-12,7,8,9,7 };
+
+static void
+do_si (void)
+{
+  if (__sync_val_compare_and_swap(AI+0, 0, 1) != 0)
+    abort ();
+  if (__sync_val_compare_and_swap(AI+0, 0, 1) != 1)
+    abort ();
+  if (__sync_bool_compare_and_swap(AI+1, 0, 1) != 1)
+    abort ();
+  if (__sync_bool_compare_and_swap(AI+1, 0, 1) != 0)
+    abort ();
+
+  if (__sync_lock_test_and_set(AI+2, 1) != 0)
+    abort ();
+
+  if (__sync_fetch_and_add(AI+4, 1) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AI+5, 4) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AI+6, 22) != 0)
+    abort ();
+  if (__sync_fetch_and_sub(AI+7, 12) != 0)
+    abort ();
+  if (__sync_fetch_and_and(AI+8, 7) != -1)
+    abort ();
+  if (__sync_fetch_and_or(AI+9, 8) != 0)
+    abort ();
+  if (__sync_fetch_and_xor(AI+10, 9) != 0)
+    abort ();
+  if (__sync_fetch_and_nand(AI+11, 7) != 0)
+    abort ();
+
+  if (__sync_add_and_fetch(AI+12, 1) != 1)
+    abort ();
+  if (__sync_sub_and_fetch(AI+13, 12) != -12)
+    abort ();
+  if (__sync_and_and_fetch(AI+14, 7) != 7)
+    abort ();
+  if (__sync_or_and_fetch(AI+15, 8) != 8)
+    abort ();
+  if (__sync_xor_and_fetch(AI+16, 9) != 9)
+    abort ();
+  if (__sync_nand_and_fetch(AI+17, 7) != 7)
+    abort ();
+}
+
+static long AL[18];
+static long init_di[18] = { 0,0,0,1,0,0,0,0,-1,0,0,0,0,0,-1,0,0,0 };
+static long test_di[18] = { 1,1,1,1,1,4,22,-12,7,8,9,7,1,-12,7,8,9,7 };
+
+static void
+do_di (void)
+{
+  if (__sync_val_compare_and_swap(AL+0, 0, 1) != 0)
+    abort ();
+  if (__sync_val_compare_and_swap(AL+0, 0, 1) != 1)
+    abort ();
+  if (__sync_bool_compare_and_swap(AL+1, 0, 1) != 1)
+    abort ();
+  if (__sync_bool_compare_and_swap(AL+1, 0, 1) != 0)
+    abort ();
+
+  if (__sync_lock_test_and_set(AL+2, 1) != 0)
+    abort ();
+
+  if (__sync_fetch_and_add(AL+4, 1) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AL+5, 4) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AL+6, 22) != 0)
+    abort ();
+  if (__sync_fetch_and_sub(AL+7, 12) != 0)
+    abort ();
+  if (__sync_fetch_and_and(AL+8, 7) != -1)
+    abort ();
+  if (__sync_fetch_and_or(AL+9, 8) != 0)
+    abort ();
+  if (__sync_fetch_and_xor(AL+10, 9) != 0)
+    abort ();
+  if (__sync_fetch_and_nand(AL+11, 7) != 0)
+    abort ();
+
+  if (__sync_add_and_fetch(AL+12, 1) != 1)
+    abort ();
+  if (__sync_sub_and_fetch(AL+13, 12) != -12)
+    abort ();
+  if (__sync_and_and_fetch(AL+14, 7) != 7)
+    abort ();
+  if (__sync_or_and_fetch(AL+15, 8) != 8)
+    abort ();
+  if (__sync_xor_and_fetch(AL+16, 9) != 9)
+    abort ();
+  if (__sync_nand_and_fetch(AL+17, 7) != 7)
+    abort ();
+}
+
+int main()
+{
+  memcpy(AI, init_si, sizeof(init_si));
+  memcpy(AL, init_di, sizeof(init_di));
+
+  do_si ();
+  do_di ();
+
+  if (memcmp (AI, test_si, sizeof(test_si)))
+    abort ();
+  if (memcmp (AL, test_di, sizeof(test_di)))
+    abort ();
+
+  return 0;
+}