Commit 0551c32d by Richard Henderson Committed by Richard Henderson

stmt.c (expand_asm_operands): Treat EXTRA_CONSTRAINT like g or X.

	* stmt.c (expand_asm_operands): Treat EXTRA_CONSTRAINT like g or X.

	* config/ia64/ia64-protos.h: Update.
	* config/ia64/ia64.c (gr_register_operand): New.
	(fr_register_operand, grfr_register_operand): New.
	(gr_nonimmediate_operand, grfr_nonimmediate_operand): New.
	(grfr_reg_or_8bit_operand): New.
	(gr_reg_or_0_operand): Rename from reg_or_0_operand and
	use gr_register_operand.
	(gr_reg_or_5bit_operand, gr_reg_or_6bit_operand): Likewise.
	(gr_reg_or_8bit_operand, gr_reg_or_8bit_adjusted_operand): Likewise.
	(gr_reg_or_8bit_and_adjusted_operand): Likewise.
	(gr_reg_or_14bit_operand, gr_reg_or_22bit_operand): Likewise.
	(fr_reg_or_fp01_operand): Likewise.
	(not_postinc_memory_operand): New.
	(ia64_split_timode): Remove unused variables.
	(rtx_needs_barrier): Check arguments to cmpxchg.
	(builtin_description): Remove.
	(bdesc_2argsi, bdesc_2argdi): Remove.
	(ia64_init_builtins): Declare all builtins directly.
	(ia64_expand_fetch_and_op): Rewrite to be called from
	ia64_expand_builtin directly.  Use expand_binop and co.
	(ia64_expand_op_and_fetch): Likewise.
	(ia64_expand_compare_and_swap): Likewise.
	(ia64_expand_binop_builtin): Remove.
	(ia64_expand_lock_test_and_set): New.
	(ia64_expand_lock_release): New.
	(ia64_expand_builtin): Use them.
	* config/ia64/ia64.h (CONSTRAINT_OK_FOR_S): New.
	(EXTRA_CONSTRAINT): Use it.
	(PREDICATE_CODES): Update.
	* config/ia64/ia64.md (*): Use gr_register_operand and co.
	(mf): Indicate that we set memory as well as use it.
	(fetchadd_acq_si): Show memory being modified as well.
	(fetchadd_acq_di, cmpxchg_acq_si, cmpxchg_acq_di): Likewise.
	(val_compare_and_swap_si, val_compare_and_swap_di): Remove.
	(lock_test_and_set_si, lock_test_and_set_di): Remove.
	(fetch_and_add_si, fetch_and_sub_si, fetch_and_or_si): Remove.
	(fetch_and_and_si, fetch_and_xor_si, fetch_and_nand_si): Remove.
	(fetch_and_add_di, fetch_and_sub_di, fetch_and_or_di): Remove.
	(fetch_and_and_di, fetch_and_xor_di, fetch_and_nand_di): Remove.
	(add_and_fetch_di, sub_and_fetch_di, or_and_fetch_di): Remove.
	(and_and_fetch_di, xor_and_fetch_di, nand_and_fetch_di): Remove.
	(add_and_fetch_si, sub_and_fetch_si, or_and_fetch_si): Remove.
	(and_and_fetch_si, xor_and_fetch_si, nand_and_fetch_si): Remove.
	* config/ia64/ia64intrin.h (*): Cast result to the appropriate
	return type.  Pretty print definitions.

From-SVN: r35956
parent 7c866fb5
2000-08-24 Richard Henderson <rth@cygnus.com>
* stmt.c (expand_asm_operands): Treat EXTRA_CONSTRAINT like g or X.
* config/ia64/ia64-protos.h: Update.
* config/ia64/ia64.c (gr_register_operand): New.
(fr_register_operand, grfr_register_operand): New.
(gr_nonimmediate_operand, grfr_nonimmediate_operand): New.
(grfr_reg_or_8bit_operand): New.
(gr_reg_or_0_operand): Rename from reg_or_0_operand and
use gr_register_operand.
(gr_reg_or_5bit_operand, gr_reg_or_6bit_operand): Likewise.
(gr_reg_or_8bit_operand, gr_reg_or_8bit_adjusted_operand): Likewise.
(gr_reg_or_8bit_and_adjusted_operand): Likewise.
(gr_reg_or_14bit_operand, gr_reg_or_22bit_operand): Likewise.
(fr_reg_or_fp01_operand): Likewise.
(not_postinc_memory_operand): New.
(ia64_split_timode): Remove unused variables.
(rtx_needs_barrier): Check arguments to cmpxchg.
(builtin_description): Remove.
(bdesc_2argsi, bdesc_2argdi): Remove.
(ia64_init_builtins): Declare all builtins directly.
(ia64_expand_fetch_and_op): Rewrite to be called from
ia64_expand_builtin directly. Use expand_binop and co.
(ia64_expand_op_and_fetch): Likewise.
(ia64_expand_compare_and_swap): Likewise.
(ia64_expand_binop_builtin): Remove.
(ia64_expand_lock_test_and_set): New.
(ia64_expand_lock_release): New.
(ia64_expand_builtin): Use them.
* config/ia64/ia64.h (CONSTRAINT_OK_FOR_S): New.
(EXTRA_CONSTRAINT): Use it.
(PREDICATE_CODES): Update.
* config/ia64/ia64.md (*): Use gr_register_operand and co.
(mf): Indicate that we set memory as well as use it.
(fetchadd_acq_si): Show memory being modified as well.
(fetchadd_acq_di, cmpxchg_acq_si, cmpxchg_acq_di): Likewise.
(val_compare_and_swap_si, val_compare_and_swap_di): Remove.
(lock_test_and_set_si, lock_test_and_set_di): Remove.
(fetch_and_add_si, fetch_and_sub_si, fetch_and_or_si): Remove.
(fetch_and_and_si, fetch_and_xor_si, fetch_and_nand_si): Remove.
(fetch_and_add_di, fetch_and_sub_di, fetch_and_or_di): Remove.
(fetch_and_and_di, fetch_and_xor_di, fetch_and_nand_di): Remove.
(add_and_fetch_di, sub_and_fetch_di, or_and_fetch_di): Remove.
(and_and_fetch_di, xor_and_fetch_di, nand_and_fetch_di): Remove.
(add_and_fetch_si, sub_and_fetch_si, or_and_fetch_si): Remove.
(and_and_fetch_si, xor_and_fetch_si, nand_and_fetch_si): Remove.
* config/ia64/ia64intrin.h (*): Cast result to the appropriate
return type. Pretty print definitions.
2000-08-24 Jim Wilson <wilson@cygnus.com>
* config/ia64/ia64.md (movdi): Don't call gen_movdi_symbolic if
......
......@@ -34,23 +34,30 @@ extern int symbolic_operand PARAMS((rtx, enum machine_mode));
extern int function_operand PARAMS((rtx, enum machine_mode));
extern int setjmp_operand PARAMS((rtx, enum machine_mode));
extern int move_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_0_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_5bit_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_6bit_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_8bit_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_8bit_adjusted_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_8bit_and_adjusted_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_14bit_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_22bit_operand PARAMS((rtx, enum machine_mode));
extern int gr_register_operand PARAMS((rtx, enum machine_mode));
extern int fr_register_operand PARAMS((rtx, enum machine_mode));
extern int grfr_register_operand PARAMS((rtx, enum machine_mode));
extern int gr_nonimmediate_operand PARAMS((rtx, enum machine_mode));
extern int grfr_nonimmediate_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_0_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_5bit_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_6bit_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_8bit_operand PARAMS((rtx, enum machine_mode));
extern int grfr_reg_or_8bit_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_8bit_adjusted_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_8bit_and_adjusted_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_14bit_operand PARAMS((rtx, enum machine_mode));
extern int gr_reg_or_22bit_operand PARAMS((rtx, enum machine_mode));
extern int shift_count_operand PARAMS((rtx, enum machine_mode));
extern int shift_32bit_count_operand PARAMS((rtx, enum machine_mode));
extern int shladd_operand PARAMS((rtx, enum machine_mode));
extern int fetchadd_operand PARAMS((rtx, enum machine_mode));
extern int reg_or_fp01_operand PARAMS((rtx, enum machine_mode));
extern int fr_reg_or_fp01_operand PARAMS((rtx, enum machine_mode));
extern int normal_comparison_operator PARAMS((rtx, enum machine_mode));
extern int adjusted_comparison_operator PARAMS((rtx, enum machine_mode));
extern int call_multiple_values_operation PARAMS((rtx, enum machine_mode));
extern int destination_operand PARAMS((rtx, enum machine_mode));
extern int not_postinc_memory_operand PARAMS((rtx, enum machine_mode));
extern int predicate_operator PARAMS((rtx, enum machine_mode));
extern int ar_lc_reg_operand PARAMS((rtx, enum machine_mode));
extern int ar_ccv_reg_operand PARAMS((rtx, enum machine_mode));
......@@ -72,10 +79,6 @@ extern void ia64_function_epilogue PARAMS((FILE *, int));
extern int ia64_direct_return PARAMS((void));
extern void ia64_expand_load_address PARAMS((rtx, rtx));
extern void ia64_expand_fetch_and_op PARAMS ((enum fetchop_code,
enum machine_mode, rtx []));
extern void ia64_expand_op_and_fetch PARAMS ((enum fetchop_code,
enum machine_mode, rtx []));
extern void ia64_initialize_trampoline PARAMS((rtx, rtx, rtx));
extern void ia64_print_operand_address PARAMS((FILE *, rtx));
......
......@@ -1114,10 +1114,16 @@ enum reg_class
/* 1..4 for shladd arguments. */
#define CONSTRAINT_OK_FOR_R(VALUE) \
(GET_CODE (VALUE) == CONST_INT && INTVAL (VALUE) >= 1 && INTVAL (VALUE) <= 4)
/* Non-post-inc memory for asms and other unsavory creatures. */
#define CONSTRAINT_OK_FOR_S(VALUE) \
(GET_CODE (VALUE) == MEM \
&& GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != 'a' \
&& (reload_in_progress || memory_operand ((VALUE), VOIDmode)))
#define EXTRA_CONSTRAINT(VALUE, C) \
((C) == 'Q' ? CONSTRAINT_OK_FOR_Q (VALUE) \
: (C) == 'R' ? CONSTRAINT_OK_FOR_R (VALUE) \
: (C) == 'S' ? CONSTRAINT_OK_FOR_S (VALUE) \
: 0)
/* Basic Stack Layout */
......@@ -2642,24 +2648,31 @@ do { \
{ "function_operand", {SYMBOL_REF}}, \
{ "setjmp_operand", {SYMBOL_REF}}, \
{ "destination_operand", {SUBREG, REG, MEM}}, \
{ "not_postinc_memory_operand", {MEM}}, \
{ "move_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
CONSTANT_P_RTX, SYMBOL_REF, CONST, LABEL_REF}}, \
{ "reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
{ "reg_or_5bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "reg_or_8bit_adjusted_operand", {SUBREG, REG, CONST_INT, \
{ "gr_register_operand", {SUBREG, REG}}, \
{ "fr_register_operand", {SUBREG, REG}}, \
{ "grfr_register_operand", {SUBREG, REG}}, \
{ "gr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
{ "grfr_nonimmediate_operand", {SUBREG, REG, MEM}}, \
{ "gr_reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
{ "gr_reg_or_5bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "gr_reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "gr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "grfr_reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "gr_reg_or_8bit_adjusted_operand", {SUBREG, REG, CONST_INT, \
CONSTANT_P_RTX}}, \
{ "reg_or_8bit_and_adjusted_operand", {SUBREG, REG, CONST_INT, \
{ "gr_reg_or_8bit_and_adjusted_operand", {SUBREG, REG, CONST_INT, \
CONSTANT_P_RTX}}, \
{ "reg_or_14bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "reg_or_22bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "gr_reg_or_14bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "gr_reg_or_22bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "shift_count_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{ "shift_32bit_count_operand", {SUBREG, REG, CONST_INT, \
CONSTANT_P_RTX}}, \
{ "shladd_operand", {CONST_INT}}, \
{ "fetchadd_operand", {CONST_INT}}, \
{ "reg_or_fp01_operand", {SUBREG, REG, CONST_DOUBLE}}, \
{ "fr_reg_or_fp01_operand", {SUBREG, REG, CONST_DOUBLE}}, \
{ "normal_comparison_operator", {EQ, NE, GT, LE, GTU, LEU}}, \
{ "adjusted_comparison_operator", {LT, GE, LTU, GEU}}, \
{ "call_multiple_values_operation", {PARALLEL}}, \
......
......@@ -1489,9 +1489,6 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
case 's': case 'i': case 'n':
case 'I': case 'J': case 'K': case 'L': case 'M':
case 'N': case 'O': case 'P': case ',':
#ifdef EXTRA_CONSTRAINT
case 'Q': case 'R': case 'S': case 'T': case 'U':
#endif
break;
case '0': case '1': case '2': case '3': case '4':
......@@ -1511,6 +1508,9 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
break;
case 'g': case 'X':
#ifdef EXTRA_CONSTRAINT
case 'Q': case 'R': case 'S': case 'T': case 'U':
#endif
allows_reg = 1;
allows_mem = 1;
break;
......@@ -1643,13 +1643,10 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
case '<': case '>':
case '?': case '!': case '*':
case 'E': case 'F': case 'G': case 'H': case 'X':
case 'E': case 'F': case 'G': case 'H':
case 's': case 'i': case 'n':
case 'I': case 'J': case 'K': case 'L': case 'M':
case 'N': case 'O': case 'P': case ',':
#ifdef EXTRA_CONSTRAINT
case 'Q': case 'R': case 'S': case 'T': case 'U':
#endif
break;
/* Whether or not a numeric constraint allows a register is
......@@ -1688,7 +1685,11 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
allows_reg = 1;
break;
case 'g':
case 'g': case 'X':
#ifdef EXTRA_CONSTRAINT
case 'Q': case 'R': case 'S': case 'T': case 'U':
#endif
allows_reg = 1;
allows_mem = 1;
break;
......
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