Commit c359831b by Andreas Schwab Committed by Andreas Schwab

* doc/invoke.texi: Remove leading `-' from options in index.

From-SVN: r68343
parent cc0efd0b
2003-06-22 Andreas Schwab <schwab@suse.de>
* doc/invoke.texi: Remove leading `-' from options in index.
2003-06-22 Kazu Hirata <kazu@cs.umass.edu> 2003-06-22 Kazu Hirata <kazu@cs.umass.edu>
* bt-load.c: Follow spelling conventions. * bt-load.c: Follow spelling conventions.
......
...@@ -6451,8 +6451,8 @@ Specify the register to be used for PIC addressing. The default is R10 ...@@ -6451,8 +6451,8 @@ Specify the register to be used for PIC addressing. The default is R10
unless stack-checking is enabled, when R9 is used. unless stack-checking is enabled, when R9 is used.
@item -mcirrus-fix-invalid-insns @item -mcirrus-fix-invalid-insns
@opindex -mcirrus-fix-invalid-insns @opindex mcirrus-fix-invalid-insns
@opindex -mno-cirrus-fix-invalid-insns @opindex mno-cirrus-fix-invalid-insns
Insert NOPs into the instruction stream to in order to work around Insert NOPs into the instruction stream to in order to work around
problems with invalid Maverick instruction combinations. This option problems with invalid Maverick instruction combinations. This option
is only valid if the @option{-mcpu=ep9312} option has been used to is only valid if the @option{-mcpu=ep9312} option has been used to
...@@ -9550,16 +9550,16 @@ the assembler/linker complain about out of range branches within a switch ...@@ -9550,16 +9550,16 @@ the assembler/linker complain about out of range branches within a switch
table. table.
@item -mapp-regs @item -mapp-regs
@opindex -mapp-regs @opindex mapp-regs
This option will cause r2 and r5 to be used in the code generated by This option will cause r2 and r5 to be used in the code generated by
the compiler. This setting is the default. the compiler. This setting is the default.
@item -mno-app-regs @item -mno-app-regs
@opindex -mno-app-regs @opindex mno-app-regs
This option will cause r2 and r5 to be treated as fixed registers. This option will cause r2 and r5 to be treated as fixed registers.
@item -mv850e @item -mv850e
@opindex -mv850e @opindex mv850e
Specify that the target processor is the V850E. The preprocessor Specify that the target processor is the V850E. The preprocessor
constant @samp{__v850e__} will be defined if this option is used. constant @samp{__v850e__} will be defined if this option is used.
...@@ -9571,7 +9571,7 @@ The preprocessor constants @samp{__v850} and @samp{__v851__} are always ...@@ -9571,7 +9571,7 @@ The preprocessor constants @samp{__v850} and @samp{__v851__} are always
defined, regardless of which processor variant is the target. defined, regardless of which processor variant is the target.
@item -mdisable-callt @item -mdisable-callt
@opindex -mdisable-callt @opindex mdisable-callt
This option will suppress generation of the CALLT instruction for the This option will suppress generation of the CALLT instruction for the
v850e flavors of the v850 architecture. The default is v850e flavors of the v850 architecture. The default is
@option{-mno-disable-callt} which allows the CALLT instruction to be used. @option{-mno-disable-callt} which allows the CALLT instruction to be used.
......
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