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riscv-gcc-1
Commit 1e3734f5 by Richard Sandiford Committed by Richard Sandiford
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Make more use of HWI_COMPUTABLE_MODE_P 

This patch uses HWI_COMPUTABLE_MODE_P (X) instead of
GET_MODE_PRECISION (X) <= HOST_BITS_PER_WIDE_INT in cases
where X also needs to be a scalar integer.

2017-10-22  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P.
	(record_promoted_value): Likewise.
	* expr.c (expand_expr_real_2): Likewise.
	* ree.c (update_reg_equal_equiv_notes): Likewise.
	(combine_set_extension): Likewise.
	* rtlanal.c (low_bitmask_len): Likewise.
	* simplify-rtx.c (neg_const_int): Likewise.
	(simplify_binary_operation_1): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r253990
parent e10326ff
Showing with 25 additions and 12 deletions
gcc/ChangeLog
......@@ -2,6 +2,19 @@
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* combine.c (simplify_comparison): Use HWI_COMPUTABLE_MODE_P.
(record_promoted_value): Likewise.
* expr.c (expand_expr_real_2): Likewise.
* ree.c (update_reg_equal_equiv_notes): Likewise.
(combine_set_extension): Likewise.
* rtlanal.c (low_bitmask_len): Likewise.
* simplify-rtx.c (neg_const_int): Likewise.
(simplify_binary_operation_1): Likewise.
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* lra-spills.c (assign_mem_slot): Use subreg_size_lowpart_offset.
* regcprop.c (maybe_mode_change): Likewise.
* reload1.c (alter_reg): Likewise.
gcc/combine.c
......@@ -11976,10 +11976,9 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
if (paradoxical_subreg_p (inner_op0)
&& GET_CODE (inner_op1) == SUBREG
&& HWI_COMPUTABLE_MODE_P (GET_MODE (SUBREG_REG (inner_op0)))
&& (GET_MODE (SUBREG_REG (inner_op0))
== GET_MODE (SUBREG_REG (inner_op1)))
&& (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (inner_op0)))
<= HOST_BITS_PER_WIDE_INT)
&& (0 == ((~c0) & nonzero_bits (SUBREG_REG (inner_op0),
GET_MODE (SUBREG_REG (inner_op0)))))
&& (0 == ((~c1) & nonzero_bits (SUBREG_REG (inner_op1),
......@@ -13318,7 +13317,7 @@ record_promoted_value (rtx_insn *insn, rtx subreg)
unsigned int regno = REGNO (SUBREG_REG (subreg));
machine_mode mode = GET_MODE (subreg);
if (GET_MODE_PRECISION (mode) > HOST_BITS_PER_WIDE_INT)
if (!HWI_COMPUTABLE_MODE_P (mode))
return;
for (links = LOG_LINKS (insn); links;)
......
gcc/expr.c
......@@ -8453,7 +8453,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
if (modifier == EXPAND_STACK_PARM)
target = 0;
if (TREE_CODE (treeop0) == INTEGER_CST
&& GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
&& HWI_COMPUTABLE_MODE_P (mode)
&& TREE_CONSTANT (treeop1))
{
rtx constant_part;
......@@ -8476,7 +8476,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
}
else if (TREE_CODE (treeop1) == INTEGER_CST
&& GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
&& HWI_COMPUTABLE_MODE_P (mode)
&& TREE_CONSTANT (treeop0))
{
rtx constant_part;
......
gcc/ree.c
......@@ -269,7 +269,7 @@ update_reg_equal_equiv_notes (rtx_insn *insn, machine_mode new_mode,
/* Update equivalency constants. Recall that RTL constants are
sign-extended. */
if (GET_CODE (orig_src) == CONST_INT
&& HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (new_mode))
&& HWI_COMPUTABLE_MODE_P (new_mode))
{
if (INTVAL (orig_src) >= 0 || code == SIGN_EXTEND)
/* Nothing needed. */;
......@@ -337,7 +337,7 @@ combine_set_extension (ext_cand *cand, rtx_insn *curr_insn, rtx *orig_set)
/* Merge constants by directly moving the constant into the register under
some conditions. Recall that RTL constants are sign-extended. */
if (GET_CODE (orig_src) == CONST_INT
&& HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (cand->mode))
&& HWI_COMPUTABLE_MODE_P (cand->mode))
{
if (INTVAL (orig_src) >= 0 || cand->code == SIGN_EXTEND)
new_set = gen_rtx_SET (new_reg, orig_src);
......
gcc/rtlanal.c
......@@ -5810,7 +5810,7 @@ low_bitmask_len (machine_mode mode, unsigned HOST_WIDE_INT m)
{
if (mode != VOIDmode)
{
if (GET_MODE_PRECISION (mode) > HOST_BITS_PER_WIDE_INT)
if (!HWI_COMPUTABLE_MODE_P (mode))
return -1;
m &= GET_MODE_MASK (mode);
}
......
gcc/simplify-rtx.c
......@@ -62,7 +62,7 @@ neg_const_int (machine_mode mode, const_rtx i)
{
unsigned HOST_WIDE_INT val = -UINTVAL (i);
if (GET_MODE_PRECISION (mode) > HOST_BITS_PER_WIDE_INT
if (!HWI_COMPUTABLE_MODE_P (mode)
&& val == UINTVAL (i))
return simplify_const_unary_operation (NEG, mode, CONST_CAST_RTX (i),
mode);
......@@ -3341,7 +3341,8 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
return op0;
/* Rotating ~0 always results in ~0. */
if (CONST_INT_P (trueop0) && width <= HOST_BITS_PER_WIDE_INT
if (CONST_INT_P (trueop0)
&& HWI_COMPUTABLE_MODE_P (mode)
&& UINTVAL (trueop0) == GET_MODE_MASK (mode)
&& ! side_effects_p (op1))
return op0;
......@@ -3420,7 +3421,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
goto canonicalize_shift;
case SMIN:
if (width <= HOST_BITS_PER_WIDE_INT
if (HWI_COMPUTABLE_MODE_P (mode)
&& mode_signbit_p (mode, trueop1)
&& ! side_effects_p (op0))
return op1;
......@@ -3432,7 +3433,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
break;
case SMAX:
if (width <= HOST_BITS_PER_WIDE_INT
if (HWI_COMPUTABLE_MODE_P (mode)
&& CONST_INT_P (trueop1)
&& (UINTVAL (trueop1) == GET_MODE_MASK (mode) >> 1)
&& ! side_effects_p (op0))
......
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