config.gcc: Add v850e-*-* target.

2002-08-27  Nick Clifton  <nickc@redhat.com>
            Catherine Moore  <clm@redhat.com>
            Jim Wilson  <wilson@cygnus.com>
        * config.gcc: Add v850e-*-* target.
        Add --with-cpu= support for v850.
        * config/v850/lib1funcs.asm: Add v850e callt functions.
        * config/v850/v850.h: Add support for v850e target.
        * config/v850/v850.c: Add functions to support v850e target.
        * config/v850/v850-protos.h: Add prototypes for new functions in v850.c.
        * config/v850/v850.md: Add patterns for v850e instructions.
        * doc/invoke.texi: Document new v850e command line switches.

Co-Authored-By: Catherine Moore <clm@redhat.com>
Co-Authored-By: Jim Wilson <wilson@cygnus.com>

From-SVN: r56612

gcc/ChangeLog

+2002-08-27  Nick Clifton  <nickc@redhat.com>
+            Catherine Moore  <clm@redhat.com>
+            Jim Wilson  <wilson@cygnus.com>
+
+        * config.gcc: Add v850e-*-* target.
+        Add --with-cpu= support for v850.
+        * config/v850/lib1funcs.asm: Add v850e callt functions.
+        * config/v850/v850.h: Add support for v850e target.
+        * config/v850/v850.c: Add functions to support v850e target.
+        * config/v850/v850-protos.h: Add prototypes for new functions in v850.c.
+        * config/v850/v850.md: Add patterns for v850e instructions.
+        * doc/invoke.texi: Document new v850e command line switches.
+
 Tue Aug 27 18:30:47 2002  J"orn Rennecke <joern.rennecke@superh.com>
 			  Aldy Hernandez <aldyh at redhat dot com>
 

gcc/config.gcc

@@ -2643,6 +2643,21 @@ v850-*-rtems*)
 	c_target_objs="v850-c.o"
 	cxx_target_objs="v850-c.o"
 	;;
+v850e-*-*)
+	target_cpu_default="TARGET_CPU_v850e"
+	tm_file="dbxelf.h elfos.h svr4.h v850/v850.h"
+	tm_p_file=v850/v850-protos.h
+	tmake_file=v850/t-v850
+	md_file=v850/v850.md
+	out_file=v850/v850.c
+	if test x$stabs = xyes
+	then
+		tm_file="${tm_file} dbx.h"
+	fi
+	use_collect2=no
+	c_target_objs="v850-c.o"
+	cxx_target_objs="v850-c.o"
+	;;
 v850-*-*)
 	target_cpu_default="TARGET_CPU_generic"
 	tm_file="dbxelf.h elfos.h svr4.h ${tm_file}"
@@ -2952,6 +2967,22 @@ sparc*-*-*)
 			;;
 	esac
 	;;
+v850*-*-*)
+	case "x$with_cpu" in
+		x)
+			;;
+		v850e)
+			target_cpu_default2="TARGET_CPU_$with_cpu"
+			;;
+		*)
+			if test x$pass2done = xyes
+			then
+				echo "Unknown cpu used with --with-cpu=$with_cpu" 1>&2
+				exit 1
+			fi
+			;;
+	esac
+	;;
 esac
 
 if test "$target_cpu_default2" != ""

gcc/config/v850/t-v850

@@ -29,7 +29,34 @@ LIB1ASMFUNCS	= _mulsi3 \
 		  _save_31c \
 		  _save_varargs \
 		  _save_interrupt \
-		  _save_all_interrupt
+		  _save_all_interrupt \
+                  _callt_save_20 \
+		  _callt_save_21 \
+		  _callt_save_22 \
+		  _callt_save_23 \
+		  _callt_save_24 \
+		  _callt_save_25 \
+		  _callt_save_26 \
+		  _callt_save_27 \
+		  _callt_save_28 \
+		  _callt_save_29 \
+		  _callt_save_20c \
+		  _callt_save_21c \
+		  _callt_save_22c \
+		  _callt_save_23c \
+		  _callt_save_24c \
+		  _callt_save_25c \
+		  _callt_save_26c \
+		  _callt_save_27c \
+		  _callt_save_28c \
+		  _callt_save_29c \
+		  _callt_save_31c \
+		  _callt_save_varargs \
+		  _callt_save_interrupt \
+		  _callt_save_all_interrupt \
+		  _callt_save_r2_r29 \
+		  _callt_save_r2_r31 \
+		  _callt_save_r6_r9
 
 # We want fine grained libraries, so use the new code to build the
 # floating point emulation libraries.
@@ -50,6 +77,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
 	cat $(srcdir)/config/fp-bit.c >> fp-bit.c
 
 TCFLAGS = -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow
+# Create non-target specific versions of the libraries
+TCFLAGS += -mno-app-regs -msmall-sld -mv850 -D__v850e__ -Wa,-mv850any
 
 v850-c.o: $(srcdir)/config/v850/v850-c.c $(RTL_H) $(TREE_H) $(CONFIG_H)
 	$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<

gcc/config/v850/v850-protos.h

@@ -53,6 +53,10 @@ extern void   notice_update_cc              PARAMS ((rtx, rtx));
 extern char * construct_save_jarl           PARAMS ((rtx));
 extern char * construct_restore_jr          PARAMS ((rtx));
 #ifdef HAVE_MACHINE_MODES
+extern char * construct_dispose_instruction PARAMS ((rtx));
+extern char * construct_prepare_instruction PARAMS ((rtx));
+extern int    pattern_is_ok_for_prepare     PARAMS ((rtx, Mmode));
+extern int    pattern_is_ok_for_dispose     PARAMS ((rtx, Mmode));
 extern int    ep_memory_operand             PARAMS ((rtx, Mmode, int));
 extern int    reg_or_0_operand              PARAMS ((rtx, Mmode));
 extern int    reg_or_int5_operand           PARAMS ((rtx, Mmode));

gcc/config/v850/v850.h

@@ -31,8 +31,8 @@ Boston, MA 02111-1307, USA.  */
 #undef STARTFILE_SPEC
 #undef ASM_SPEC
 
-
 #define TARGET_CPU_generic 	1
+#define TARGET_CPU_v850e   	2
 
 #ifndef TARGET_CPU_DEFAULT
 #define TARGET_CPU_DEFAULT	TARGET_CPU_generic
@@ -43,9 +43,22 @@ Boston, MA 02111-1307, USA.  */
 #define SUBTARGET_CPP_SPEC 	"%{!mv*:-D__v850__}"
 #define TARGET_VERSION 		fprintf (stderr, " (NEC V850)");
 
+/* Choose which processor will be the default.
+   We must pass a -mv850xx option to the assembler if no explicit -mv* option
+   is given, because the assembler's processor default may not be correct.  */
+#if TARGET_CPU_DEFAULT == TARGET_CPU_v850e
+#undef  MASK_DEFAULT
+#define MASK_DEFAULT            MASK_V850E
+#undef  SUBTARGET_ASM_SPEC
+#define SUBTARGET_ASM_SPEC 	"%{!mv*:-mv850e}"
+#undef  SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC 	"%{!mv*:-D__v850e__}"
+#undef  TARGET_VERSION
+#define TARGET_VERSION 		fprintf (stderr, " (NEC V850E)");
+#endif
 
 #define ASM_SPEC "%{mv*:-mv%*}"
-#define CPP_SPEC		"%{mv850ea:-D__v850ea__} %{mv850e:-D__v850e__} %{mv850:-D__v850__} %(subtarget_cpp_spec)"
+#define CPP_SPEC		"%{mv850e:-D__v850e__} %{mv850:-D__v850__} %(subtarget_cpp_spec)"
 
 #define EXTRA_SPECS \
  { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
@@ -67,8 +80,15 @@ extern int target_flags;
 
 #define MASK_CPU                0x00000030
 #define MASK_V850               0x00000010
+#define MASK_V850E              0x00000020
+#define MASK_SMALL_SLD          0x00000040
 
 #define MASK_BIG_SWITCH		0x00000100
+#define MASK_NO_APP_REGS        0x00000200
+#define MASK_DISABLE_CALLT      0x00000400
+
+#define MASK_US_BIT_SET         0x00001000
+#define MASK_US_MASK_SET        0x00002000
 
 /* Macros used in the machine description to test the flags.  */
 
@@ -107,8 +127,23 @@ extern int target_flags;
 /* Whether to emit 2 byte per entry or 4 byte per entry switch tables.  */
 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
 
-/* General debug flag */
-#define TARGET_DEBUG (target_flags & MASK_DEBUG)
+/* General debug flag.  */
+#define TARGET_DEBUG 		(target_flags & MASK_DEBUG)
+#define TARGET_V850E   		((target_flags & MASK_V850E) == MASK_V850E)
+
+#define TARGET_US_BIT_SET	(target_flags & MASK_US_BIT_SET)
+
+/* Whether to assume that the SLD.B and SLD.H instructions only have small
+   displacement fields, thus allowing the generated code to run on any of
+   the V850 range of processors.  */
+#define TARGET_SMALL_SLD 	(target_flags & MASK_SMALL_SLD)
+
+/* True if callt will not be used for function prolog & epilog.  */
+#define TARGET_DISABLE_CALLT 	(target_flags & MASK_DISABLE_CALLT)
+
+/* False if r2 and r5 can be used by the compiler.  True if r2
+   and r5 are to be fixed registers (for compatibility with GHS).  */
+#define TARGET_NO_APP_REGS  	(target_flags & MASK_NO_APP_REGS)
 
 /* Macro to define tables used to set the flags.
    This is a list in braces of pairs in braces,
@@ -134,6 +169,19 @@ extern int target_flags;
    { "v850",		 	 MASK_V850,				\
                                 N_("Compile for the v850 processor") },	\
    { "v850",		 	 -(MASK_V850 ^ MASK_CPU), "" },		\
+   { "v850e",			 MASK_V850E, N_("Compile for v850e processor") }, \
+   { "v850e",		        -(MASK_V850E ^ MASK_CPU), "" }, /* Make sure that the other bits are cleared.  */ \
+   { "small-sld",		 MASK_SMALL_SLD, N_("Enable the use of the short load instructions") },	\
+   { "no-small-sld",		-MASK_SMALL_SLD, "" },			\
+   { "disable-callt",            MASK_DISABLE_CALLT, 			\
+       				N_("Do not use the callt instruction") },   \
+   { "no-disable-callt",        -MASK_DISABLE_CALLT, "" },             	\
+   { "US-bit-set",		 (MASK_US_BIT_SET | MASK_US_MASK_SET), "" },	\
+   { "no-US-bit-set",		-MASK_US_BIT_SET, "" },			\
+   { "no-US-bit-set",		 MASK_US_MASK_SET, "" },		\
+   { "app-regs",                -MASK_NO_APP_REGS, ""  },               \
+   { "no-app-regs",              MASK_NO_APP_REGS, 			\
+       				N_("Do not use registers r2 and r5") }, \
    { "big-switch",		 MASK_BIG_SWITCH, 			\
        				N_("Use 4 byte entries in switch tables") },\
    { "",			 MASK_DEFAULT, ""}}
@@ -327,6 +375,17 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
    0,  1,  3,  4,  5, 30, 32, 33	/* fixed registers */		\
 }
 
+/* If TARGET_NO_APP_REGS is not defined then add r2 and r5 to
+   the pool of fixed registers. See PR 14505. */
+#define CONDITIONAL_REGISTER_USAGE  \
+{                                                       \
+  if (TARGET_NO_APP_REGS)                               \
+    {                                                   \
+     fixed_regs[2] = 1;  call_used_regs[2] = 1;         \
+     fixed_regs[5] = 1;  call_used_regs[5] = 1;         \
+    }                                                   \
+}
+
 /* Return number of consecutive hard regs needed starting at reg REGNO
    to hold something of mode MODE.
 
@@ -457,11 +516,11 @@ enum reg_class
 #define CONST_OK_FOR_M(VALUE) ((unsigned)(VALUE) < 0x10000)
 /* 5 bit unsigned immediate in shift instructions */
 #define CONST_OK_FOR_N(VALUE) ((unsigned) (VALUE) <= 31)
+/* 9 bit signed immediate for word multiply instruction.  */
+#define CONST_OK_FOR_O(VALUE) ((unsigned) (VALUE) + 0x100 < 0x200)
 
-#define CONST_OK_FOR_O(VALUE) 0
 #define CONST_OK_FOR_P(VALUE) 0
 
-
 #define CONST_OK_FOR_LETTER_P(VALUE, C)  \
   ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
    (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
@@ -851,7 +910,7 @@ extern int current_function_anonymous_args;
  ((C) == 'Q'   ? ep_memory_operand (OP, GET_MODE (OP), 0)			\
   : (C) == 'R' ? special_symbolref_operand (OP, VOIDmode)		\
   : (C) == 'S' ? (GET_CODE (OP) == SYMBOL_REF && ! ZDA_NAME_P (XSTR (OP, 0))) \
-  : (C) == 'T' ? 0							\
+  : (C) == 'T' ? ep_memory_operand(OP,GET_MODE(OP),TRUE)			\
   : (C) == 'U' ? ((GET_CODE (OP) == SYMBOL_REF && ZDA_NAME_P (XSTR (OP, 0))) \
 		  || (GET_CODE (OP) == CONST				\
 		      && GET_CODE (XEXP (OP, 0)) == PLUS		\
@@ -1136,17 +1195,9 @@ zbss_section ()								\
 #undef  USER_LABEL_PREFIX
 #define USER_LABEL_PREFIX "_"
 
-/* When assemble_integer is used to emit the offsets for a switch
-   table it can encounter (TRUNCATE:HI (MINUS:SI (LABEL_REF:SI) (LABEL_REF:SI))).
-   output_addr_const will normally barf at this, but it is OK to omit
-   the truncate and just emit the difference of the two labels.  The
-   .hword directive will automatically handle the truncation for us.  */
-
-#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)		\
-  if (GET_CODE (x) == TRUNCATE)				\
-    output_addr_const (FILE, XEXP (X, 0));		\
-  else							\
-    goto FAIL;
+#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)  \
+  if (! v850_output_addr_const_extra (FILE, X)) \
+     goto FAIL
 
 /* This says how to output the assembler to define a global
    uninitialized but not common symbol.  */
@@ -1243,10 +1294,12 @@ zbss_section ()								\
 
 /* This is how to output an element of a case-vector that is relative.  */
 
-#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
-  fprintf (FILE, "\t%s .L%d-.L%d\n",					\
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) 		\
+  fprintf (FILE, "\t%s %s.L%d-.L%d%s\n",				\
 	   (TARGET_BIG_SWITCH ? ".long" : ".short"),			\
-	   VALUE, REL)
+	   (! TARGET_BIG_SWITCH && TARGET_V850E ? "(" : ""),		\
+	   VALUE, REL,							\
+	   (! TARGET_BIG_SWITCH && TARGET_V850E ? ")>>1" : ""))
 
 #define ASM_OUTPUT_ALIGN(FILE, LOG)	\
   if ((LOG) != 0)			\
@@ -1426,6 +1479,9 @@ extern union tree_node * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_K
 { "pattern_is_ok_for_prologue",	{ PARALLEL }},				\
 { "pattern_is_ok_for_epilogue",	{ PARALLEL }},				\
 { "register_is_ok_for_epilogue",{ REG }},				\
+{ "pattern_is_ok_for_dispose",	{ PARALLEL }},				\
+{ "pattern_is_ok_for_prepare",	{ PARALLEL }},				\
+{ "register_is_ok_for_dispose",	{ REG }},				\
 { "not_power_of_two_operand",	{ CONST_INT }},
   
 #endif /* ! GCC_V850_H */

gcc/doc/invoke.texi

@@ -577,6 +577,9 @@ in the following sections.
 -mlong-calls  -mno-long-calls  -mep  -mno-ep @gol
 -mprolog-function  -mno-prolog-function  -mspace @gol
 -mtda=@var{n}  -msda=@var{n}  -mzda=@var{n} @gol
+-mapp-regs -mno-app-regs @gol
+-mdisable-callt -mno-disable-callt @gol
+-mv850e @gol
 -mv850  -mbig-switch}
 
 @emph{NS32K Options}
@@ -8682,6 +8685,34 @@ Specify that the target processor is the V850.
 Generate code suitable for big switch tables.  Use this option only if
 the assembler/linker complain about out of range branches within a switch
 table.
+
+@item -mapp-regs
+@opindex -mapp-regs
+This option will cause r2 and r5 to be used in the code generated by
+the compiler.  This setting is the default.
+
+@item -mno-app-regs
+@opindex -mno-app-regs
+This option will cause r2 and r5 to be treated as fixed registers.
+  
+@item -mv850e
+@opindex -mv850e
+Specify that the target processor is the V850E.  The preprocessor
+constant @samp{__v850e__} will be defined if this option is used.
+
+If neither @option{-mv850} nor @option{-mv850e} are defined
+then a default target processor will be chosen and the relevant
+@samp{__v850*__} preprocessor constant will be defined.
+
+The preprocessor constants @samp{__v850} and @samp{__v851__} are always
+defined, regardless of which processor variant is the target.
+
+@item -mdisable-callt
+@opindex -mdisable-callt
+This option will suppress generation of the CALLT instruction for the
+v850e flavors of the v850 architecture.  The default is
+@option{-mno-disable-callt} which allows the CALLT instruction to be used.
+
 @end table
 
 @node ARC Options