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Commit ae4b4a02 by Aldy Hernandez Committed by Aldy Hernandez
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extend.texi: Warn about unsupported usage of altivec builtins. 

2002-01-31  Aldy Hernandez  <aldyh@redhat.com>

        * doc/extend.texi: Warn about unsupported usage of altivec
        builtins.

        * config/rs6000/rs6000.md (altivec_vcmp*_p): Remove.
        (altivec_predicate_*): New.

        * config/rs6000/altivec.h: Rewrite predicates to use new builtins.
        Add C++ version of vec_*() functions.

        * config/rs6000/rs6000.c (bdesc_altivec_preds): New.
        (bdesc_2arg): Remove altivec predicates.
        (altivec_expand_builtin): Handle predicates.
        (altivec_init_builtins): Handle predicates.
        (altivec_expand_predicate_builtin): New.

From-SVN: r49500
parent f6bcf44c
Showing with 270 additions and 111 deletions
gcc/ChangeLog
2002-02-05 Aldy Hernandez <aldyh@redhat.com>
* doc/extend.texi: Warn about unsupported usage of altivec
builtins.
* config/rs6000/rs6000.md (altivec_vcmp*_p): Remove.
(altivec_predicate_*): New.
* config/rs6000/altivec.h: Rewrite predicates to use new builtins.
Add C++ version of vec_*() functions.
* config/rs6000/rs6000.c (bdesc_altivec_preds): New.
(bdesc_2arg): Remove altivec predicates.
(altivec_expand_builtin): Handle predicates.
(altivec_init_builtins): Handle predicates.
(altivec_expand_predicate_builtin): New.
2002-02-04 John David Anglin <dave@hiauly1.hia.nrc.ca>
* pa.c (DO_FRAME_NOTES): Move forward.
......
gcc/config/rs6000/altivec.h
This source diff could not be displayed because it is too large. You can view the blob instead.
gcc/config/rs6000/rs6000.h
......@@ -2938,19 +2938,6 @@ enum rs6000_builtins
ALTIVEC_BUILTIN_VUPKLSB,
ALTIVEC_BUILTIN_VUPKLPX,
ALTIVEC_BUILTIN_VUPKLSH,
ALTIVEC_BUILTIN_VCMPBFP_P,
ALTIVEC_BUILTIN_VCMPEQFP_P,
ALTIVEC_BUILTIN_VCMPEQUB_P,
ALTIVEC_BUILTIN_VCMPEQUH_P,
ALTIVEC_BUILTIN_VCMPEQUW_P,
ALTIVEC_BUILTIN_VCMPGEFP_P,
ALTIVEC_BUILTIN_VCMPGTFP_P,
ALTIVEC_BUILTIN_VCMPGTSB_P,
ALTIVEC_BUILTIN_VCMPGTSH_P,
ALTIVEC_BUILTIN_VCMPGTSW_P,
ALTIVEC_BUILTIN_VCMPGTUB_P,
ALTIVEC_BUILTIN_VCMPGTUH_P,
ALTIVEC_BUILTIN_VCMPGTUW_P,
ALTIVEC_BUILTIN_MTVSCR,
ALTIVEC_BUILTIN_MFVSCR,
ALTIVEC_BUILTIN_DSSALL,
......@@ -2970,5 +2957,18 @@ enum rs6000_builtins
ALTIVEC_BUILTIN_STVEBX,
ALTIVEC_BUILTIN_STVEHX,
ALTIVEC_BUILTIN_STVEWX,
ALTIVEC_BUILTIN_STVXL
ALTIVEC_BUILTIN_STVXL,
ALTIVEC_BUILTIN_VCMPBFP_P,
ALTIVEC_BUILTIN_VCMPEQFP_P,
ALTIVEC_BUILTIN_VCMPEQUB_P,
ALTIVEC_BUILTIN_VCMPEQUH_P,
ALTIVEC_BUILTIN_VCMPEQUW_P,
ALTIVEC_BUILTIN_VCMPGEFP_P,
ALTIVEC_BUILTIN_VCMPGTFP_P,
ALTIVEC_BUILTIN_VCMPGTSB_P,
ALTIVEC_BUILTIN_VCMPGTSH_P,
ALTIVEC_BUILTIN_VCMPGTSW_P,
ALTIVEC_BUILTIN_VCMPGTUB_P,
ALTIVEC_BUILTIN_VCMPGTUH_P,
ALTIVEC_BUILTIN_VCMPGTUW_P
};
gcc/config/rs6000/rs6000.md
......@@ -15318,110 +15318,79 @@
;; AltiVec predicates.
(define_insn "altivec_vcmpequb_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")] 173))]
"TARGET_ALTIVEC"
"vcmpequb. %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_vcmpequh_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")] 174))]
"TARGET_ALTIVEC"
"vcmpequh. %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_vcmpequw_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
(match_operand:V4SI 2 "register_operand" "v")] 175))]
"TARGET_ALTIVEC"
"vcmpequw. %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_vcmpeqfp_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
(match_operand:V4SF 2 "register_operand" "v")] 176))]
(define_expand "cr6_test_for_zero"
[(set (match_operand:SI 0 "register_operand" "=r")
(eq:SI (reg:CC 74)
(const_int 0)))]
"TARGET_ALTIVEC"
"vcmpeqfp. %0,%1,%2"
[(set_attr "type" "veccmp")])
"")
(define_insn "altivec_vcmpgtub_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")] 177))]
(define_expand "cr6_test_for_zero_reverse"
[(set (match_operand:SI 0 "register_operand" "=r")
(eq:SI (reg:CC 74)
(const_int 0)))
(set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))]
"TARGET_ALTIVEC"
"vcmpgtub. %0,%1,%2"
[(set_attr "type" "veccmp")])
"")
(define_insn "altivec_vcmpgtsb_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")] 178))]
(define_expand "cr6_test_for_lt"
[(set (match_operand:SI 0 "register_operand" "=r")
(lt:SI (reg:CC 74)
(const_int 0)))]
"TARGET_ALTIVEC"
"vcmpgtsb. %0,%1,%2"
[(set_attr "type" "veccmp")])
"")
(define_insn "altivec_vcmpgtuw_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
(match_operand:V4SI 2 "register_operand" "v")] 179))]
(define_expand "cr6_test_for_lt_reverse"
[(set (match_operand:SI 0 "register_operand" "=r")
(lt:SI (reg:CC 74)
(const_int 0)))
(set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))]
"TARGET_ALTIVEC"
"vcmpgtuw. %0,%1,%2"
[(set_attr "type" "veccmp")])
"")
(define_insn "altivec_vcmpgtsw_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
(match_operand:V4SI 2 "register_operand" "v")] 180))]
"TARGET_ALTIVEC"
"vcmpgtsw. %0,%1,%2"
[(set_attr "type" "veccmp")])
;; We can get away with generating the opcode on the fly (%3 below)
;; because all the predicates have the same scheduling parameters.
(define_insn "altivec_vcmpgefp_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
(match_operand:V4SF 2 "register_operand" "v")] 181))]
(define_insn "altivec_predicate_v4si"
[(set (reg:CC 74)
(unspec:CC [(match_operand:V4SI 1 "register_operand" "v")
(match_operand:V4SI 2 "register_operand" "v")
(match_operand 3 "any_operand" "")] 173))
(clobber (match_scratch:V4SI 0 "=v"))]
"TARGET_ALTIVEC"
"vcmpgefp. %0,%1,%2"
"%3 %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_vcmpgtfp_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
(match_operand:V4SF 2 "register_operand" "v")] 182))]
(define_insn "altivec_predicate_v4sf"
[(set (reg:CC 74)
(unspec:CC [(match_operand:V4SF 1 "register_operand" "v")
(match_operand:V4SF 2 "register_operand" "v")
(match_operand 3 "any_operand" "")] 174))
(clobber (match_scratch:V4SF 0 "=v"))]
"TARGET_ALTIVEC"
"vcmpgtfp. %0,%1,%2"
"%3 %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_vcmpbfp_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SF 1 "register_operand" "v")
(match_operand:V4SF 2 "register_operand" "v")] 183))]
(define_insn "altivec_predicate_v8hi"
[(set (reg:CC 74)
(unspec:CC [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")
(match_operand 3 "any_operand" "")] 175))
(clobber (match_scratch:V8HI 0 "=v"))]
"TARGET_ALTIVEC"
"vcmpbfp. %0,%1,%2"
"%3 %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_vcmpgtuh_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")] 184))]
(define_insn "altivec_predicate_v16qi"
[(set (reg:CC 74)
(unspec:CC [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")
(match_operand 3 "any_operand" "")] 175))
(clobber (match_scratch:V16QI 0 "=v"))]
"TARGET_ALTIVEC"
"vcmpgtuh. %0,%1,%2"
"%3 %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_vcmpgtsh_p"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")] 185))]
"TARGET_ALTIVEC"
"vcmpgtsh. %0,%1,%2"
[(set_attr "type" "veccmp")])
(define_insn "altivec_mtvscr"
[(unspec [(match_operand:V4SI 0 "register_operand" "v")] 186)]
"TARGET_ALTIVEC"
......
gcc/doc/extend.texi
......@@ -4889,6 +4889,11 @@ The following functions are made available by including
@option{-mabi=altivec}. The functions implement the functionality
described in Motorola's AltiVec Programming Interface Manual.
@emph{Note:} Only the @code{<altivec.h>} interface is supported.
Internally, GCC uses built-in functions to achieve the functionality in
the aforementioned header file, but they are not supported and are
subject to change without notice.
@smallexample
vector signed char vec_abs (vector signed char, vector signed char);
vector signed short vec_abs (vector signed short, vector signed short);
......
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