re PR target/20813 (ICE in gen_reg_rtx for 3 spec tests)

	PR target/20813
	* config/rs6000/aix43.h (SUBSUBTARGET_SWITCHES, aix64): Add
	MASK_PPC_GFXOPT.
	* config/rs6000/aix51.h (SUBSUBTARGET_SWITCHES, aix64): Same.
	* config/rs6000/aix52.h (SUBSUBTARGET_SWITCHES, aix64): Same.
	* config/rs6000/sysv4.h (SUBTARGET_SWITCHES, 64): Same.

From-SVN: r98934

gcc/ChangeLog

+2005-04-28  David Edelsohn  <edelsohn@gnu.org>
+
+	PR target/20813
+	* config/rs6000/aix43.h (SUBSUBTARGET_SWITCHES, aix64): Add
+	MASK_PPC_GFXOPT.
+	* config/rs6000/aix51.h (SUBSUBTARGET_SWITCHES, aix64): Same.
+	* config/rs6000/aix52.h (SUBSUBTARGET_SWITCHES, aix64): Same.
+	* config/rs6000/sysv4.h (SUBTARGET_SWITCHES, 64): Same.
+
 2005-04-28  Richard Earnshaw  <richard.earnshaw@arm.com>
 
 	* arm.c (legitimize_pic_address): Fix sense of assertion test for

gcc/config/rs6000/aix43.h

@@ -23,8 +23,9 @@
 
 /* AIX 4.3 and above support 64-bit executables.  */
 #undef  SUBSUBTARGET_SWITCHES
-#define SUBSUBTARGET_SWITCHES					\
-  {"aix64", 		MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC,	\
+#define SUBSUBTARGET_SWITCHES						\
+  {"aix64", 		MASK_64BIT | MASK_POWERPC64			\
+			  | MASK_POWERPC | MASK_PPC_GFXOPT,		\
    N_("Compile for 64-bit pointers") },					\
   {"aix32",		- (MASK_64BIT | MASK_POWERPC64),		\
    N_("Compile for 32-bit pointers") },					\

gcc/config/rs6000/aix51.h

@@ -22,8 +22,9 @@
 
 /* AIX V5 and above support 64-bit executables.  */
 #undef  SUBSUBTARGET_SWITCHES
-#define SUBSUBTARGET_SWITCHES					\
-  {"aix64", 		MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC,	\
+#define SUBSUBTARGET_SWITCHES						\
+  {"aix64", 		MASK_64BIT | MASK_POWERPC64			\
+			  | MASK_POWERPC | MASK_PPC_GFXOPT,		\
    N_("Compile for 64-bit pointers") },					\
   {"aix32",		- (MASK_64BIT | MASK_POWERPC64),		\
    N_("Compile for 32-bit pointers") },					\

gcc/config/rs6000/aix52.h

@@ -22,8 +22,9 @@
 
 /* AIX V5 and above support 64-bit executables.  */
 #undef  SUBSUBTARGET_SWITCHES
-#define SUBSUBTARGET_SWITCHES					\
-  {"aix64", 		MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC,	\
+#define SUBSUBTARGET_SWITCHES						\
+  {"aix64", 		MASK_64BIT | MASK_POWERPC64			\
+			  | MASK_POWERPC | MASK_PPC_GFXOPT,		\
    N_("Compile for 64-bit pointers") },					\
   {"aix32",		- (MASK_64BIT | MASK_POWERPC64),		\
    N_("Compile for 32-bit pointers") },					\

gcc/config/rs6000/sysv4.h

@@ -132,7 +132,7 @@ extern const char *rs6000_tls_size_string; /* For -mtls-size= */
   { "bit-word",		-MASK_NO_BITFIELD_WORD, "" },			\
   { "no-bit-word",	 MASK_NO_BITFIELD_WORD,				\
     N_("Do not allow bit-fields to cross word boundaries") },		\
-  { "regnames",		  MASK_REGNAMES,				\
+  { "regnames",		 MASK_REGNAMES,					\
     N_("Use alternate register names") },				\
   { "no-regnames",	 -MASK_REGNAMES,				\
     N_("Don't use alternate register names") },				\
@@ -150,7 +150,8 @@ extern const char *rs6000_tls_size_string; /* For -mtls-size= */
     N_("Set the PPC_EMB bit in the ELF flags header") },		\
   { "windiss",		 0, N_("Use the WindISS simulator") },		\
   { "shlib",		 0, N_("no description yet") },			\
-  { "64",		 MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC,	\
+  { "64",		 MASK_64BIT | MASK_POWERPC64			\
+			   | MASK_POWERPC | MASK_PPC_GFXOPT,		\
 			 N_("Generate 64-bit code") },			\
   { "32",		 - (MASK_64BIT | MASK_POWERPC64),		\
 			 N_("Generate 32-bit code") },			\