[AArch64] Add support for arm_sve.h

This patch adds support for arm_sve.h.  I've tried to split all the
groundwork out into separate patches, so this is mostly adding new code
rather than changing existing code.

The C++ frontend seems to handle correct ACLE code without modification,
even in length-agnostic mode.  The C frontend is close; the only correct
construct I know it doesn't handle is initialisation.  E.g.:

  svbool_t pg = svptrue_b8 ();

produces:

  variable-sized object may not be initialized

although:

  svbool_t pg; pg = svptrue_b8 ();

works fine.  This can be fixed by changing:

 	  {
 	    /* A complete type is ok if size is fixed.  */

-	    if (TREE_CODE (TYPE_SIZE (TREE_TYPE (decl))) != INTEGER_CST
+	    if (!poly_int_tree_p (TYPE_SIZE (TREE_TYPE (decl)))
 		|| C_DECL_VARIABLE_SIZE (decl))
 	      {
 		error ("variable-sized object may not be initialized");

in c/c-decl.c:start_decl.

Invalid code is likely to trigger ICEs, so this isn't ready for general
use yet.  However, it seemed better to apply the patch now and deal with
diagnosing invalid code as a follow-up.  For one thing, it means that
we'll be able to provide testcases for middle-end changes related
to SVE vectors, which has been a problem until now.  (I already have
a series of such patches lined up.)

The patch includes some tests, but the main ones need to wait until the
PCS support has been applied.

2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
	    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

gcc/
	* config.gcc (aarch64*-*-*): Add arm_sve.h to extra_headers.
	Add aarch64-sve-builtins.o, aarch64-sve-builtins-shapes.o and
	aarch64-sve-builtins-base.o to extra_objs.  Add
	aarch64-sve-builtins.h and aarch64-sve-builtins.cc to target_gtfiles.
	* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): New rule.
	(aarch64-sve-builtins-shapes.o): Likewise.
	(aarch64-sve-builtins-base.o): New rules.
	* config/aarch64/aarch64-c.c (aarch64_pragma_aarch64): New function.
	(aarch64_resolve_overloaded_builtin): Likewise.
	(aarch64_check_builtin_call): Likewise.
	(aarch64_register_pragmas): Install aarch64_resolve_overloaded_builtin
	and aarch64_check_builtin_call in targetm.  Register the GCC aarch64
	pragma.
	* config/aarch64/aarch64-protos.h (AARCH64_FOR_SVPRFOP): New macro.
	(aarch64_svprfop): New enum.
	(AARCH64_BUILTIN_SVE): New aarch64_builtin_class enum value.
	(aarch64_sve_int_mode, aarch64_sve_data_mode): Declare.
	(aarch64_fold_sve_cnt_pat, aarch64_output_sve_prefetch): Likewise.
	(aarch64_output_sve_cnt_pat_immediate): Likewise.
	(aarch64_output_sve_ptrues, aarch64_sve_ptrue_svpattern_p): Likewise.
	(aarch64_sve_sqadd_sqsub_immediate_p, aarch64_sve_ldff1_operand_p)
	(aarch64_sve_ldnf1_operand_p, aarch64_sve_prefetch_operand_p)
	(aarch64_ptrue_all_mode, aarch64_convert_sve_data_to_pred): Likewise.
	(aarch64_expand_sve_dupq, aarch64_replace_reg_mode): Likewise.
	(aarch64_sve::init_builtins, aarch64_sve::handle_arm_sve_h): Likewise.
	(aarch64_sve::builtin_decl, aarch64_sve::builtin_type_p): Likewise.
	(aarch64_sve::mangle_builtin_type): Likewise.
	(aarch64_sve::resolve_overloaded_builtin): Likewise.
	(aarch64_sve::check_builtin_call, aarch64_sve::gimple_fold_builtin)
	(aarch64_sve::expand_builtin): Likewise.
	* config/aarch64/aarch64.c (aarch64_sve_data_mode): Make public.
	(aarch64_sve_int_mode): Likewise.
	(aarch64_ptrue_all_mode): New function.
	(aarch64_convert_sve_data_to_pred): Make public.
	(svprfop_token): New function.
	(aarch64_output_sve_prefetch): Likewise.
	(aarch64_fold_sve_cnt_pat): Likewise.
	(aarch64_output_sve_cnt_pat_immediate): Likewise.
	(aarch64_sve_move_pred_via_while): Use gen_while with UNSPEC_WHILE_LO
	instead of gen_while_ult.
	(aarch64_replace_reg_mode): Make public.
	(aarch64_init_builtins): Call aarch64_sve::init_builtins.
	(aarch64_fold_builtin): Handle AARCH64_BUILTIN_SVE.
	(aarch64_gimple_fold_builtin, aarch64_expand_builtin): Likewise.
	(aarch64_builtin_decl, aarch64_builtin_reciprocal): Likewise.
	(aarch64_mangle_type): Call aarch64_sve::mangle_type.
	(aarch64_sve_sqadd_sqsub_immediate_p): New function.
	(aarch64_sve_ptrue_svpattern_p): Likewise.
	(aarch64_sve_pred_valid_immediate): Check
	aarch64_sve_ptrue_svpattern_p.
	(aarch64_sve_ldff1_operand_p, aarch64_sve_ldnf1_operand_p)
	(aarch64_sve_prefetch_operand_p, aarch64_output_sve_ptrues): New
	functions.
	* config/aarch64/aarch64.md (UNSPEC_LDNT1_SVE, UNSPEC_STNT1_SVE)
	(UNSPEC_LDFF1_GATHER, UNSPEC_PTRUE, UNSPEC_WHILE_LE, UNSPEC_WHILE_LS)
	(UNSPEC_WHILE_LT, UNSPEC_CLASTA, UNSPEC_UPDATE_FFR)
	(UNSPEC_UPDATE_FFRT, UNSPEC_RDFFR, UNSPEC_WRFFR)
	(UNSPEC_SVE_LANE_SELECT, UNSPEC_SVE_CNT_PAT, UNSPEC_SVE_PREFETCH)
	(UNSPEC_SVE_PREFETCH_GATHER, UNSPEC_SVE_COMPACT, UNSPEC_SVE_SPLICE):
	New unspecs.
	* config/aarch64/iterators.md (SI_ONLY, DI_ONLY, VNx8HI_ONLY)
	(VNx2DI_ONLY, SVE_PARTIAL, VNx8_NARROW, VNx8_WIDE, VNx4_NARROW)
	(VNx4_WIDE, VNx2_NARROW, VNx2_WIDE, PRED_HSD): New mode iterators.
	(UNSPEC_ADR, UNSPEC_BRKA, UNSPEC_BRKB, UNSPEC_BRKN, UNSPEC_BRKPA)
	(UNSPEC_BRKPB, UNSPEC_PFIRST, UNSPEC_PNEXT, UNSPEC_CNTP, UNSPEC_SADDV)
	(UNSPEC_UADDV, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTMAD)
	(UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_CMPEQ_WIDE): New unspecs.
	(UNSPEC_COND_CMPGE_WIDE, UNSPEC_COND_CMPGT_WIDE): Likewise.
	(UNSPEC_COND_CMPHI_WIDE, UNSPEC_COND_CMPHS_WIDE): Likewise.
	(UNSPEC_COND_CMPLE_WIDE, UNSPEC_COND_CMPLO_WIDE): Likewise.
	(UNSPEC_COND_CMPLS_WIDE, UNSPEC_COND_CMPLT_WIDE): Likewise.
	(UNSPEC_COND_CMPNE_WIDE, UNSPEC_COND_FCADD90, UNSPEC_COND_FCADD270)
	(UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90, UNSPEC_COND_FCMLA180)
	(UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN): Likewise.
	(UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX, UNSPEC_COND_FSCALE): Likewise.
	(UNSPEC_LASTA, UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE): Likewise.
	(UNSPEC_LSHIFTRT_WIDE, UNSPEC_LDFF1, UNSPEC_LDNF1): Likewise.
	(Vesize): Handle partial vector modes.
	(self_mask, narrower_mask, sve_lane_con, sve_lane_pair_con): New
	mode attributes.
	(UBINQOPS, ANY_PLUS, SAT_PLUS, ANY_MINUS, SAT_MINUS): New code
	iterators.
	(s, paired_extend, inc_dec): New code attributes.
	(SVE_INT_ADDV, CLAST, LAST): New int iterators.
	(SVE_INT_UNARY): Add UNSPEC_RBIT.
	(SVE_FP_UNARY, SVE_FP_UNARY_INT): New int iterators.
	(SVE_FP_BINARY, SVE_FP_BINARY_INT): Likewise.
	(SVE_COND_FP_UNARY): Add UNSPEC_COND_FRECPX.
	(SVE_COND_FP_BINARY): Add UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and
	UNSPEC_COND_FMULX.
	(SVE_COND_FP_BINARY_INT, SVE_COND_FP_ADD): New int iterators.
	(SVE_COND_FP_SUB, SVE_COND_FP_MUL): Likewise.
	(SVE_COND_FP_BINARY_I1): Add UNSPEC_COND_FMAX and UNSPEC_COND_FMIN.
	(SVE_COND_FP_BINARY_REG): Add UNSPEC_COND_FMULX.
	(SVE_COND_FCADD, SVE_COND_FP_MAXMIN, SVE_COND_FCMLA)
	(SVE_COND_INT_CMP_WIDE, SVE_FP_TERNARY_LANE, SVE_CFP_TERNARY_LANE)
	(SVE_WHILE, SVE_SHIFT_WIDE, SVE_LDFF1_LDNF1, SVE_BRK_UNARY)
	(SVE_BRK_BINARY, SVE_PITER): New int iterators.
	(optab): Handle UNSPEC_SADDV, UNSPEC_UADDV, UNSPEC_FRECPE,
	UNSPEC_FRECPS, UNSPEC_RSQRTE, UNSPEC_RSQRTS, UNSPEC_RBIT,
	UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART, UNSPEC_FMLA, UNSPEC_FMLS,
	UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270,
	UNSPEC_FEXPA, UNSPEC_FTSMUL, UNSPEC_FTSSEL, UNSPEC_COND_FCADD90,
	UNSPEC_COND_FCADD270, UNSPEC_COND_FCMLA, UNSPEC_COND_FCMLA90,
	UNSPEC_COND_FCMLA180, UNSPEC_COND_FCMLA270, UNSPEC_COND_FMAX,
	UNSPEC_COND_FMIN, UNSPEC_COND_FMULX, UNSPEC_COND_FRECPX and
	UNSPEC_COND_FSCALE.
	(maxmin_uns): Handle UNSPEC_COND_FMAX and UNSPEC_COND_FMIN.
	(binqops_op, binqops_op_rev, last_op): New int attributes.
	(su): Handle UNSPEC_SADDV and UNSPEC_UADDV.
	(fn, ab): New int attributes.
	(cmp_op): Handle UNSPEC_COND_CMP*_WIDE and UNSPEC_WHILE_*.
	(while_optab_cmp, brk_op, sve_pred_op): New int attributes.
	(sve_int_op): Handle UNSPEC_SMUL_HIGHPART, UNSPEC_UMUL_HIGHPART,
	UNSPEC_ASHIFT_WIDE, UNSPEC_ASHIFTRT_WIDE, UNSPEC_LSHIFTRT_WIDE and
	UNSPEC_RBIT.
	(sve_fp_op): Handle UNSPEC_FRECPE, UNSPEC_FRECPS, UNSPEC_RSQRTE,
	UNSPEC_RSQRTS, UNSPEC_FMLA, UNSPEC_FMLS, UNSPEC_FEXPA, UNSPEC_FTSMUL,
	UNSPEC_FTSSEL, UNSPEC_COND_FMAX, UNSPEC_COND_FMIN, UNSPEC_COND_FMULX,
	UNSPEC_COND_FRECPX and UNSPEC_COND_FSCALE.
	(sve_fp_op_rev): Handle UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and
	UNSPEC_COND_FMULX.
	(rot): Handle UNSPEC_COND_FCADD* and UNSPEC_COND_FCMLA*.
	(brk_reg_con, brk_reg_opno): New int attributes.
	(sve_pred_fp_rhs1_operand, sve_pred_fp_rhs2_operand): Handle
	UNSPEC_COND_FMAX, UNSPEC_COND_FMIN and UNSPEC_COND_FMULX.
	(sve_pred_fp_rhs2_immediate): Handle UNSPEC_COND_FMAX and
	UNSPEC_COND_FMIN.
	(max_elem_bits): New int attribute.
	(min_elem_bits): Handle UNSPEC_RBIT.
	* config/aarch64/predicates.md (subreg_lowpart_operator): Handle
	TRUNCATE as well as SUBREG.
	(ascending_int_parallel, aarch64_simd_reg_or_minus_one)
	(aarch64_sve_ldff1_operand, aarch64_sve_ldnf1_operand)
	(aarch64_sve_prefetch_operand, aarch64_sve_ptrue_svpattern_immediate)
	(aarch64_sve_qadd_immediate, aarch64_sve_qsub_immediate)
	(aarch64_sve_gather_immediate_b, aarch64_sve_gather_immediate_h)
	(aarch64_sve_gather_immediate_w, aarch64_sve_gather_immediate_d)
	(aarch64_sve_sqadd_operand, aarch64_sve_gather_offset_b)
	(aarch64_sve_gather_offset_h, aarch64_sve_gather_offset_w)
	(aarch64_sve_gather_offset_d, aarch64_gather_scale_operand_b)
	(aarch64_gather_scale_operand_h): New predicates.
	* config/aarch64/constraints.md (UPb, UPd, UPh, UPw, Utf, Utn, vgb)
	(vgd, vgh, vgw, vsQ, vsS): New constraints.
	* config/aarch64/aarch64-sve.md: Add a note on the FFR handling.
	(*aarch64_sve_reinterpret<mode>): Allow any source register
	instead of requiring an exact match.
	(*aarch64_sve_ptruevnx16bi_cc, *aarch64_sve_ptrue<mode>_cc)
	(*aarch64_sve_ptruevnx16bi_ptest, *aarch64_sve_ptrue<mode>_ptest)
	(aarch64_wrffr, aarch64_update_ffr_for_load, aarch64_copy_ffr_to_ffrt)
	(aarch64_rdffr, aarch64_rdffr_z, *aarch64_rdffr_z_ptest)
	(*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc)
	(aarch64_update_ffrt): New patterns.
	(@aarch64_load_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>)
	(@aarch64_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
	(@aarch64_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
	(@aarch64_ld<fn>f1<mode>): New patterns.
	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx8_WIDE:mode><VNx8_NARROW:mode>)
	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
	(@aarch64_ld<fn>f1_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
	(@aarch64_ldnt1<mode>): New patterns.
	(gather_load<mode>): Use aarch64_sve_gather_offset_<Vesize> for
	the scalar part of the address.
	(mask_gather_load<SVE_S:mode>): Use aarch64_sve_gather_offset_w for the
	scalar part of the addresse and add an alternative for handling
	nonzero offsets.
	(mask_gather_load<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d.
	(*mask_gather_load<mode>_sxtw, *mask_gather_load<mode>_uxtw)
	(@aarch64_gather_load_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
	(@aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
	(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw)
	(*aarch64_gather_load_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw)
	(@aarch64_ldff1_gather<SVE_S:mode>, @aarch64_ldff1_gather<SVE_D:mode>)
	(*aarch64_ldff1_gather<mode>_sxtw, *aarch64_ldff1_gather<mode>_uxtw)
	(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode><VNx4_NARROW:mode>)
	(@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>)
	(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_sxtw)
	(*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode><VNx2_NARROW:mode>_uxtw)
	(@aarch64_sve_prefetch<mode>): New patterns.
	(@aarch64_sve_gather_prefetch<SVE_I:mode><VNx4SI_ONLY:mode>)
	(@aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>)
	(*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_sxtw)
	(*aarch64_sve_gather_prefetch<SVE_I:mode><VNx2DI_ONLY:mode>_uxtw)
	(@aarch64_store_trunc<VNx8_NARROW:mode><VNx8_WIDE:mode>)
	(@aarch64_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
	(@aarch64_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
	(@aarch64_stnt1<mode>): New patterns.
	(scatter_store<mode>): Use aarch64_sve_gather_offset_<Vesize> for
	the scalar part of the address.
	(mask_scatter_store<SVE_S:mode>): Use aarch64_sve_gather_offset_w for
	the scalar part of the addresse and add an alternative for handling
	nonzero offsets.
	(mask_scatter_store<SVE_D:mode>): Likewise aarch64_sve_gather_offset_d.
	(*mask_scatter_store<mode>_sxtw, *mask_scatter_store<mode>_uxtw)
	(@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
	(@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
	(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
	(*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw):
	New patterns.
	(vec_duplicate<mode>): Use QI as the mode of the input operand.
	(extract_last_<mode>): Generalize to...
	(@extract_<LAST:last_op>_<mode>): ...this.
	(*<SVE_INT_UNARY:optab><mode>2): Rename to...
	(@aarch64_pred_<SVE_INT_UNARY:optab><mode>): ...this.
	(@cond_<SVE_INT_UNARY:optab><mode>): New expander.
	(@aarch64_pred_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): New pattern.
	(@aarch64_cond_sxt<SVE_HSDI:mode><SVE_PARTIAL:mode>): Likewise.
	(@aarch64_pred_cnot<mode>, @cond_cnot<mode>): New expanders.
	(@aarch64_sve_<SVE_FP_UNARY_INT:optab><mode>): New pattern.
	(@aarch64_sve_<SVE_FP_UNARY:optab><mode>): Likewise.
	(*<SVE_COND_FP_UNARY:optab><mode>2): Rename to...
	(@aarch64_pred_<SVE_COND_FP_UNARY:optab><mode>): ...this.
	(@cond_<SVE_COND_FP_UNARY:optab><mode>): New expander.
	(*<SVE_INT_BINARY_IMM:optab><mode>3): Rename to...
	(@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>): ...this.
	(@aarch64_adr<mode>, *aarch64_adr_sxtw): New patterns.
	(*aarch64_adr_uxtw_unspec): Likewise.
	(*aarch64_adr_uxtw): Rename to...
	(*aarch64_adr_uxtw_and): ...this.
	(@aarch64_adr<mode>_shift): New expander.
	(*aarch64_adr_shift_sxtw): New pattern.
	(aarch64_<su>abd<mode>_3): Rename to...
	(@aarch64_pred_<su>abd<mode>): ...this.
	(<su>abd<mode>_3): Update accordingly.
	(@aarch64_cond_<su>abd<mode>): New expander.
	(@aarch64_<SBINQOPS:su_optab><optab><mode>): New pattern.
	(@aarch64_<UBINQOPS:su_optab><optab><mode>): Likewise.
	(*<su>mul<mode>3_highpart): Rename to...
	(@aarch64_pred_<optab><mode>): ...this.
	(@cond_<MUL_HIGHPART:optab><mode>): New expander.
	(*cond_<MUL_HIGHPART:optab><mode>_2): New pattern.
	(*cond_<MUL_HIGHPART:optab><mode>_z): Likewise.
	(*<SVE_INT_BINARY_SD:optab><mode>3): Rename to...
	(@aarch64_pred_<SVE_INT_BINARY_SD:optab><mode>): ...this.
	(cond_<SVE_INT_BINARY_SD:optab><mode>): Add a "@" marker.
	(@aarch64_bic<mode>, @cond_bic<mode>): New expanders.
	(*v<ASHIFT:optab><mode>3): Rename to...
	(@aarch64_pred_<ASHIFT:optab><mode>): ...this.
	(@aarch64_sve_<SVE_SHIFT_WIDE:sve_int_op><mode>): New pattern.
	(@cond_<SVE_SHIFT_WIDE:sve_int_op><mode>): New expander.
	(*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_m): New pattern.
	(*cond_<SVE_SHIFT_WIDE:sve_int_op><mode>_z): Likewise.
	(@cond_asrd<mode>): New expander.
	(*cond_asrd<mode>_2, *cond_asrd<mode>_z): New patterns.
	(sdiv_pow2<mode>3): Expand to *cond_asrd<mode>_2.
	(*sdiv_pow2<mode>3): Delete.
	(@cond_<SVE_COND_FP_BINARY_INT:optab><mode>): New expander.
	(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): New pattern.
	(*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any): Likewise.
	(@aarch64_sve_<SVE_FP_BINARY:optab><mode>): New pattern.
	(@aarch64_sve_<SVE_FP_BINARY_INT:optab><mode>): Likewise.
	(*<SVE_COND_FP_BINARY_REG:optab><mode>3): Rename to...
	(@aarch64_pred_<SVE_COND_FP_BINARY_REG:optab><mode>): ...this.
	(@aarch64_pred_<SVE_COND_FP_BINARY_INT:optab><mode>): New pattern.
	(cond_<SVE_COND_FP_BINARY:optab><mode>): Add a "@" marker.
	(*add<SVE_F:mode>3): Rename to...
	(@aarch64_pred_add<SVE_F:mode>): ...this and add alternatives
	for SVE_STRICT_GP.
	(@aarch64_pred_<SVE_COND_FCADD:optab><mode>): New pattern.
	(@cond_<SVE_COND_FCADD:optab><mode>): New expander.
	(*cond_<SVE_COND_FCADD:optab><mode>_2): New pattern.
	(*cond_<SVE_COND_FCADD:optab><mode>_any): Likewise.
	(*sub<SVE_F:mode>3): Rename to...
	(@aarch64_pred_sub<SVE_F:mode>): ...this and add alternatives
	for SVE_STRICT_GP.
	(@aarch64_pred_abd<SVE_F:mode>): New expander.
	(*fabd<SVE_F:mode>3): Rename to...
	(*aarch64_pred_abd<SVE_F:mode>): ...this.
	(@aarch64_cond_abd<SVE_F:mode>): New expander.
	(*mul<SVE_F:mode>3): Rename to...
	(@aarch64_pred_<SVE_F:optab><mode>): ...this and add alternatives
	for SVE_STRICT_GP.
	(@aarch64_mul_lane_<SVE_F:mode>): New pattern.
	(*<SVE_COND_FP_MAXMIN_PUBLIC:optab><mode>3): Rename and generalize
	to...
	(@aarch64_pred_<SVE_COND_FP_MAXMIN:optab><mode>): ...this.
	(*<LOGICAL:optab><PRED_ALL:mode>3_ptest): New pattern.
	(*<nlogical><PRED_ALL:mode>3): Rename to...
	(aarch64_pred_<nlogical><PRED_ALL:mode>_z): ...this.
	(*<nlogical><PRED_ALL:mode>3_cc): New pattern.
	(*<nlogical><PRED_ALL:mode>3_ptest): Likewise.
	(*<logical_nn><PRED_ALL:mode>3): Rename to...
	(aarch64_pred_<logical_nn><mode>_z): ...this.
	(*<logical_nn><PRED_ALL:mode>3_cc): New pattern.
	(*<logical_nn><PRED_ALL:mode>3_ptest): Likewise.
	(*fma<SVE_I:mode>4): Rename to...
	(@aarch64_pred_fma<SVE_I:mode>): ...this.
	(*fnma<SVE_I:mode>4): Rename to...
	(@aarch64_pred_fnma<SVE_I:mode>): ...this.
	(@aarch64_<sur>dot_prod_lane<vsi2qi>): New pattern.
	(*<SVE_FP_TERNARY:optab><mode>4): Rename to...
	(@aarch64_pred_<SVE_FP_TERNARY:optab><mode>): ...this.
	(cond_<SVE_FP_TERNARY:optab><mode>): Add a "@" marker.
	(@aarch64_<SVE_FP_TERNARY_LANE:optab>_lane_<mode>): New pattern.
	(@aarch64_pred_<SVE_COND_FCMLA:optab><mode>): Likewise.
	(@cond_<SVE_COND_FCMLA:optab><mode>): New expander.
	(*cond_<SVE_COND_FCMLA:optab><mode>_4): New pattern.
	(*cond_<SVE_COND_FCMLA:optab><mode>_any): Likewise.
	(@aarch64_<FCMLA:optab>_lane_<mode>): Likewise.
	(@aarch64_sve_tmad<mode>): Likewise.
	(vcond_mask_<SVE_ALL:mode><vpred>): Add a "@" marker.
	(*aarch64_sel_dup<mode>): Rename to...
	(@aarch64_sel_dup<mode>): ...this.
	(@aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide): New pattern.
	(*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_cc): Likewise.
	(*aarch64_pred_cmp<cmp_op><SVE_I:mode>_wide_ptest): Likewise.
	(@while_ult<GPI:mode><PRED_ALL:mode>): Generalize to...
	(@while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>): ...this.
	(*while_ult<GPI:mode><PRED_ALL:mode>_cc): Generalize to.
	(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_cc): ...this.
	(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): New pattern.
	(*fcm<cmp_op><mode>): Rename to...
	(@aarch64_pred_fcm<cmp_op><mode>): ...this.  Make operand order
	match @aarch64_pred_cmp<cmp_op><SVE_I:mode>.
	(*fcmuo<mode>): Rename to...
	(@aarch64_pred_fcmuo<mode>): ...this.  Make operand order
	match @aarch64_pred_cmp<cmp_op><SVE_I:mode>.
	(@aarch64_pred_fac<cmp_op><mode>): New expander.
	(@vcond_mask_<PRED_ALL:mode><mode>): New pattern.
	(fold_extract_last_<mode>): Generalize to...
	(@fold_extract_<last_op>_<mode>): ...this.
	(@aarch64_fold_extract_vector_<last_op>_<mode>): New pattern.
	(*reduc_plus_scal_<SVE_I:mode>): Replace with...
	(@aarch64_pred_reduc_<optab>_<mode>): ...this pattern, making the
	DImode result explicit.
	(reduc_plus_scal_<mode>): Update accordingly.
	(*reduc_<optab>_scal_<SVE_I:mode>): Rename to...
	(@aarch64_pred_reduc_<optab>_<SVE_I:mode>): ...this.
	(*reduc_<optab>_scal_<SVE_F:mode>): Rename to...
	(@aarch64_pred_reduc_<optab>_<SVE_F:mode>): ...this.
	(*aarch64_sve_tbl<mode>): Rename to...
	(@aarch64_sve_tbl<mode>): ...this.
	(@aarch64_sve_compact<mode>): New pattern.
	(*aarch64_sve_dup_lane<mode>): Rename to...
	(@aarch64_sve_dup_lane<mode>): ...this.
	(@aarch64_sve_dupq_lane<mode>): New pattern.
	(@aarch64_sve_splice<mode>): Likewise.
	(aarch64_sve_<perm_insn><mode>): Rename to...
	(@aarch64_sve_<perm_insn><mode>): ...this.
	(*aarch64_sve_ext<mode>): Rename to...
	(@aarch64_sve_ext<mode>): ...this.
	(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): Add a "@" marker.
	(*aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): Rename
	to...
	(@aarch64_sve_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): ...this.
	(*aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
	Rename to...
	(@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
	...this.
	(@cond_<optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>): New expander.
	(@cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): Likewise.
	(*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): New pattern.
	(*aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): Rename
	to...
	(@aarch64_sve_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): ...this.
	(aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Add
	a "@" marker.
	(@cond_<optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>): New expander.
	(@cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): Likewise.
	(*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): New
	pattern.
	(*aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): Rename to...
	(@aarch64_sve_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): ...this.
	(@cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New expander.
	(*cond_<optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>): New pattern.
	(aarch64_sve_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): Add a
	"@" marker.
	(@cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New expander.
	(*cond_<optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>): New pattern.
	(aarch64_sve_punpk<perm_hilo>_<mode>): Add a "@" marker.
	(@aarch64_brk<SVE_BRK_UNARY:brk_op>): New pattern.
	(*aarch64_brk<SVE_BRK_UNARY:brk_op>_cc): Likewise.
	(*aarch64_brk<SVE_BRK_UNARY:brk_op>_ptest): Likewise.
	(@aarch64_brk<SVE_BRK_BINARY:brk_op>): Likewise.
	(*aarch64_brk<SVE_BRK_BINARY:brk_op>_cc): Likewise.
	(*aarch64_brk<SVE_BRK_BINARY:brk_op>_ptest): Likewise.
	(@aarch64_sve_<SVE_PITER:sve_pred_op><mode>): Likewise.
	(*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_cc): Likewise.
	(*aarch64_sve_<SVE_PITER:sve_pred_op><mode>_ptest): Likewise.
	(aarch64_sve_cnt_pat): Likewise.
	(@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode>_pat): Likewise.
	(*aarch64_sve_incsi_pat): Likewise.
	(@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode>_pat): Likewise.
	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise.
	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise.
	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander.
	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern.
	(@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode>_pat): Likewise.
	(*aarch64_sve_decsi_pat): Likewise.
	(@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode>_pat): Likewise.
	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_pat): Likewise.
	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_pat): Likewise.
	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New expander.
	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_pat): New pattern.
	(@aarch64_pred_cntp<mode>): Likewise.
	(@aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp):
	New expander.
	(*aarch64_sve_<ANY_PLUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp)
	(*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns.
	(@aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
	New expander.
	(*aarch64_sve_<SAT_PLUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
	New pattern.
	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New expander.
	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern.
	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New expander.
	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern.
	(@aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New expander.
	(*aarch64_sve_<ANY_PLUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern.
	(@aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp):
	New expander.
	(*aarch64_sve_<ANY_MINUS:inc_dec><DI_ONLY:mode><PRED_ALL:mode>_cntp)
	(*aarch64_incsi<PRED_ALL:mode>_cntp): New patterns.
	(@aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
	New expander.
	(*aarch64_sve_<SAT_MINUS:inc_dec><SI_ONLY:mode><PRED_ALL:mode>_cntp):
	New pattern.
	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New
	expander.
	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx2DI_ONLY:mode>_cntp): New pattern.
	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New
	expander.
	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx4SI_ONLY:mode>_cntp): New pattern.
	(@aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New
	expander.
	(*aarch64_sve_<ANY_MINUS:inc_dec><VNx8HI_ONLY:mode>_cntp): New pattern.
	* config/aarch64/arm_sve.h: New file.
	* config/aarch64/aarch64-sve-builtins.h: Likewise.
	* config/aarch64/aarch64-sve-builtins.cc: Likewise.
	* config/aarch64/aarch64-sve-builtins.def: Likewise.
	* config/aarch64/aarch64-sve-builtins-base.h: Likewise.
	* config/aarch64/aarch64-sve-builtins-base.cc: Likewise.
	* config/aarch64/aarch64-sve-builtins-base.def: Likewise.
	* config/aarch64/aarch64-sve-builtins-functions.h: Likewise.
	* config/aarch64/aarch64-sve-builtins-shapes.h: Likewise.
	* config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise.

gcc/testsuite/
	* g++.target/aarch64/sve/acle/aarch64-sve-acle.exp: New file.
	* g++.target/aarch64/sve/acle/general-c++: New test directory.
	* gcc.target/aarch64/sve/acle/aarch64-sve-acle.exp: New file.
	* gcc.target/aarch64/sve/acle/general: New test directory.
	* gcc.target/aarch64/sve/acle/general-c: Likewise.

Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>

From-SVN: r277563

gcc/config.gcc

@@ -315,12 +315,12 @@ m32c*-*-*)
         ;;
 aarch64*-*-*)
 	cpu_type=aarch64
-	extra_headers="arm_fp16.h arm_neon.h arm_acle.h"
+	extra_headers="arm_fp16.h arm_neon.h arm_acle.h arm_sve.h"
 	c_target_objs="aarch64-c.o"
 	cxx_target_objs="aarch64-c.o"
 	d_target_objs="aarch64-d.o"
-	extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o aarch64-speculation.o falkor-tag-collision-avoidance.o aarch64-bti-insert.o"
-	target_gtfiles="\$(srcdir)/config/aarch64/aarch64-builtins.c"
+	extra_objs="aarch64-builtins.o aarch-common.o aarch64-sve-builtins.o aarch64-sve-builtins-shapes.o aarch64-sve-builtins-base.o cortex-a57-fma-steering.o aarch64-speculation.o falkor-tag-collision-avoidance.o aarch64-bti-insert.o"
+	target_gtfiles="\$(srcdir)/config/aarch64/aarch64-builtins.c \$(srcdir)/config/aarch64/aarch64-sve-builtins.h \$(srcdir)/config/aarch64/aarch64-sve-builtins.cc"
 	target_has_targetm_common=yes
 	;;
 alpha*-*-*)

gcc/config/aarch64/aarch64-c.c

@@ -243,6 +243,73 @@ aarch64_pragma_target_parse (tree args, tree pop_target)
   return true;
 }
 
+/* Implement "#pragma GCC aarch64".  */
+static void
+aarch64_pragma_aarch64 (cpp_reader *)
+{
+  tree x;
+  if (pragma_lex (&x) != CPP_STRING)
+    {
+      error ("%<#pragma GCC aarch64%> requires a string parameter");
+      return;
+    }
+
+  const char *name = TREE_STRING_POINTER (x);
+  if (strcmp (name, "arm_sve.h") == 0)
+    aarch64_sve::handle_arm_sve_h ();
+  else
+    error ("unknown %<#pragma GCC aarch64%> option %qs", name);
+}
+
+/* Implement TARGET_RESOLVE_OVERLOADED_BUILTIN.  */
+static tree
+aarch64_resolve_overloaded_builtin (unsigned int uncast_location,
+				    tree fndecl, void *uncast_arglist)
+{
+  vec<tree, va_gc> empty = {};
+  location_t location = (location_t) uncast_location;
+  vec<tree, va_gc> *arglist = (uncast_arglist
+			       ? (vec<tree, va_gc> *) uncast_arglist
+			       : &empty);
+  unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+  unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+  tree new_fndecl;
+  switch (code & AARCH64_BUILTIN_CLASS)
+    {
+    case AARCH64_BUILTIN_GENERAL:
+      return NULL_TREE;
+
+    case AARCH64_BUILTIN_SVE:
+      new_fndecl = aarch64_sve::resolve_overloaded_builtin (location, subcode,
+							    arglist);
+      break;
+    }
+  if (new_fndecl == NULL_TREE || new_fndecl == error_mark_node)
+    return new_fndecl;
+  return build_function_call_vec (location, vNULL, new_fndecl, arglist,
+				  NULL, fndecl);
+}
+
+/* Implement TARGET_CHECK_BUILTIN_CALL.  */
+static bool
+aarch64_check_builtin_call (location_t loc, vec<location_t> arg_loc,
+			    tree fndecl, tree orig_fndecl,
+			    unsigned int nargs, tree *args)
+{
+  unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+  unsigned int subcode = code >> AARCH64_BUILTIN_SHIFT;
+  switch (code & AARCH64_BUILTIN_CLASS)
+    {
+    case AARCH64_BUILTIN_GENERAL:
+      return true;
+
+    case AARCH64_BUILTIN_SVE:
+      return aarch64_sve::check_builtin_call (loc, arg_loc, subcode,
+					      orig_fndecl, nargs, args);
+    }
+  gcc_unreachable ();
+}
+
 /* Implement REGISTER_TARGET_PRAGMAS.  */
 
 void
@@ -250,4 +317,9 @@ aarch64_register_pragmas (void)
 {
   /* Update pragma hook to allow parsing #pragma GCC target.  */
   targetm.target_option.pragma_parse = aarch64_pragma_target_parse;
+
+  targetm.resolve_overloaded_builtin = aarch64_resolve_overloaded_builtin;
+  targetm.check_builtin_call = aarch64_check_builtin_call;
+
+  c_register_pragma ("GCC", "aarch64", aarch64_pragma_aarch64);
 }

gcc/config/aarch64/aarch64-protos.h

@@ -426,11 +426,31 @@ extern struct tune_params aarch64_tune_params;
   T (MUL3, mul3, 30) \
   T (ALL, all, 31)
 
+/* The available SVE prefetch operations, known in the ACLE as "svprfop".  */
+#define AARCH64_FOR_SVPRFOP(T) \
+  T (PLDL1KEEP, pldl1keep, 0) \
+  T (PLDL1STRM, pldl1strm, 1) \
+  T (PLDL2KEEP, pldl2keep, 2) \
+  T (PLDL2STRM, pldl2strm, 3) \
+  T (PLDL3KEEP, pldl3keep, 4) \
+  T (PLDL3STRM, pldl3strm, 5) \
+  T (PSTL1KEEP, pstl1keep, 8) \
+  T (PSTL1STRM, pstl1strm, 9) \
+  T (PSTL2KEEP, pstl2keep, 10) \
+  T (PSTL2STRM, pstl2strm, 11) \
+  T (PSTL3KEEP, pstl3keep, 12) \
+  T (PSTL3STRM, pstl3strm, 13)
+
 #define AARCH64_SVENUM(UPPER, LOWER, VALUE) AARCH64_SV_##UPPER = VALUE,
 enum aarch64_svpattern {
   AARCH64_FOR_SVPATTERN (AARCH64_SVENUM)
   AARCH64_NUM_SVPATTERNS
 };
+
+enum aarch64_svprfop {
+  AARCH64_FOR_SVPRFOP (AARCH64_SVENUM)
+  AARCH64_NUM_SVPRFOPS
+};
 #undef AARCH64_SVENUM
 
 /* It's convenient to divide the built-in function codes into groups,
@@ -438,7 +458,8 @@ enum aarch64_svpattern {
    those groups.  */
 enum aarch64_builtin_class
 {
-  AARCH64_BUILTIN_GENERAL
+  AARCH64_BUILTIN_GENERAL,
+  AARCH64_BUILTIN_SVE
 };
 
 /* Built-in function codes are structured so that the low
@@ -489,8 +510,11 @@ bool aarch64_masks_and_shift_for_bfi_p (scalar_int_mode, unsigned HOST_WIDE_INT,
 					unsigned HOST_WIDE_INT);
 bool aarch64_zero_extend_const_eq (machine_mode, rtx, machine_mode, rtx);
 bool aarch64_move_imm (HOST_WIDE_INT, machine_mode);
+machine_mode aarch64_sve_int_mode (machine_mode);
 opt_machine_mode aarch64_sve_pred_mode (unsigned int);
+opt_machine_mode aarch64_sve_data_mode (scalar_mode, poly_uint64);
 bool aarch64_sve_mode_p (machine_mode);
+HOST_WIDE_INT aarch64_fold_sve_cnt_pat (aarch64_svpattern, unsigned int);
 bool aarch64_sve_cnt_immediate_p (rtx);
 bool aarch64_sve_scalar_inc_dec_immediate_p (rtx);
 bool aarch64_sve_addvl_addpl_immediate_p (rtx);
@@ -501,7 +525,9 @@ bool aarch64_mov_operand_p (rtx, machine_mode);
 rtx aarch64_reverse_mask (machine_mode, unsigned int);
 bool aarch64_offset_7bit_signed_scaled_p (machine_mode, poly_int64);
 bool aarch64_offset_9bit_signed_unscaled_p (machine_mode, poly_int64);
+char *aarch64_output_sve_prefetch (const char *, rtx, const char *);
 char *aarch64_output_sve_cnt_immediate (const char *, const char *, rtx);
+char *aarch64_output_sve_cnt_pat_immediate (const char *, const char *, rtx *);
 char *aarch64_output_sve_scalar_inc_dec (rtx);
 char *aarch64_output_sve_addvl_addpl (rtx);
 char *aarch64_output_sve_vector_inc_dec (const char *, rtx);
@@ -509,6 +535,7 @@ char *aarch64_output_scalar_simd_mov_immediate (rtx, scalar_int_mode);
 char *aarch64_output_simd_mov_immediate (rtx, unsigned,
 			enum simd_immediate_check w = AARCH64_CHECK_MOV);
 char *aarch64_output_sve_mov_immediate (rtx);
+char *aarch64_output_sve_ptrues (rtx);
 bool aarch64_pad_reg_upward (machine_mode, const_tree, bool);
 bool aarch64_regno_ok_for_base_p (int, bool);
 bool aarch64_regno_ok_for_index_p (int, bool);
@@ -517,11 +544,13 @@ bool aarch64_simd_check_vect_par_cnst_half (rtx op, machine_mode mode,
 					    bool high);
 bool aarch64_simd_scalar_immediate_valid_for_move (rtx, scalar_int_mode);
 bool aarch64_simd_shift_imm_p (rtx, machine_mode, bool);
+bool aarch64_sve_ptrue_svpattern_p (rtx, struct simd_immediate_info *);
 bool aarch64_simd_valid_immediate (rtx, struct simd_immediate_info *,
 			enum simd_immediate_check w = AARCH64_CHECK_MOV);
 rtx aarch64_check_zero_based_sve_index_immediate (rtx);
 bool aarch64_sve_index_immediate_p (rtx);
 bool aarch64_sve_arith_immediate_p (rtx, bool);
+bool aarch64_sve_sqadd_sqsub_immediate_p (rtx, bool);
 bool aarch64_sve_bitmask_immediate_p (rtx);
 bool aarch64_sve_dup_immediate_p (rtx);
 bool aarch64_sve_cmp_immediate_p (rtx, bool);
@@ -552,7 +581,10 @@ rtx aarch64_simd_gen_const_vector_dup (machine_mode, HOST_WIDE_INT);
 bool aarch64_simd_mem_operand_p (rtx);
 bool aarch64_sve_ld1r_operand_p (rtx);
 bool aarch64_sve_ld1rq_operand_p (rtx);
+bool aarch64_sve_ldff1_operand_p (rtx);
+bool aarch64_sve_ldnf1_operand_p (rtx);
 bool aarch64_sve_ldr_operand_p (rtx);
+bool aarch64_sve_prefetch_operand_p (rtx, machine_mode);
 bool aarch64_sve_struct_memory_operand_p (rtx);
 rtx aarch64_simd_vect_par_cnst_half (machine_mode, int, bool);
 rtx aarch64_gen_stepped_int_parallel (unsigned int, int, int);
@@ -568,6 +600,9 @@ const char * aarch64_output_probe_sve_stack_clash (rtx, rtx, rtx, rtx);
 void aarch64_err_no_fpadvsimd (machine_mode);
 void aarch64_expand_epilogue (bool);
 rtx aarch64_ptrue_all (unsigned int);
+opt_machine_mode aarch64_ptrue_all_mode (rtx);
+rtx aarch64_convert_sve_data_to_pred (rtx, machine_mode, rtx);
+rtx aarch64_expand_sve_dupq (rtx, machine_mode, rtx);
 void aarch64_expand_mov_immediate (rtx, rtx);
 rtx aarch64_ptrue_reg (machine_mode);
 rtx aarch64_pfalse_reg (machine_mode);
@@ -576,6 +611,7 @@ bool aarch64_sve_same_pred_for_ptest_p (rtx *, rtx *);
 void aarch64_emit_sve_pred_move (rtx, rtx, rtx);
 void aarch64_expand_sve_mem_move (rtx, rtx, machine_mode);
 bool aarch64_maybe_expand_sve_subreg_move (rtx, rtx);
+rtx aarch64_replace_reg_mode (rtx, machine_mode);
 void aarch64_split_sve_subreg_move (rtx, rtx, rtx);
 void aarch64_expand_prologue (void);
 void aarch64_expand_vector_init (rtx, rtx);
@@ -664,6 +700,20 @@ tree aarch64_general_builtin_decl (unsigned, bool);
 tree aarch64_general_builtin_rsqrt (unsigned int);
 tree aarch64_builtin_vectorized_function (unsigned int, tree, tree);
 
+namespace aarch64_sve {
+  void init_builtins ();
+  void handle_arm_sve_h ();
+  tree builtin_decl (unsigned, bool);
+  bool builtin_type_p (const_tree);
+  const char *mangle_builtin_type (const_tree);
+  tree resolve_overloaded_builtin (location_t, unsigned int,
+				   vec<tree, va_gc> *);
+  bool check_builtin_call (location_t, vec<location_t>, unsigned int,
+			   tree, unsigned int, tree *);
+  gimple *gimple_fold_builtin (unsigned int, gimple_stmt_iterator *, gcall *);
+  rtx expand_builtin (unsigned int, tree, rtx);
+}
+
 extern void aarch64_split_combinev16qi (rtx operands[3]);
 extern void aarch64_expand_vec_perm (rtx, rtx, rtx, rtx, unsigned int);
 extern void aarch64_expand_sve_vec_perm (rtx, rtx, rtx, rtx);

gcc/config/aarch64/aarch64-sve-builtins-shapes.h

+/* ACLE support for AArch64 SVE (function shapes)
+   Copyright (C) 2018-2019 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_AARCH64_SVE_BUILTINS_SHAPES_H
+#define GCC_AARCH64_SVE_BUILTINS_SHAPES_H
+
+namespace aarch64_sve
+{
+  /* The naming convention is:
+
+     - to use the name of the function if the rules are very specific to
+       a particular function (e.g. svext, for which the range of the
+       final immediate value is in no way generic).
+
+     - to use names like "unary" etc. if the rules are somewhat generic,
+       especially if there are no ranges involved.
+
+     When using generic names, the handling of the final vector argument
+     can be modified as follows:
+
+     - an "_n" suffix changes the argument from a vector to a scalar.
+
+     - an "_opt_n" suffix says that there are two forms of each function:
+       one in which the argument is the usual vector, and one in which it
+       is replaced by a scalar.
+
+     - "_int" and "_uint" replace the argument's element type with a
+       signed or unsigned integer of the same width.  The suffixes above
+       then indicate whether this final argument is or might be a scalar.
+
+     - "_int64" and "_uint64" similarly replace the argument's element type
+       with int64_t or uint64_t.
+
+     - "_wide" replaces the argument's element type with a 64-bit integer
+       of the same signedness.  This only makes sense for integer elements.
+
+     - "_lane" indicates that the argument is indexed by a constant lane
+       number, provided as an immediately-following argument of type uint64_t.
+
+     Also:
+
+     - "inherent" means that the function takes no arguments.
+
+     - "_rotate" means that the final argument is a rotation amount
+       (0, 90, 180 or 270).
+
+     - "_scalar" indicates that all data arguments are scalars rather
+       than vectors.
+
+     - in gather/scatter addresses, "sv" stands for "scalar base,
+       vector displacement" while "vs" stands for "vector base,
+       scalar displacement".
+
+     - "_pred" indicates that the function takes an svbool_t argument
+       that does not act as a governing predicate..  */
+  namespace shapes
+  {
+    extern const function_shape *const adr_index;
+    extern const function_shape *const adr_offset;
+    extern const function_shape *const binary;
+    extern const function_shape *const binary_int_opt_n;
+    extern const function_shape *const binary_lane;
+    extern const function_shape *const binary_n;
+    extern const function_shape *const binary_opt_n;
+    extern const function_shape *const binary_pred;
+    extern const function_shape *const binary_rotate;
+    extern const function_shape *const binary_scalar;
+    extern const function_shape *const binary_uint;
+    extern const function_shape *const binary_uint_n;
+    extern const function_shape *const binary_uint_opt_n;
+    extern const function_shape *const binary_uint64_n;
+    extern const function_shape *const binary_uint64_opt_n;
+    extern const function_shape *const clast;
+    extern const function_shape *const compare_opt_n;
+    extern const function_shape *const compare_scalar;
+    extern const function_shape *const compare_wide_opt_n;
+    extern const function_shape *const count_inherent;
+    extern const function_shape *const count_pat;
+    extern const function_shape *const count_pred;
+    extern const function_shape *const count_vector;
+    extern const function_shape *const create;
+    extern const function_shape *const dupq;
+    extern const function_shape *const ext;
+    extern const function_shape *const fold_left;
+    extern const function_shape *const get;
+    extern const function_shape *const inc_dec;
+    extern const function_shape *const inc_dec_pat;
+    extern const function_shape *const inc_dec_pred;
+    extern const function_shape *const inc_dec_pred_scalar;
+    extern const function_shape *const inherent;
+    extern const function_shape *const inherent_b;
+    extern const function_shape *const load;
+    extern const function_shape *const load_ext;
+    extern const function_shape *const load_ext_gather_index;
+    extern const function_shape *const load_ext_gather_offset;
+    extern const function_shape *const load_gather_sv;
+    extern const function_shape *const load_gather_vs;
+    extern const function_shape *const load_replicate;
+    extern const function_shape *const pattern_pred;
+    extern const function_shape *const prefetch;
+    extern const function_shape *const prefetch_gather_index;
+    extern const function_shape *const prefetch_gather_offset;
+    extern const function_shape *const ptest;
+    extern const function_shape *const rdffr;
+    extern const function_shape *const reduction;
+    extern const function_shape *const reduction_wide;
+    extern const function_shape *const set;
+    extern const function_shape *const setffr;
+    extern const function_shape *const shift_right_imm;
+    extern const function_shape *const store;
+    extern const function_shape *const store_scatter_index;
+    extern const function_shape *const store_scatter_offset;
+    extern const function_shape *const ternary_lane;
+    extern const function_shape *const ternary_lane_rotate;
+    extern const function_shape *const ternary_opt_n;
+    extern const function_shape *const ternary_qq_lane;
+    extern const function_shape *const ternary_qq_opt_n;
+    extern const function_shape *const ternary_rotate;
+    extern const function_shape *const tmad;
+    extern const function_shape *const unary;
+    extern const function_shape *const unary_convert;
+    extern const function_shape *const unary_count;
+    extern const function_shape *const unary_n;
+    extern const function_shape *const unary_pred;
+    extern const function_shape *const unary_uint;
+    extern const function_shape *const unary_widen;
+  }
+}
+
+#endif

gcc/config/aarch64/aarch64-sve-builtins.def

+/* Builtin lists for AArch64 SVE
+   Copyright (C) 2018-2019 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef DEF_SVE_MODE
+#define DEF_SVE_MODE(A, B, C, D)
+#endif
+
+#ifndef DEF_SVE_TYPE
+#define DEF_SVE_TYPE(A, B, C, D)
+#endif
+
+#ifndef DEF_SVE_TYPE_SUFFIX
+#define DEF_SVE_TYPE_SUFFIX(A, B, C, D, E)
+#endif
+
+#ifndef DEF_SVE_FUNCTION
+#define DEF_SVE_FUNCTION(A, B, C, D)
+#endif
+
+DEF_SVE_MODE (n, none, none, none)
+DEF_SVE_MODE (index, none, none, elements)
+DEF_SVE_MODE (offset, none, none, bytes)
+DEF_SVE_MODE (s32index, none, svint32_t, elements)
+DEF_SVE_MODE (s32offset, none, svint32_t, bytes)
+DEF_SVE_MODE (s64index,  none, svint64_t, elements)
+DEF_SVE_MODE (s64offset, none, svint64_t, bytes)
+DEF_SVE_MODE (u32base, svuint32_t, none, none)
+DEF_SVE_MODE (u32base_index, svuint32_t, none, elements)
+DEF_SVE_MODE (u32base_offset, svuint32_t, none, bytes)
+DEF_SVE_MODE (u32base_s32index, svuint32_t, svint32_t, elements)
+DEF_SVE_MODE (u32base_s32offset, svuint32_t, svint32_t, bytes)
+DEF_SVE_MODE (u32base_u32index, svuint32_t, svuint32_t, elements)
+DEF_SVE_MODE (u32base_u32offset, svuint32_t, svuint32_t, bytes)
+DEF_SVE_MODE (u32index, none, svuint32_t, elements)
+DEF_SVE_MODE (u32offset, none, svuint32_t, bytes)
+DEF_SVE_MODE (u64base, svuint64_t, none, none)
+DEF_SVE_MODE (u64base_index, svuint64_t, none, elements)
+DEF_SVE_MODE (u64base_offset, svuint64_t, none, bytes)
+DEF_SVE_MODE (u64base_s64index, svuint64_t, svint64_t, elements)
+DEF_SVE_MODE (u64base_s64offset, svuint64_t, svint64_t, bytes)
+DEF_SVE_MODE (u64base_u64index, svuint64_t, svuint64_t, elements)
+DEF_SVE_MODE (u64base_u64offset, svuint64_t, svuint64_t, bytes)
+DEF_SVE_MODE (u64index, none, svuint64_t, elements)
+DEF_SVE_MODE (u64offset, none, svuint64_t, bytes)
+DEF_SVE_MODE (vnum, none, none, vectors)
+
+DEF_SVE_TYPE (svbool_t, 10, __SVBool_t, boolean_type_node)
+DEF_SVE_TYPE (svfloat16_t, 13, __SVFloat16_t, aarch64_fp16_type_node)
+DEF_SVE_TYPE (svfloat32_t, 13, __SVFloat32_t, float_type_node)
+DEF_SVE_TYPE (svfloat64_t, 13, __SVFloat64_t, double_type_node)
+DEF_SVE_TYPE (svint8_t, 10, __SVInt8_t, intQI_type_node)
+DEF_SVE_TYPE (svint16_t, 11, __SVInt16_t, intHI_type_node)
+DEF_SVE_TYPE (svint32_t, 11, __SVInt32_t, intSI_type_node)
+DEF_SVE_TYPE (svint64_t, 11, __SVInt64_t, intDI_type_node)
+DEF_SVE_TYPE (svuint8_t, 11, __SVUint8_t, unsigned_intQI_type_node)
+DEF_SVE_TYPE (svuint16_t, 12, __SVUint16_t, unsigned_intHI_type_node)
+DEF_SVE_TYPE (svuint32_t, 12, __SVUint32_t, unsigned_intSI_type_node)
+DEF_SVE_TYPE (svuint64_t, 12, __SVUint64_t, unsigned_intDI_type_node)
+
+DEF_SVE_TYPE_SUFFIX (b, svbool_t, bool, 8, VNx16BImode)
+DEF_SVE_TYPE_SUFFIX (b8, svbool_t, bool, 8, VNx16BImode)
+DEF_SVE_TYPE_SUFFIX (b16, svbool_t, bool, 16, VNx8BImode)
+DEF_SVE_TYPE_SUFFIX (b32, svbool_t, bool, 32, VNx4BImode)
+DEF_SVE_TYPE_SUFFIX (b64, svbool_t, bool, 64, VNx2BImode)
+DEF_SVE_TYPE_SUFFIX (f16, svfloat16_t, float, 16, VNx8HFmode)
+DEF_SVE_TYPE_SUFFIX (f32, svfloat32_t, float, 32, VNx4SFmode)
+DEF_SVE_TYPE_SUFFIX (f64, svfloat64_t, float, 64, VNx2DFmode)
+DEF_SVE_TYPE_SUFFIX (s8, svint8_t, signed, 8, VNx16QImode)
+DEF_SVE_TYPE_SUFFIX (s16, svint16_t, signed, 16, VNx8HImode)
+DEF_SVE_TYPE_SUFFIX (s32, svint32_t, signed, 32, VNx4SImode)
+DEF_SVE_TYPE_SUFFIX (s64, svint64_t, signed, 64, VNx2DImode)
+DEF_SVE_TYPE_SUFFIX (u8, svuint8_t, unsigned, 8, VNx16QImode)
+DEF_SVE_TYPE_SUFFIX (u16, svuint16_t, unsigned, 16, VNx8HImode)
+DEF_SVE_TYPE_SUFFIX (u32, svuint32_t, unsigned, 32, VNx4SImode)
+DEF_SVE_TYPE_SUFFIX (u64, svuint64_t, unsigned, 64, VNx2DImode)
+
+#include "aarch64-sve-builtins-base.def"
+
+#undef DEF_SVE_FUNCTION
+#undef DEF_SVE_TYPE_SUFFIX
+#undef DEF_SVE_TYPE
+#undef DEF_SVE_MODE

gcc/config/aarch64/aarch64.md

@@ -226,21 +226,29 @@
     UNSPEC_XPACLRI
     UNSPEC_LD1_SVE
     UNSPEC_ST1_SVE
+    UNSPEC_LDNT1_SVE
+    UNSPEC_STNT1_SVE
     UNSPEC_LD1RQ
     UNSPEC_LD1_GATHER
+    UNSPEC_LDFF1_GATHER
     UNSPEC_ST1_SCATTER
     UNSPEC_PRED_X
     UNSPEC_PRED_Z
     UNSPEC_PTEST
+    UNSPEC_PTRUE
     UNSPEC_UNPACKSHI
     UNSPEC_UNPACKUHI
     UNSPEC_UNPACKSLO
     UNSPEC_UNPACKULO
     UNSPEC_PACK
+    UNSPEC_WHILE_LE
     UNSPEC_WHILE_LO
+    UNSPEC_WHILE_LS
+    UNSPEC_WHILE_LT
     UNSPEC_LDN
     UNSPEC_STN
     UNSPEC_INSR
+    UNSPEC_CLASTA
     UNSPEC_CLASTB
     UNSPEC_FADDA
     UNSPEC_REV_SUBREG
@@ -248,6 +256,18 @@
     UNSPEC_SPECULATION_TRACKER
     UNSPEC_COPYSIGN
     UNSPEC_TTEST		; Represent transaction test.
+    UNSPEC_UPDATE_FFR
+    UNSPEC_UPDATE_FFRT
+    UNSPEC_RDFFR
+    UNSPEC_WRFFR
+    ;; Represents an SVE-style lane index, in which the indexing applies
+    ;; within the containing 128-bit block.
+    UNSPEC_SVE_LANE_SELECT
+    UNSPEC_SVE_CNT_PAT
+    UNSPEC_SVE_PREFETCH
+    UNSPEC_SVE_PREFETCH_GATHER
+    UNSPEC_SVE_COMPACT
+    UNSPEC_SVE_SPLICE
 ])
 
 (define_c_enum "unspecv" [

gcc/config/aarch64/arm_sve.h

+/* AArch64 SVE intrinsics include file.
+   Copyright (C) 2018-2019 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _ARM_SVE_H_
+#define _ARM_SVE_H_
+
+#include <stdint.h>
+
+typedef __fp16 float16_t;
+typedef float float32_t;
+typedef double float64_t;
+
+#pragma GCC aarch64 "arm_sve.h"
+
+#endif

gcc/config/aarch64/constraints.md

@@ -257,6 +257,38 @@
 						  true,
 						  ADDR_QUERY_LDP_STP_N)")))
 
+(define_address_constraint "UPb"
+  "@internal
+   An address valid for SVE PRFB instructions."
+  (match_test "aarch64_sve_prefetch_operand_p (op, VNx16QImode)"))
+
+(define_address_constraint "UPd"
+  "@internal
+   An address valid for SVE PRFD instructions."
+  (match_test "aarch64_sve_prefetch_operand_p (op, VNx2DImode)"))
+
+(define_address_constraint "UPh"
+  "@internal
+   An address valid for SVE PRFH instructions."
+  (match_test "aarch64_sve_prefetch_operand_p (op, VNx8HImode)"))
+
+(define_address_constraint "UPw"
+  "@internal
+   An address valid for SVE PRFW instructions."
+  (match_test "aarch64_sve_prefetch_operand_p (op, VNx4SImode)"))
+
+(define_memory_constraint "Utf"
+  "@internal
+   An address valid for SVE LDFF1 instructions."
+  (and (match_code "mem")
+       (match_test "aarch64_sve_ldff1_operand_p (op)")))
+
+(define_memory_constraint "Utn"
+  "@internal
+   An address valid for SVE LDNF1 instructions."
+  (and (match_code "mem")
+       (match_test "aarch64_sve_ldnf1_operand_p (op)")))
+
 (define_memory_constraint "Utr"
   "@internal
    An address valid for SVE LDR and STR instructions (as distinct from
@@ -395,6 +427,30 @@
  An address valid for a prefetch instruction."
  (match_test "aarch64_address_valid_for_prefetch_p (op, true)"))
 
+(define_constraint "vgb"
+  "@internal
+   A constraint that matches an immediate offset valid for SVE LD1B
+   gather instructions."
+ (match_operand 0 "aarch64_sve_gather_immediate_b"))
+
+(define_constraint "vgd"
+  "@internal
+   A constraint that matches an immediate offset valid for SVE LD1D
+   gather instructions."
+ (match_operand 0 "aarch64_sve_gather_immediate_d"))
+
+(define_constraint "vgh"
+  "@internal
+   A constraint that matches an immediate offset valid for SVE LD1H
+   gather instructions."
+ (match_operand 0 "aarch64_sve_gather_immediate_h"))
+
+(define_constraint "vgw"
+  "@internal
+   A constraint that matches an immediate offset valid for SVE LD1W
+   gather instructions."
+ (match_operand 0 "aarch64_sve_gather_immediate_w"))
+
 (define_constraint "vsa"
   "@internal
    A constraint that matches an immediate operand valid for SVE
@@ -437,6 +493,18 @@
    is valid for SVE SUB instructions."
  (match_operand 0 "aarch64_sve_sub_arith_immediate"))
 
+(define_constraint "vsQ"
+  "@internal
+   Like vsa, but additionally check that the immediate is nonnegative
+   when interpreted as a signed value."
+ (match_operand 0 "aarch64_sve_qadd_immediate"))
+
+(define_constraint "vsS"
+  "@internal
+   Like vsn, but additionally check that the immediate is negative
+   when interpreted as a signed value."
+ (match_operand 0 "aarch64_sve_qsub_immediate"))
+
 (define_constraint "vsl"
   "@internal
    A constraint that matches an immediate operand valid for SVE logical

gcc/config/aarch64/predicates.md

@@ -46,9 +46,10 @@
   return CONST_INT_P (op) && IN_RANGE (INTVAL (op), 1, 3);
 })
 
-(define_special_predicate "subreg_lowpart_operator"
-  (and (match_code "subreg")
-       (match_test "subreg_lowpart_p (op)")))
+(define_predicate "subreg_lowpart_operator"
+  (ior (match_code "truncate")
+       (and (match_code "subreg")
+	    (match_test "subreg_lowpart_p (op)"))))
 
 (define_predicate "aarch64_ccmp_immediate"
   (and (match_code "const_int")
@@ -457,6 +458,12 @@
   return aarch64_stepped_int_parallel_p (op, -1);
 })
 
+(define_predicate "ascending_int_parallel"
+  (match_code "parallel")
+{
+  return aarch64_stepped_int_parallel_p (op, 1);
+})
+
 (define_special_predicate "aarch64_simd_lshift_imm"
   (match_code "const,const_vector")
 {
@@ -491,6 +498,10 @@
 	    (match_test "op == const0_rtx")
 	    (match_operand 0 "aarch64_simd_or_scalar_imm_zero"))))
 
+(define_predicate "aarch64_simd_reg_or_minus_one"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_simd_imm_minus_one")))
+
 (define_predicate "aarch64_simd_struct_operand"
   (and (match_code "mem")
        (match_test "TARGET_SIMD && aarch64_simd_mem_operand_p (op)")))
@@ -577,12 +588,24 @@
   (and (match_code "mem")
        (match_test "aarch64_sve_ld1rq_operand_p (op)")))
 
+(define_predicate "aarch64_sve_ldff1_operand"
+  (and (match_code "mem")
+       (match_test "aarch64_sve_ldff1_operand_p (op)")))
+
+(define_predicate "aarch64_sve_ldnf1_operand"
+  (and (match_code "mem")
+       (match_test "aarch64_sve_ldnf1_operand_p (op)")))
+
 ;; Like memory_operand, but restricted to addresses that are valid for
 ;; SVE LDR and STR instructions.
 (define_predicate "aarch64_sve_ldr_operand"
   (and (match_code "mem")
        (match_test "aarch64_sve_ldr_operand_p (op)")))
 
+(define_special_predicate "aarch64_sve_prefetch_operand"
+  (and (match_code "reg, plus")
+       (match_test "aarch64_sve_prefetch_operand_p (op, mode)")))
+
 (define_predicate "aarch64_sve_nonimmediate_operand"
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "aarch64_sve_ldr_operand")))
@@ -607,6 +630,10 @@
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "aarch64_sve_ld1r_operand")))
 
+(define_predicate "aarch64_sve_ptrue_svpattern_immediate"
+  (and (match_code "const")
+       (match_test "aarch64_sve_ptrue_svpattern_p (op, NULL)")))
+
 (define_predicate "aarch64_sve_arith_immediate"
   (and (match_code "const,const_vector")
        (match_test "aarch64_sve_arith_immediate_p (op, false)")))
@@ -615,10 +642,37 @@
   (and (match_code "const,const_vector")
        (match_test "aarch64_sve_arith_immediate_p (op, true)")))
 
+(define_predicate "aarch64_sve_qadd_immediate"
+  (and (match_code "const,const_vector")
+       (match_test "aarch64_sve_sqadd_sqsub_immediate_p (op, false)")))
+
+(define_predicate "aarch64_sve_qsub_immediate"
+  (and (match_code "const,const_vector")
+       (match_test "aarch64_sve_sqadd_sqsub_immediate_p (op, true)")))
+
 (define_predicate "aarch64_sve_vector_inc_dec_immediate"
   (and (match_code "const,const_vector")
        (match_test "aarch64_sve_vector_inc_dec_immediate_p (op)")))
 
+(define_predicate "aarch64_sve_gather_immediate_b"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
+
+(define_predicate "aarch64_sve_gather_immediate_h"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (INTVAL (op), 0, 62)")
+       (match_test "(INTVAL (op) & 1) == 0")))
+
+(define_predicate "aarch64_sve_gather_immediate_w"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (INTVAL (op), 0, 124)")
+       (match_test "(INTVAL (op) & 3) == 0")))
+
+(define_predicate "aarch64_sve_gather_immediate_d"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (INTVAL (op), 0, 248)")
+       (match_test "(INTVAL (op) & 7) == 0")))
+
 (define_predicate "aarch64_sve_uxtb_immediate"
   (and (match_code "const_vector")
        (match_test "GET_MODE_UNIT_BITSIZE (GET_MODE (op)) > 8")
@@ -702,6 +756,11 @@
        (match_operand 0 "aarch64_sve_sub_arith_immediate")
        (match_operand 0 "aarch64_sve_vector_inc_dec_immediate")))
 
+(define_predicate "aarch64_sve_sqadd_operand"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_sve_qadd_immediate")
+       (match_operand 0 "aarch64_sve_qsub_immediate")))
+
 (define_predicate "aarch64_sve_pred_and_operand"
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "aarch64_sve_uxt_immediate")))
@@ -710,6 +769,22 @@
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "aarch64_sve_logical_immediate")))
 
+(define_predicate "aarch64_sve_gather_offset_b"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_sve_gather_immediate_b")))
+
+(define_predicate "aarch64_sve_gather_offset_h"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_sve_gather_immediate_h")))
+
+(define_predicate "aarch64_sve_gather_offset_w"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_sve_gather_immediate_w")))
+
+(define_predicate "aarch64_sve_gather_offset_d"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "aarch64_sve_gather_immediate_d")))
+
 (define_predicate "aarch64_sve_lshift_operand"
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "aarch64_simd_lshift_imm")))
@@ -772,6 +847,14 @@
        (ior (match_test "INTVAL (op) == SVE_RELAXED_GP")
 	    (match_test "INTVAL (op) == SVE_STRICT_GP"))))
 
+(define_predicate "aarch64_gather_scale_operand_b"
+  (and (match_code "const_int")
+       (match_test "INTVAL (op) == 1")))
+
+(define_predicate "aarch64_gather_scale_operand_h"
+  (and (match_code "const_int")
+       (match_test "INTVAL (op) == 1 || INTVAL (op) == 2")))
+
 (define_predicate "aarch64_gather_scale_operand_w"
   (and (match_code "const_int")
        (match_test "INTVAL (op) == 1 || INTVAL (op) == 4")))

gcc/config/aarch64/t-aarch64

@@ -40,6 +40,43 @@ aarch64-builtins.o: $(srcdir)/config/aarch64/aarch64-builtins.c $(CONFIG_H) \
 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
 		$(srcdir)/config/aarch64/aarch64-builtins.c
 
+aarch64-sve-builtins.o: $(srcdir)/config/aarch64/aarch64-sve-builtins.cc \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins.def \
+  $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+  $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) $(DIAGNOSTIC_H) \
+  $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \
+  gimple-iterator.h gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \
+  stor-layout.h $(REG_H) alias.h gimple-fold.h langhooks.h \
+  stringpool.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-base.h
+	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+		$(srcdir)/config/aarch64/aarch64-sve-builtins.cc
+
+aarch64-sve-builtins-shapes.o: \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.cc \
+  $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+  $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.h
+	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+		$(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.cc
+
+aarch64-sve-builtins-base.o: \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-base.cc \
+  $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+  $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) \
+  $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \
+  gimple-iterator.h gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \
+  rtx-vector-builder.h vec-perm-indices.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-shapes.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-base.h \
+  $(srcdir)/config/aarch64/aarch64-sve-builtins-functions.h
+	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+		$(srcdir)/config/aarch64/aarch64-sve-builtins-base.cc
+
 aarch64-builtin-iterators.h: $(srcdir)/config/aarch64/geniterators.sh \
 	$(srcdir)/config/aarch64/iterators.md
 	$(SHELL) $(srcdir)/config/aarch64/geniterators.sh \

gcc/testsuite/ChangeLog

+2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+	    Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+	    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+	* g++.target/aarch64/sve/acle/aarch64-sve-acle.exp: New file.
+	* g++.target/aarch64/sve/acle/general-c++: New test directory.
+	* gcc.target/aarch64/sve/acle/aarch64-sve-acle.exp: New file.
+	* gcc.target/aarch64/sve/acle/general: New test directory.
+	* gcc.target/aarch64/sve/acle/general-c: Likewise.
+
 2019-10-29  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/92241

gcc/testsuite/g++.target/aarch64/sve/acle/aarch64-sve-acle.exp

+#  Specific regression driver for AArch64 SVE.
+#  Copyright (C) 2009-2019 Free Software Foundation, Inc.
+#  Contributed by ARM Ltd.
+#
+#  This file is part of GCC.
+#
+#  GCC is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 3, or (at your option)
+#  any later version.
+#
+#  GCC is distributed in the hope that it will be useful, but
+#  WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+#  General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with GCC; see the file COPYING3.  If not see
+#  <http://www.gnu.org/licenses/>.  */
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an AArch64 target.
+if {![istarget aarch64*-*-*] } {
+    return
+}
+
+# Load support procs.
+load_lib g++-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CXXFLAGS
+if ![info exists DEFAULT_CXXFLAGS] then {
+    set DEFAULT_CXXFLAGS " -pedantic-errors -Wno-long-long"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Force SVE if we're not testing it already.
+if { [check_effective_target_aarch64_sve] } {
+    set sve_flags ""
+} else {
+    set sve_flags "-march=armv8.2-a+sve"
+}
+
+# Main loop.
+set gcc_subdir [string replace $subdir 0 2 gcc]
+set files [glob -nocomplain \
+	       "$srcdir/$gcc_subdir/general/*.c" \
+	       "$srcdir/$subdir/general-c++/*.\[cC\]"]
+dg-runtest [lsort $files] "$sve_flags" $DEFAULT_CXXFLAGS
+
+# All done.
+dg-finish

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/add_1.C

+/* { dg-do compile } */
+
+#include "add_1.h"
+
+svuint8_t
+f1 (svbool_t pg, svuint8_t x, svint8_t y)
+{
+  return svadd_u8_x (pg, x, y); /* { dg-error "cannot convert 'svint8_t' to 'svuint8_t'" } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/add_1.h

+#pragma GCC system_header
+#pragma GCC aarch64 "arm_sve.h" /* { dg-message "initializing argument 3" } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/add_2.C

+/* { dg-do compile } */
+
+#include "add_2.h"
+
+void
+f1 (svbool_t pg, svuint8_t x, svint8_t y)
+{
+  svadd_x (pg, x); /* { dg-error {no matching function for call to 'svadd_x\(svbool_t&, svuint8_t&\)'} } */
+  svadd_x (pg, x, x, x); /* { dg-error {no matching function for call to 'svadd_x\(svbool_t&, svuint8_t&, svuint8_t&, svuint8_t&\)'} } */
+  svadd_x (x, x, x); /* { dg-error {no matching function for call to 'svadd_x\(svuint8_t&, svuint8_t&, svuint8_t&\)'} } */
+  svadd_x (pg, pg, pg); /* { dg-error {no matching function for call to 'svadd_x\(svbool_t&, svbool_t&, svbool_t&\)'} } */
+  svadd_x (pg, 1, x); /* { dg-error {no matching function for call to 'svadd_x\(svbool_t&, int, svuint8_t&\)'} } */
+  svadd_x (pg, x, y); /* { dg-error {no matching function for call to 'svadd_x\(svbool_t&, svuint8_t&, svint8_t&\)'} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/add_2.h

+#pragma GCC system_header
+#pragma GCC aarch64 "arm_sve.h"
+/* { dg-message {note: candidate: 'svfloat16_t svadd_x\(svbool_t, svfloat16_t, svfloat16_t\)'} "" { target *-*-* } 3 } */
+/* { dg-message {note: *candidate expects 3 arguments, 2 provided} "" { target *-*-* } 3 } */
+/* { dg-message {note: *candidate expects 3 arguments, 4 provided} "" { target *-*-* } 3 } */
+/* { dg-message {note: *no known conversion for argument 1 from 'svuint8_t' to 'svbool_t'} "" { target *-*-* } 3 } */
+/* { dg-message {note: *no known conversion for argument 2 from 'svbool_t' to 'svfloat16_t'} "" { target *-*-* } 3 } */
+/* { dg-message {note: *no known conversion for argument 2 from 'int' to 'svfloat16_t'} "" { target *-*-* } 3 } */
+/* { dg-message {note: *no known conversion for argument 2 from 'svuint8_t' to 'svfloat16_t'} "" { target *-*-* } 3 } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/add_3.C

+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized -fnon-call-exceptions" } */
+
+#include <arm_sve.h>
+
+svint8_t
+foo (svbool_t pg, svint8_t a, svint8_t b)
+{
+  try
+    {
+      a = svadd_m (pg, a, b);
+    }
+  catch (...)
+    {
+      a = b;
+    }
+  return a;
+}
+
+/* { dg-final { scan-tree-dump-not {__cxa_begin_catch} "optimized" } } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/asrd_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_add (uint64_t a, uint64_t b) { return a + b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+void
+f1 (svbool_t pg, svuint8_t u8, svint8_t s8, svint16_t s16,
+    svint32_t s32, svint64_t s64, int x)
+{
+  const int one = 1;
+  u8 = svasrd_x (pg, u8, 1); /* { dg-error {no matching function for call to 'svasrd_x\(svbool_t&, svuint8_t&, [^)]*\)'} } */
+  s8 = svasrd_x (pg, s8, x); /* { dg-error "argument 3 of 'svasrd_x' must be an integer constant expression" } */
+  s8 = svasrd_x (pg, s8, one);
+  s8 = svasrd_x (pg, s8, 0.4); /* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 8\]} } */
+  s8 = svasrd_x (pg, s8, 1.0);
+  s8 = svasrd_x (pg, s8, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 8\]} } */
+  s8 = svasrd_x (pg, s8, 1);
+  s8 = svasrd_x (pg, s8, 1 + 1);
+  s8 = svasrd_x (pg, s8, const_add (1, 1));
+  s8 = svasrd_x (pg, s8, add (1, 1)); /* { dg-error "argument 3 of 'svasrd_x' must be an integer constant expression" } */
+  s8 = svasrd_x (pg, s8, 8);
+  s8 = svasrd_x (pg, s8, 9); /* { dg-error {passing 9 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 8\]} } */
+  s8 = svasrd_x (pg, s8, (uint64_t (1) << 62) + 1); /* { dg-error {passing [^ ]* to argument 3 of 'svasrd_x', which expects a value in the range \[1, 8\]} } */
+  s16 = svasrd_x (pg, s16, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 16\]} } */
+  s16 = svasrd_x (pg, s16, 1);
+  s16 = svasrd_x (pg, s16, 16);
+  s16 = svasrd_x (pg, s16, 17); /* { dg-error {passing 17 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 16\]} } */
+  s32 = svasrd_x (pg, s32, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 32\]} } */
+  s32 = svasrd_x (pg, s32, 1);
+  s32 = svasrd_x (pg, s32, 32);
+  s32 = svasrd_x (pg, s32, 33); /* { dg-error {passing 33 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 32\]} } */
+  s64 = svasrd_x (pg, s64, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 64\]} } */
+  s64 = svasrd_x (pg, s64, 1);
+  s64 = svasrd_x (pg, s64, 64);
+  s64 = svasrd_x (pg, s64, 65); /* { dg-error {passing 65 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 64\]} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/asrd_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_add (uint64_t a, uint64_t b) { return a + b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+void
+f1 (svbool_t pg, svint8_t s8, svint16_t s16, svint32_t s32, svint64_t s64,
+    int x)
+{
+  const int one = 1;
+  s8 = svasrd_n_s8_x (pg, s8, x); /* { dg-error "argument 3 of 'svasrd_n_s8_x' must be an integer constant expression" } */
+  s8 = svasrd_n_s8_x (pg, s8, one);
+  s8 = svasrd_n_s8_x (pg, s8, 0.4); /* { dg-error {passing 0 to argument 3 of 'svasrd_n_s8_x', which expects a value in the range \[1, 8\]} } */
+  s8 = svasrd_n_s8_x (pg, s8, 1.0);
+  s8 = svasrd_n_s8_x (pg, s8, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_n_s8_x', which expects a value in the range \[1, 8\]} } */
+  s8 = svasrd_n_s8_x (pg, s8, 1);
+  s8 = svasrd_n_s8_x (pg, s8, 1 + 1);
+  s8 = svasrd_n_s8_x (pg, s8, const_add (1, 1));
+  s8 = svasrd_n_s8_x (pg, s8, add (1, 1)); /* { dg-error "argument 3 of 'svasrd_n_s8_x' must be an integer constant expression" } */
+  s8 = svasrd_n_s8_x (pg, s8, 8);
+  s8 = svasrd_n_s8_x (pg, s8, 9); /* { dg-error {passing 9 to argument 3 of 'svasrd_n_s8_x', which expects a value in the range \[1, 8\]} } */
+  s8 = svasrd_n_s8_x (pg, s8, (uint64_t (1) << 62) + 1); /* { dg-error {passing [^ ]* to argument 3 of 'svasrd_n_s8_x', which expects a value in the range \[1, 8\]} } */
+  s16 = svasrd_n_s16_x (pg, s16, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_n_s16_x', which expects a value in the range \[1, 16\]} } */
+  s16 = svasrd_n_s16_x (pg, s16, 1);
+  s16 = svasrd_n_s16_x (pg, s16, 16);
+  s16 = svasrd_n_s16_x (pg, s16, 17); /* { dg-error {passing 17 to argument 3 of 'svasrd_n_s16_x', which expects a value in the range \[1, 16\]} } */
+  s32 = svasrd_n_s32_x (pg, s32, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_n_s32_x', which expects a value in the range \[1, 32\]} } */
+  s32 = svasrd_n_s32_x (pg, s32, 1);
+  s32 = svasrd_n_s32_x (pg, s32, 32);
+  s32 = svasrd_n_s32_x (pg, s32, 33); /* { dg-error {passing 33 to argument 3 of 'svasrd_n_s32_x', which expects a value in the range \[1, 32\]} } */
+  s64 = svasrd_n_s64_x (pg, s64, 0); /* { dg-error {passing 0 to argument 3 of 'svasrd_n_s64_x', which expects a value in the range \[1, 64\]} } */
+  s64 = svasrd_n_s64_x (pg, s64, 1);
+  s64 = svasrd_n_s64_x (pg, s64, 64);
+  s64 = svasrd_n_s64_x (pg, s64, 65); /* { dg-error {passing 65 to argument 3 of 'svasrd_n_s64_x', which expects a value in the range \[1, 64\]} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/asrd_3.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_add (uint64_t a, uint64_t b) { return a + b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+template<uint64_t N, typename T>
+T shift (svbool_t pg, T v) { return svasrd_x (pg, v, N); }
+/* { dg-error {no matching function for call to 'svasrd_x\(svbool_t&,} "" { target *-*-* } .-1 } */
+/* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 8\]} "" { target *-*-* } .-2 } */
+/* { dg-error {passing 9 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 8\]} "" { target *-*-* } .-3 } */
+/* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 16\]} "" { target *-*-* } .-4 } */
+/* { dg-error {passing 17 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 16\]} "" { target *-*-* } .-5 } */
+/* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 32\]} "" { target *-*-* } .-6 } */
+/* { dg-error {passing 33 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 32\]} "" { target *-*-* } .-7 } */
+/* { dg-error {passing 0 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 64\]} "" { target *-*-* } .-8 } */
+/* { dg-error {passing 65 to argument 3 of 'svasrd_x', which expects a value in the range \[1, 64\]} "" { target *-*-* } .-9 } */
+
+template<typename T>
+T shift1 (svbool_t pg, T v, uint64_t n) { return svasrd_x (pg, v, n); }
+
+template<typename T>
+T shift2 (svbool_t pg, T v, uint64_t n) { return svasrd_x (pg, v, n); }
+/* { dg-error {argument 3 of 'svasrd_x' must be an integer constant expression} "" { target *-*-* } .-1 } */
+
+void
+f1 (svbool_t pg, svuint8_t u8, svint8_t s8, svint16_t s16,
+    svint32_t s32, svint64_t s64)
+{
+  u8 = shift <1> (pg, u8);
+  s8 = shift <0> (pg, s8);
+  s8 = shift <1> (pg, s8);
+  s8 = shift <8> (pg, s8);
+  s8 = shift <9> (pg, s8);
+  s16 = shift <0> (pg, s16);
+  s16 = shift <1> (pg, s16);
+  s16 = shift <16> (pg, s16);
+  s16 = shift <17> (pg, s16);
+  s32 = shift <0> (pg, s32);
+  s32 = shift <1> (pg, s32);
+  s32 = shift <32> (pg, s32);
+  s32 = shift <33> (pg, s32);
+  s64 = shift <0> (pg, s64);
+  s64 = shift <1> (pg, s64);
+  s64 = shift <64> (pg, s64);
+  s64 = shift <65> (pg, s64);
+
+  s8 = shift2 (pg, s8, 1);
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/cntb_pat.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void
+test (svpattern pat, int i)
+{
+  svcntb_pat (pat); /* { dg-error "argument 1 of 'svcntb_pat' must be an integer constant expression" } */
+  svcntb_pat (i); /* { dg-error "invalid conversion from 'int' to 'svpattern'" } */
+   /* { dg-error "argument 1 of 'svcntb_pat' must be an integer constant expression" "" { target *-*-* } .-1 } */
+  svcntb_pat ((svpattern) -1); /* { dg-error "passing 4294967295 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 0);
+  svcntb_pat ((svpattern) 1);
+  svcntb_pat ((svpattern) 2);
+  svcntb_pat ((svpattern) 3);
+  svcntb_pat ((svpattern) 4);
+  svcntb_pat ((svpattern) 5);
+  svcntb_pat ((svpattern) 6);
+  svcntb_pat ((svpattern) 7);
+  svcntb_pat ((svpattern) 8);
+  svcntb_pat ((svpattern) 9);
+  svcntb_pat ((svpattern) 10);
+  svcntb_pat ((svpattern) 11);
+  svcntb_pat ((svpattern) 12);
+  svcntb_pat ((svpattern) 13);
+  svcntb_pat ((svpattern) 14); /* { dg-error "passing 14 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 15); /* { dg-error "passing 15 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 16); /* { dg-error "passing 16 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 17); /* { dg-error "passing 17 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 18); /* { dg-error "passing 18 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 19); /* { dg-error "passing 19 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 20); /* { dg-error "passing 20 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 21); /* { dg-error "passing 21 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 22); /* { dg-error "passing 22 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 23); /* { dg-error "passing 23 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 24); /* { dg-error "passing 24 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 25); /* { dg-error "passing 25 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 26); /* { dg-error "passing 26 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 27); /* { dg-error "passing 27 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 28); /* { dg-error "passing 28 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+  svcntb_pat ((svpattern) 29);
+  svcntb_pat ((svpattern) 30);
+  svcntb_pat ((svpattern) 31);
+  svcntb_pat ((svpattern) 32); /* { dg-error "passing 32 to argument 1 of 'svcntb_pat', which expects a valid 'svpattern' value" } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/conversion_1.C

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+template<typename T>
+struct S
+{
+  S(T);
+  operator T() const;
+  void *base;
+};
+
+void f(svbool_t pg, const S<svuint8_t> &u8a, const S<svuint8_t> &u8b,
+       const S<svint8_t> &s8a)
+{
+  svadd_x(pg, u8a, u8b);
+  svadd_x(pg, u8a, 1);
+  svadd_x(pg, s8a, u8b); // { dg-error "no matching function for call" }
+  svadd_x(pg, s8a, 1);
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/create2_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svuint8x2_t *ptr, svbool_t pg, svuint8_t u8, svfloat64_t f64,
+    svuint8x2_t u8x2)
+{
+  *ptr = svcreate2 (u8); /* { dg-error {no matching function for call to 'svcreate2\(svuint8_t\&\)'} } */
+  *ptr = svcreate2 (u8, u8, u8); /* { dg-error {no matching function for call to 'svcreate2\(svuint8_t\&, svuint8_t\&, svuint8_t\&\)'} } */
+  *ptr = svcreate2 (u8x2, u8x2); /* { dg-error {no matching function for call to 'svcreate2\(svuint8x2_t\&, svuint8x2_t\&\)'} } */
+  *ptr = svcreate2 (u8, f64); /* { dg-error {no matching function for call to 'svcreate2\(svuint8_t\&, svfloat64_t\&\)'} } */
+  *ptr = svcreate2 (u8, pg); /* { dg-error {no matching function for call to 'svcreate2\(svuint8_t\&, svbool_t\&\)'} } */
+  *ptr = svcreate2 (u8, u8);
+  *ptr = svcreate2 (f64, f64); /* { dg-error {cannot convert 'svfloat64x2_t' to 'svuint8x2_t' in assignment} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/create2_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svuint8x2_t *ptr, svbool_t pg, svuint8_t u8, svfloat64_t f64,
+    svuint8x2_t u8x2)
+{
+  *ptr = svcreate2_u8 (u8); /* { dg-error {too few arguments to function '[^']*'} } */
+  *ptr = svcreate2_u8 (u8, u8, u8); /* { dg-error {too many arguments to function '[^']*'} } */
+  *ptr = svcreate2_u8 (u8x2, u8x2); /* { dg-error {cannot convert 'svuint8x2_t' to 'svuint8_t'} } */
+  *ptr = svcreate2_u8 (u8, f64); /* { dg-error {cannot convert 'svfloat64_t' to 'svuint8_t'} } */
+  *ptr = svcreate2_u8 (pg, u8); /* { dg-error {cannot convert 'svbool_t' to 'svuint8_t'} } */
+  *ptr = svcreate2_u8 (u8, u8);
+  *ptr = svcreate2_f64 (f64, f64); /* { dg-error {cannot convert 'svfloat64x2_t' to 'svuint8x2_t' in assignment} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/create3_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svfloat16x3_t *ptr, svbool_t pg, svfloat16_t f16, svfloat64_t f64,
+    svfloat16x3_t f16x3)
+{
+  *ptr = svcreate3 (f16); /* { dg-error {no matching function for call to 'svcreate3\(svfloat16_t\&\)'} } */
+  *ptr = svcreate3 (f16, f16); /* { dg-error {no matching function for call to 'svcreate3\(svfloat16_t\&, svfloat16_t\&\)'} } */
+  *ptr = svcreate3 (f16, f16, f16, f16); /* { dg-error {no matching function for call to 'svcreate3\(svfloat16_t\&, svfloat16_t\&, svfloat16_t\&, svfloat16_t\&\)'} } */
+  *ptr = svcreate3 (f16x3, f16x3, f16x3); /* { dg-error {no matching function for call to 'svcreate3\(svfloat16x3_t\&, svfloat16x3_t\&, svfloat16x3_t\&\)'} } */
+  *ptr = svcreate3 (f16, f16, f64); /* { dg-error {no matching function for call to 'svcreate3\(svfloat16_t\&, svfloat16_t\&, svfloat64_t\&\)'} } */
+  *ptr = svcreate3 (f16, pg, f16); /* { dg-error {no matching function for call to 'svcreate3\(svfloat16_t\&, svbool_t\&, svfloat16_t\&\)'} } */
+  *ptr = svcreate3 (f16, f16, f16);
+  *ptr = svcreate3 (f64, f64, f64); /* { dg-error {cannot convert 'svfloat64x3_t' to 'svfloat16x3_t' in assignment} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/create3_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svfloat16x3_t *ptr, svbool_t pg, svfloat16_t f16, svfloat64_t f64,
+    svfloat16x3_t f16x3)
+{
+  *ptr = svcreate3_f16 (f16); /* { dg-error {too few arguments to function '[^']*'} } */
+  *ptr = svcreate3_f16 (f16, f16); /* { dg-error {too few arguments to function '[^']*'} } */
+  *ptr = svcreate3_f16 (f16, f16, f16, f16); /* { dg-error {too many arguments to function '[^']*'} } */
+  *ptr = svcreate3_f16 (f16x3, f16x3, f16x3); /* { dg-error {cannot convert 'svfloat16x3_t' to 'svfloat16_t'} } */
+  *ptr = svcreate3_f16 (f16, f16, f64); /* { dg-error {cannot convert 'svfloat64_t' to 'svfloat16_t'} } */
+  *ptr = svcreate3_f16 (f16, pg, f16); /* { dg-error {cannot convert 'svbool_t' to 'svfloat16_t'} } */
+  *ptr = svcreate3_f16 (f16, f16, f16);
+  *ptr = svcreate3_f64 (f64, f64, f64); /* { dg-error {cannot convert 'svfloat64x3_t' to 'svfloat16x3_t' in assignment} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/create4_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svint32x4_t *ptr, svbool_t pg, svint32_t s32, svfloat64_t f64,
+    svint32x4_t s32x4)
+{
+  *ptr = svcreate4 (s32); /* { dg-error {no matching function for call to 'svcreate4\(svint32_t\&\)'} } */
+  *ptr = svcreate4 (s32, s32); /* { dg-error {no matching function for call to 'svcreate4\(svint32_t\&, svint32_t\&\)'} } */
+  *ptr = svcreate4 (s32, s32, s32); /* { dg-error {no matching function for call to 'svcreate4\(svint32_t\&, svint32_t\&, svint32_t\&\)'} } */
+  *ptr = svcreate4 (s32, s32, s32, s32, s32); /* { dg-error {no matching function for call to 'svcreate4\(svint32_t\&, svint32_t\&, svint32_t\&, svint32_t\&, svint32_t\&\)'} } */
+  *ptr = svcreate4 (s32x4, s32x4, s32x4, s32x4); /* { dg-error {no matching function for call to 'svcreate4\(svint32x4_t\&, svint32x4_t\&, svint32x4_t\&, svint32x4_t\&\)'} } */
+  *ptr = svcreate4 (s32, s32, s32, f64); /* { dg-error {no matching function for call to 'svcreate4\(svint32_t\&, svint32_t\&, svint32_t\&, svfloat64_t\&\)'} } */
+  *ptr = svcreate4 (s32, pg, s32, s32); /* { dg-error {no matching function for call to 'svcreate4\(svint32_t\&, svbool_t\&, svint32_t\&, svint32_t\&\)'} } */
+  *ptr = svcreate4 (s32, s32, s32, s32);
+  *ptr = svcreate4 (f64, f64, f64, f64); /* { dg-error {cannot convert 'svfloat64x4_t' to 'svint32x4_t' in assignment} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/create4_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svint32x4_t *ptr, svbool_t pg, svint32_t s32, svfloat64_t f64,
+    svint32x4_t s32x4)
+{
+  *ptr = svcreate4_s32 (s32); /* { dg-error {too few arguments to function '[^']*'} } */
+  *ptr = svcreate4_s32 (s32, s32); /* { dg-error {too few arguments to function '[^']*'} } */
+  *ptr = svcreate4_s32 (s32, s32, s32); /* { dg-error {too few arguments to function '[^']*'} } */
+  *ptr = svcreate4_s32 (s32, s32, s32, s32, s32); /* { dg-error {too many arguments to function '[^']*'} } */
+  *ptr = svcreate4_s32 (s32x4, s32x4, s32x4, s32x4); /* { dg-error {cannot convert 'svint32x4_t' to 'svint32_t'} } */
+  *ptr = svcreate4_s32 (s32, s32, s32, f64); /* { dg-error {cannot convert 'svfloat64_t' to 'svint32_t'} } */
+  *ptr = svcreate4_s32 (s32, pg, s32, s32); /* { dg-error {cannot convert 'svbool_t' to 'svint32_t'} } */
+  *ptr = svcreate4_s32 (s32, s32, s32, s32);
+  *ptr = svcreate4_f64 (f64, f64, f64, f64); /* { dg-error {cannot convert 'svfloat64x4_t' to 'svint32x4_t' in assignment} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/dot_1.C

+/* { dg-do compile } */
+
+#include "dot_1.h"
+
+svuint32_t
+f1 (svuint32_t x, svint8_t y, svuint8_t z)
+{
+  return svdot_u32 (x, y, z); /* { dg-error "cannot convert 'svint8_t' to 'svuint8_t'" } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/dot_1.h

+#pragma GCC system_header
+#pragma GCC aarch64 "arm_sve.h" /* { dg-message "initializing argument 2" } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/dot_2.C

+/* { dg-do compile } */
+
+#include "dot_2.h"
+
+void
+f1 (svuint32_t x, svint8_t y, svuint8_t z)
+{
+  svdot (x, y); /* { dg-error {no matching function for call to 'svdot\(svuint32_t&, svint8_t&\)'} } */
+  svdot (x, x, x); /* { dg-error {no matching function for call to 'svdot\(svuint32_t&, svuint32_t&, svuint32_t&\)'} } */
+  svdot (1, z, z); /* { dg-error {no matching function for call to 'svdot\(int, svuint8_t&, svuint8_t&\)'} } */
+  svdot (x, y, z); /* { dg-error {no matching function for call to 'svdot\(svuint32_t&, svint8_t&, svuint8_t&\)'} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/dot_2.h

+#pragma GCC system_header
+#pragma GCC aarch64 "arm_sve.h"
+/* { dg-message {note: candidate: 'svuint32_t svdot\(svuint32_t, svuint8_t, svuint8_t\)'} "" { target *-*-* } 3 } */
+/* { dg-message {note: *candidate expects 3 arguments, 2 provided} "" { target *-*-* } 3 } */
+/* { dg-message {note: *no known conversion for argument 2 from 'svuint32_t' to 'svuint8_t'} "" { target *-*-* } 3 } */
+/* { dg-message {note: *no known conversion for argument 1 from 'int' to 'svuint32_t'} "" { target *-*-* } 3 } */
+/* { dg-message {note: *no known conversion for argument 2 from 'svint8_t' to 'svuint8_t'} "" { target *-*-* } 3 } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/func_redef_1.c

+/* { dg-do compile } */
+
+int svadd_n_u8_x; /* { dg-message "note: previous declaration 'int svadd_n_u8_x'" } */
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {'svuint8_t svadd_n_u8_x\(svbool_t, svuint8_t, [^)\n]*\)' redeclared as different kind of entity} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/func_redef_2.c

+/* { dg-do compile } */
+
+int svadd_n_u8_x = 1; /* { dg-message "note: previous declaration 'int svadd_n_u8_x'" } */
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {'svuint8_t svadd_n_u8_x\(svbool_t, svuint8_t, [^)\n]*\)' redeclared as different kind of entity} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/func_redef_3.c

+/* { dg-do compile } */
+
+/* Although not supported, there's nothing to stop the user overloading
+   the sv* functions.  */
+extern __SVInt8_t svadd_u8_x (__SVBool_t, __SVInt8_t, __SVInt8_t);
+
+#pragma GCC aarch64 "arm_sve.h"

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/func_redef_4.c

+/* { dg-do compile } */
+
+/* Although somewhat suspect, this isn't actively wrong, and doesn't need
+   to be diagnosed.  Any attempt to call the function before including
+   arm_sve.h will lead to a link failure.  (Same for taking its address,
+   etc.)  */
+extern __SVUint8_t svadd_u8_x (__SVBool_t, __SVUint8_t, __SVUint8_t);
+
+#pragma GCC aarch64 "arm_sve.h"

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/func_redef_5.c

+/* { dg-do compile } */
+
+__SVUint8_t
+svadd_u8_x (__SVBool_t pg, __SVUint8_t x, __SVUint8_t y)
+{
+  return x;
+}
+
+#pragma GCC aarch64 "arm_sve.h"
+
+svuint8_t
+f (svbool_t pg, svuint8_t x, svuint8_t y)
+{
+  return svadd_u8_x (pg, x, y);
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/func_redef_6.c

+/* { dg-do compile } */
+
+typedef int svadd_u8_x; /* { dg-message "note: previous declaration 'typedef int svadd_u8_x'" } */
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {'svuint8_t svadd_u8_x\(svbool_t, svuint8_t, svuint8_t\)' redeclared as different kind of entity} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/func_redef_7.c

+/* { dg-do compile } */
+
+__SVUint8_t
+svadd_x (__SVBool_t pg, __SVUint8_t x, __SVUint8_t y)
+{
+  return x;
+}
+
+#pragma GCC aarch64 "arm_sve.h"
+
+svuint8_t
+f (svbool_t pg, svuint8_t x, svuint8_t y)
+{
+  return svadd_x (pg, x, y);
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/get2_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svuint8_t u8, svuint8x2_t u8x2, svuint8x3_t u8x3, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  u8 = svget2 (u8x2); /* { dg-error {no matching function for call to 'svget2\(svuint8x2_t\&\)'} } */
+  u8 = svget2 (u8x2, 1, 2); /* { dg-error {no matching function for call to 'svget2\(svuint8x2_t\&, int, int\)'} } */
+  u8 = svget2 (u8, 0); /* { dg-error {no matching function for call to 'svget2\(svuint8_t\&, int\)'} } */
+  u8 = svget2 (u8x3, 0); /* { dg-error {no matching function for call to 'svget2\(svuint8x3_t\&, int\)'} } */
+  u8 = svget2 (pg, 0); /* { dg-error {no matching function for call to 'svget2\(svbool_t\&, int\)'} } */
+  u8 = svget2 (u8x2, x); /* { dg-error "argument 2 of 'svget2' must be an integer constant expression" } */
+  u8 = svget2 (u8x2, 0);
+  f64 = svget2 (u8x2, 0); /* { dg-error "cannot convert 'svuint8_t' to 'svfloat64_t' in assignment" } */
+  u8 = svget2 (u8x2, 1);
+  u8 = svget2 (u8x2, 2); /* { dg-error {passing 2 to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, 3); /* { dg-error {passing 3 to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, 4); /* { dg-error {passing 4 to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, 5); /* { dg-error {passing 5 to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, ~0U); /* { dg-error {passing [^ ]* to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, one);
+  u8 = svget2 (u8x2, 3 - 2);
+  u8 = svget2 (u8x2, 1.0);
+  u8 = svget2 (u8x2, const_sub (5, 4));
+  u8 = svget2 (u8x2, const_sub (6, 4)); /* { dg-error {passing 2 to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, const_sub (7, 4)); /* { dg-error {passing 3 to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, const_sub (8, 4)); /* { dg-error {passing 4 to argument 2 of 'svget2', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2 (u8x2, add (0, 0)); /* { dg-error "argument 2 of 'svget2' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/get2_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svuint8_t u8, svuint8x2_t u8x2, svuint8x3_t u8x3, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  u8 = svget2_u8 (u8x2); /* { dg-error {too few arguments to function '[^']*'} } */
+  u8 = svget2_u8 (u8x2, 1, 2); /* { dg-error {too many arguments to function '[^']*'} } */
+  u8 = svget2_u8 (u8, 0); /* { dg-error {cannot convert 'svuint8_t' to 'svuint8x2_t'} } */
+  u8 = svget2_u8 (u8x3, 0); /* { dg-error {cannot convert 'svuint8x3_t' to 'svuint8x2_t'} } */
+  u8 = svget2_u8 (pg, 0); /* { dg-error {cannot convert 'svbool_t' to 'svuint8x2_t'} } */
+  u8 = svget2_u8 (u8x2, x); /* { dg-error "argument 2 of 'svget2_u8' must be an integer constant expression" } */
+  u8 = svget2_u8 (u8x2, 0);
+  f64 = svget2_u8 (u8x2, 0); /* { dg-error "cannot convert 'svuint8_t' to 'svfloat64_t' in assignment" } */
+  u8 = svget2_u8 (u8x2, 1);
+  u8 = svget2_u8 (u8x2, 2); /* { dg-error {passing 2 to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, 3); /* { dg-error {passing 3 to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, 4); /* { dg-error {passing 4 to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, 5); /* { dg-error {passing 5 to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, ~0U); /* { dg-error {passing [^ ]* to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, one);
+  u8 = svget2_u8 (u8x2, 3 - 2);
+  u8 = svget2_u8 (u8x2, 1.0);
+  u8 = svget2_u8 (u8x2, const_sub (5, 4));
+  u8 = svget2_u8 (u8x2, const_sub (6, 4)); /* { dg-error {passing 2 to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, const_sub (7, 4)); /* { dg-error {passing 3 to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, const_sub (8, 4)); /* { dg-error {passing 4 to argument 2 of 'svget2_u8', which expects a value in the range \[0, 1\]} } */
+  u8 = svget2_u8 (u8x2, add (0, 0)); /* { dg-error "argument 2 of 'svget2_u8' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/get3_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svfloat16_t f16, svfloat16x3_t f16x3, svfloat16x4_t f16x4,
+    int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  f16 = svget3 (f16x3); /* { dg-error {no matching function for call to 'svget3\(svfloat16x3_t\&\)'} } */
+  f16 = svget3 (f16x3, 1, 2); /* { dg-error {no matching function for call to 'svget3\(svfloat16x3_t\&, int, int\)'} } */
+  f16 = svget3 (f16, 0); /* { dg-error {no matching function for call to 'svget3\(svfloat16_t\&, int\)'} } */
+  f16 = svget3 (f16x4, 0); /* { dg-error {no matching function for call to 'svget3\(svfloat16x4_t\&, int\)'} } */
+  f16 = svget3 (pg, 0); /* { dg-error {no matching function for call to 'svget3\(svbool_t\&, int\)'} } */
+  f16 = svget3 (f16x3, x); /* { dg-error "argument 2 of 'svget3' must be an integer constant expression" } */
+  f16 = svget3 (f16x3, 0);
+  f64 = svget3 (f16x3, 0); /* { dg-error "cannot convert 'svfloat16_t' to 'svfloat64_t' in assignment" } */
+  f16 = svget3 (f16x3, 1);
+  f16 = svget3 (f16x3, 2);
+  f16 = svget3 (f16x3, 3); /* { dg-error {passing 3 to argument 2 of 'svget3', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3 (f16x3, 4); /* { dg-error {passing 4 to argument 2 of 'svget3', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3 (f16x3, 5); /* { dg-error {passing 5 to argument 2 of 'svget3', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3 (f16x3, ~0U); /* { dg-error {passing [^ ]* to argument 2 of 'svget3', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3 (f16x3, one);
+  f16 = svget3 (f16x3, 3 - 2);
+  f16 = svget3 (f16x3, 1.0);
+  f16 = svget3 (f16x3, const_sub (5, 4));
+  f16 = svget3 (f16x3, const_sub (6, 4));
+  f16 = svget3 (f16x3, const_sub (7, 4)); /* { dg-error {passing 3 to argument 2 of 'svget3', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3 (f16x3, const_sub (8, 4)); /* { dg-error {passing 4 to argument 2 of 'svget3', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3 (f16x3, add (0, 0)); /* { dg-error "argument 2 of 'svget3' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/get3_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svfloat16_t f16, svfloat16x3_t f16x3, svfloat16x4_t f16x4,
+    int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  f16 = svget3_f16 (f16x3); /* { dg-error {too few arguments to function '[^']*'} } */
+  f16 = svget3_f16 (f16x3, 1, 2); /* { dg-error {too many arguments to function '[^']*'} } */
+  f16 = svget3_f16 (f16, 0); /* { dg-error {cannot convert 'svfloat16_t' to 'svfloat16x3_t'} } */
+  f16 = svget3_f16 (f16x4, 0); /* { dg-error {cannot convert 'svfloat16x4_t' to 'svfloat16x3_t'} } */
+  f16 = svget3_f16 (pg, 0); /* { dg-error {cannot convert 'svbool_t' to 'svfloat16x3_t'} } */
+  f16 = svget3_f16 (f16x3, x); /* { dg-error "argument 2 of 'svget3_f16' must be an integer constant expression" } */
+  f16 = svget3_f16 (f16x3, 0);
+  f64 = svget3_f16 (f16x3, 0); /* { dg-error "cannot convert 'svfloat16_t' to 'svfloat64_t' in assignment" } */
+  f16 = svget3_f16 (f16x3, 1);
+  f16 = svget3_f16 (f16x3, 2);
+  f16 = svget3_f16 (f16x3, 3); /* { dg-error {passing 3 to argument 2 of 'svget3_f16', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3_f16 (f16x3, 4); /* { dg-error {passing 4 to argument 2 of 'svget3_f16', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3_f16 (f16x3, 5); /* { dg-error {passing 5 to argument 2 of 'svget3_f16', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3_f16 (f16x3, ~0U); /* { dg-error {passing [^ ]* to argument 2 of 'svget3_f16', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3_f16 (f16x3, one);
+  f16 = svget3_f16 (f16x3, 3 - 2);
+  f16 = svget3_f16 (f16x3, 1.0);
+  f16 = svget3_f16 (f16x3, const_sub (5, 4));
+  f16 = svget3_f16 (f16x3, const_sub (6, 4));
+  f16 = svget3_f16 (f16x3, const_sub (7, 4)); /* { dg-error {passing 3 to argument 2 of 'svget3_f16', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3_f16 (f16x3, const_sub (8, 4)); /* { dg-error {passing 4 to argument 2 of 'svget3_f16', which expects a value in the range \[0, 2\]} } */
+  f16 = svget3_f16 (f16x3, add (0, 0)); /* { dg-error "argument 2 of 'svget3_f16' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/get4_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svint32_t s32, svint32x4_t s32x4, svint32x2_t s32x2, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  s32 = svget4 (s32x4); /* { dg-error {no matching function for call to 'svget4\(svint32x4_t\&\)'} } */
+  s32 = svget4 (s32x4, 1, 2); /* { dg-error {no matching function for call to 'svget4\(svint32x4_t\&, int, int\)'} } */
+  s32 = svget4 (s32, 0); /* { dg-error {no matching function for call to 'svget4\(svint32_t\&, int\)'} } */
+  s32 = svget4 (s32x2, 0); /* { dg-error {no matching function for call to 'svget4\(svint32x2_t\&, int\)'} } */
+  s32 = svget4 (pg, 0); /* { dg-error {no matching function for call to 'svget4\(svbool_t\&, int\)'} } */
+  s32 = svget4 (s32x4, x); /* { dg-error "argument 2 of 'svget4' must be an integer constant expression" } */
+  s32 = svget4 (s32x4, 0);
+  f64 = svget4 (s32x4, 0); /* { dg-error "cannot convert 'svint32_t' to 'svfloat64_t' in assignment" } */
+  s32 = svget4 (s32x4, 1);
+  s32 = svget4 (s32x4, 2);
+  s32 = svget4 (s32x4, 3);
+  s32 = svget4 (s32x4, 4); /* { dg-error {passing 4 to argument 2 of 'svget4', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4 (s32x4, 5); /* { dg-error {passing 5 to argument 2 of 'svget4', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4 (s32x4, ~0U); /* { dg-error {passing [^ ]* to argument 2 of 'svget4', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4 (s32x4, one);
+  s32 = svget4 (s32x4, 3 - 2);
+  s32 = svget4 (s32x4, 1.0);
+  s32 = svget4 (s32x4, const_sub (5, 4));
+  s32 = svget4 (s32x4, const_sub (6, 4));
+  s32 = svget4 (s32x4, const_sub (7, 4));
+  s32 = svget4 (s32x4, const_sub (8, 4)); /* { dg-error {passing 4 to argument 2 of 'svget4', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4 (s32x4, add (0, 0)); /* { dg-error "argument 2 of 'svget4' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/get4_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svint32_t s32, svint32x4_t s32x4, svint32x2_t s32x2, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  s32 = svget4_s32 (s32x4); /* { dg-error {too few arguments to function '[^']*'} } */
+  s32 = svget4_s32 (s32x4, 1, 2); /* { dg-error {too many arguments to function '[^']*'} } */
+  s32 = svget4_s32 (s32, 0); /* { dg-error {cannot convert 'svint32_t' to 'svint32x4_t'} } */
+  s32 = svget4_s32 (s32x2, 0); /* { dg-error {cannot convert 'svint32x2_t' to 'svint32x4_t'} } */
+  s32 = svget4_s32 (pg, 0); /* { dg-error {cannot convert 'svbool_t' to 'svint32x4_t'} } */
+  s32 = svget4_s32 (s32x4, x); /* { dg-error "argument 2 of 'svget4_s32' must be an integer constant expression" } */
+  s32 = svget4_s32 (s32x4, 0);
+  f64 = svget4_s32 (s32x4, 0); /* { dg-error "cannot convert 'svint32_t' to 'svfloat64_t' in assignment" } */
+  s32 = svget4_s32 (s32x4, 1);
+  s32 = svget4_s32 (s32x4, 2);
+  s32 = svget4_s32 (s32x4, 3);
+  s32 = svget4_s32 (s32x4, 4); /* { dg-error {passing 4 to argument 2 of 'svget4_s32', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4_s32 (s32x4, 5); /* { dg-error {passing 5 to argument 2 of 'svget4_s32', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4_s32 (s32x4, ~0U); /* { dg-error {passing [^ ]* to argument 2 of 'svget4_s32', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4_s32 (s32x4, one);
+  s32 = svget4_s32 (s32x4, 3 - 2);
+  s32 = svget4_s32 (s32x4, 1.0);
+  s32 = svget4_s32 (s32x4, const_sub (5, 4));
+  s32 = svget4_s32 (s32x4, const_sub (6, 4));
+  s32 = svget4_s32 (s32x4, const_sub (7, 4));
+  s32 = svget4_s32 (s32x4, const_sub (8, 4)); /* { dg-error {passing 4 to argument 2 of 'svget4_s32', which expects a value in the range \[0, 3\]} } */
+  s32 = svget4_s32 (s32x4, add (0, 0)); /* { dg-error "argument 2 of 'svget4_s32' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/lsl_wide_1.C

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+svuint8_t
+f1 (svbool_t pg, svuint8_t x, svint8_t w, svuint64_t y)
+{
+  svlsl_wide_u8_x (pg, x, x); /* { dg-error "cannot convert 'svuint8_t' to 'svuint64_t'" } */
+  svlsl_wide_u8_x (pg, x); /* { dg-error {too few arguments to function 'svuint8_t svlsl_wide_u8_x\(svbool_t, svuint8_t, svuint64_t\)'} } */
+  svlsl_wide_u8_x (pg, x, y, x); /* { dg-error {too many arguments to function 'svuint8_t svlsl_wide_u8_x\(svbool_t, svuint8_t, svuint64_t\)'} } */
+  return svlsl_wide_s8_x (pg, w, y); /* { dg-error {cannot convert 'svint8_t' to 'svuint8_t' in return} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/lsl_wide_2.C

+/* { dg-do compile } */
+
+#pragma GCC aarch64 "arm_sve.h"
+
+void
+f1 (svbool_t pg, svuint8_t x, svuint64_t y)
+{
+  svlsl_wide_x (pg, x); /* { dg-error {no matching function for call to 'svlsl_wide_x\(svbool_t&, svuint8_t&\)'} } */
+  svlsl_wide_x (pg, x, x, x, x); /* { dg-error {no matching function for call to 'svlsl_wide_x\(svbool_t&, svuint8_t&, svuint8_t&, svuint8_t&, svuint8_t&\)'} } */
+  svlsl_wide_x (x, x, y); /* { dg-error {no matching function for call to 'svlsl_wide_x\(svuint8_t&, svuint8_t&, svuint64_t&\)'} } */
+  svlsl_wide_x (pg, 1, y); /* { dg-error {no matching function for call to 'svlsl_wide_x\(svbool_t&, int, svuint64_t&\)'} } */
+  svlsl_wide_x (pg, x, x); /* { dg-error {no matching function for call to 'svlsl_wide_x\(svbool_t&, svuint8_t&, svuint8_t&\)'} } */
+  svlsl_wide_x (pg, y, y); /* { dg-error {no matching function for call to 'svlsl_wide_x\(svbool_t&, svuint64_t&, svuint64_t&\)'} } */
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_1.C

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void f1(svbool_t) {}
+void f2(svint8_t) {}
+void f3(svint16_t) {}
+void f4(svint32_t) {}
+void f5(svint64_t) {}
+void f6(svuint8_t) {}
+void f7(svuint16_t) {}
+void f8(svuint32_t) {}
+void f9(svuint64_t) {}
+void f10(svfloat16_t) {}
+void f11(svfloat32_t) {}
+void f12(svfloat64_t) {}
+
+/* { dg-final { scan-assembler "_Z2f110__SVBool_t:" } } */
+/* { dg-final { scan-assembler "_Z2f210__SVInt8_t:" } } */
+/* { dg-final { scan-assembler "_Z2f311__SVInt16_t:" } } */
+/* { dg-final { scan-assembler "_Z2f411__SVInt32_t:" } } */
+/* { dg-final { scan-assembler "_Z2f511__SVInt64_t:" } } */
+/* { dg-final { scan-assembler "_Z2f611__SVUint8_t:" } } */
+/* { dg-final { scan-assembler "_Z2f712__SVUint16_t:" } } */
+/* { dg-final { scan-assembler "_Z2f812__SVUint32_t:" } } */
+/* { dg-final { scan-assembler "_Z2f912__SVUint64_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1013__SVFloat16_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1113__SVFloat32_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1213__SVFloat64_t:" } } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_2.C

+/* { dg-do compile } */
+
+void f1(__SVBool_t) {}
+void f2(__SVInt8_t) {}
+void f3(__SVInt16_t) {}
+void f4(__SVInt32_t) {}
+void f5(__SVInt64_t) {}
+void f6(__SVUint8_t) {}
+void f7(__SVUint16_t) {}
+void f8(__SVUint32_t) {}
+void f9(__SVUint64_t) {}
+void f10(__SVFloat16_t) {}
+void f11(__SVFloat32_t) {}
+void f12(__SVFloat64_t) {}
+
+/* { dg-final { scan-assembler "_Z2f110__SVBool_t:" } } */
+/* { dg-final { scan-assembler "_Z2f210__SVInt8_t:" } } */
+/* { dg-final { scan-assembler "_Z2f311__SVInt16_t:" } } */
+/* { dg-final { scan-assembler "_Z2f411__SVInt32_t:" } } */
+/* { dg-final { scan-assembler "_Z2f511__SVInt64_t:" } } */
+/* { dg-final { scan-assembler "_Z2f611__SVUint8_t:" } } */
+/* { dg-final { scan-assembler "_Z2f712__SVUint16_t:" } } */
+/* { dg-final { scan-assembler "_Z2f812__SVUint32_t:" } } */
+/* { dg-final { scan-assembler "_Z2f912__SVUint64_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1013__SVFloat16_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1113__SVFloat32_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1213__SVFloat64_t:" } } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_3.C

+/* { dg-do compile } */
+/* { dg-additional-options "-msve-vector-bits=256" } */
+
+#include <arm_sve.h>
+
+typedef __SVInt8_t t1;
+typedef svint8_t t2;
+/* Distinct from svint8_t, but compatible with it.  */
+typedef int8_t t3 __attribute__((vector_size(32)));
+
+void f1(t1) {}
+void f2(t2) {}
+void f3(t3) {}
+void f4(t1 &a, t2 &b, t3 &c) { a = b = c; }
+
+/* { dg-final { scan-assembler "_Z2f110__SVInt8_t:" } } */
+/* { dg-final { scan-assembler "_Z2f210__SVInt8_t:" } } */
+/* { dg-final { scan-assembler "_Z2f3Dv32_a:" } } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_4.C

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void f1(svint8x2_t) {}
+void f2(svint16x2_t) {}
+void f3(svint32x2_t) {}
+void f4(svint64x2_t) {}
+void f5(svuint8x2_t) {}
+void f6(svuint16x2_t) {}
+void f7(svuint32x2_t) {}
+void f8(svuint64x2_t) {}
+void f9(svfloat16x2_t) {}
+void f10(svfloat32x2_t) {}
+void f11(svfloat64x2_t) {}
+
+void g1(svint8x3_t) {}
+void g2(svint16x3_t) {}
+void g3(svint32x3_t) {}
+void g4(svint64x3_t) {}
+void g5(svuint8x3_t) {}
+void g6(svuint16x3_t) {}
+void g7(svuint32x3_t) {}
+void g8(svuint64x3_t) {}
+void g9(svfloat16x3_t) {}
+void g10(svfloat32x3_t) {}
+void g11(svfloat64x3_t) {}
+
+void h1(svint8x4_t) {}
+void h2(svint16x4_t) {}
+void h3(svint32x4_t) {}
+void h4(svint64x4_t) {}
+void h5(svuint8x4_t) {}
+void h6(svuint16x4_t) {}
+void h7(svuint32x4_t) {}
+void h8(svuint64x4_t) {}
+void h9(svfloat16x4_t) {}
+void h10(svfloat32x4_t) {}
+void h11(svfloat64x4_t) {}
+
+/* { dg-final { scan-assembler "_Z2f110svint8x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f211svint16x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f311svint32x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f411svint64x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f511svuint8x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f612svuint16x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f712svuint32x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f812svuint64x2_t:" } } */
+/* { dg-final { scan-assembler "_Z2f913svfloat16x2_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1013svfloat32x2_t:" } } */
+/* { dg-final { scan-assembler "_Z3f1113svfloat64x2_t:" } } */
+
+/* { dg-final { scan-assembler "_Z2g110svint8x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g211svint16x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g311svint32x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g411svint64x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g511svuint8x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g612svuint16x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g712svuint32x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g812svuint64x3_t:" } } */
+/* { dg-final { scan-assembler "_Z2g913svfloat16x3_t:" } } */
+/* { dg-final { scan-assembler "_Z3g1013svfloat32x3_t:" } } */
+/* { dg-final { scan-assembler "_Z3g1113svfloat64x3_t:" } } */
+
+/* { dg-final { scan-assembler "_Z2h110svint8x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h211svint16x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h311svint32x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h411svint64x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h511svuint8x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h612svuint16x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h712svuint32x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h812svuint64x4_t:" } } */
+/* { dg-final { scan-assembler "_Z2h913svfloat16x4_t:" } } */
+/* { dg-final { scan-assembler "_Z3h1013svfloat32x4_t:" } } */
+/* { dg-final { scan-assembler "_Z3h1113svfloat64x4_t:" } } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/set2_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svuint8_t u8, svuint8x2_t u8x2, svint8x2_t s8x2,
+    svuint8x3_t u8x3, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  u8x2 = svset2 (u8x2); /* { dg-error {no matching function for call to 'svset2\(svuint8x2_t\&\)'} } */
+  u8x2 = svset2 (u8x2, 1); /* { dg-error {no matching function for call to 'svset2\(svuint8x2_t\&, int\)'} } */
+  u8x2 = svset2 (u8x2, 1, u8, 2); /* { dg-error {no matching function for call to 'svset2\(svuint8x2_t\&, int, svuint8_t\&, int\)'} } */
+  u8x2 = svset2 (u8, 0, u8); /* { dg-error {no matching function for call to 'svset2\(svuint8_t\&, int, svuint8_t\&\)'} } */
+  u8x2 = svset2 (s8x2, 0, u8); /* { dg-error {no matching function for call to 'svset2\(svint8x2_t\&, int, svuint8_t\&\)'} } */
+  u8x2 = svset2 (u8x3, 0, u8); /* { dg-error {no matching function for call to 'svset2\(svuint8x3_t\&, int, svuint8_t\&\)'} } */
+  u8x2 = svset2 (pg, 0, u8); /* { dg-error {no matching function for call to 'svset2\(svbool_t\&, int, svuint8_t\&\)'} } */
+  u8x2 = svset2 (u8x2, 0, f64); /* { dg-error {no matching function for call to 'svset2\(svuint8x2_t\&, int, svfloat64_t\&\)'} } */
+  u8x2 = svset2 (u8x2, 0, u8x2); /* { dg-error {no matching function for call to 'svset2\(svuint8x2_t\&, int, svuint8x2_t\&\)'} } */
+  u8x2 = svset2 (u8x2, 0, pg); /* { dg-error {no matching function for call to 'svset2\(svuint8x2_t\&, int, svbool_t\&\)'} } */
+  u8x2 = svset2 (u8x2, x, u8); /* { dg-error "argument 2 of 'svset2' must be an integer constant expression" } */
+  u8x2 = svset2 (u8x2, 0, u8);
+  s8x2 = svset2 (u8x2, 0, u8); /* { dg-error {cannot convert 'svuint8x2_t' to 'svint8x2_t' in assignment} } */
+  u8x2 = svset2 (u8x2, 1, u8);
+  u8x2 = svset2 (u8x2, 2, u8); /* { dg-error {passing 2 to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, 3, u8); /* { dg-error {passing 3 to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, 4, u8); /* { dg-error {passing 4 to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, 5, u8); /* { dg-error {passing 5 to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, ~0U, u8); /* { dg-error {passing [^ ]* to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, one, u8);
+  u8x2 = svset2 (u8x2, 3 - 2, u8);
+  u8x2 = svset2 (u8x2, 1.0, u8);
+  u8x2 = svset2 (u8x2, const_sub (5, 4), u8);
+  u8x2 = svset2 (u8x2, const_sub (6, 4), u8); /* { dg-error {passing 2 to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, const_sub (7, 4), u8); /* { dg-error {passing 3 to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, const_sub (8, 4), u8); /* { dg-error {passing 4 to argument 2 of 'svset2', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2 (u8x2, add (0, 0), u8); /* { dg-error "argument 2 of 'svset2' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/set2_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svuint8_t u8, svuint8x2_t u8x2, svint8x2_t s8x2,
+    svuint8x3_t u8x3, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  u8x2 = svset2_u8 (u8x2); /* { dg-error {too few arguments to function '[^']*'} } */
+  u8x2 = svset2_u8 (u8x2, 1); /* { dg-error {too few arguments to function '[^']*'} } */
+  u8x2 = svset2_u8 (u8x2, 1, u8, 2); /* { dg-error {too many arguments to function '[^']*'} } */
+  u8x2 = svset2_u8 (u8, 0, u8); /* { dg-error {cannot convert 'svuint8_t' to 'svuint8x2_t'} } */
+  u8x2 = svset2_u8 (s8x2, 0, u8); /* { dg-error {cannot convert 'svint8x2_t' to 'svuint8x2_t'} } */
+  u8x2 = svset2_u8 (u8x3, 0, u8); /* { dg-error {cannot convert 'svuint8x3_t' to 'svuint8x2_t'} } */
+  u8x2 = svset2_u8 (pg, 0, u8); /* { dg-error {cannot convert 'svbool_t' to 'svuint8x2_t'} } */
+  u8x2 = svset2_u8 (u8x2, 0, f64); /* { dg-error {cannot convert 'svfloat64_t' to 'svuint8_t'} } */
+  u8x2 = svset2_u8 (u8x2, 0, u8x2); /* { dg-error {cannot convert 'svuint8x2_t' to 'svuint8_t'} } */
+  u8x2 = svset2_u8 (u8x2, 0, pg); /* { dg-error {cannot convert 'svbool_t' to 'svuint8_t'} } */
+  u8x2 = svset2_u8 (u8x2, x, u8); /* { dg-error "argument 2 of 'svset2_u8' must be an integer constant expression" } */
+  u8x2 = svset2_u8 (u8x2, 0, u8);
+  s8x2 = svset2_u8 (u8x2, 0, u8); /* { dg-error {cannot convert 'svuint8x2_t' to 'svint8x2_t' in assignment} } */
+  u8x2 = svset2_u8 (u8x2, 1, u8);
+  u8x2 = svset2_u8 (u8x2, 2, u8); /* { dg-error {passing 2 to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, 3, u8); /* { dg-error {passing 3 to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, 4, u8); /* { dg-error {passing 4 to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, 5, u8); /* { dg-error {passing 5 to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, ~0U, u8); /* { dg-error {passing [^ ]* to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, one, u8);
+  u8x2 = svset2_u8 (u8x2, 3 - 2, u8);
+  u8x2 = svset2_u8 (u8x2, 1.0, u8);
+  u8x2 = svset2_u8 (u8x2, const_sub (5, 4), u8);
+  u8x2 = svset2_u8 (u8x2, const_sub (6, 4), u8); /* { dg-error {passing 2 to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, const_sub (7, 4), u8); /* { dg-error {passing 3 to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, const_sub (8, 4), u8); /* { dg-error {passing 4 to argument 2 of 'svset2_u8', which expects a value in the range \[0, 1\]} } */
+  u8x2 = svset2_u8 (u8x2, add (0, 0), u8); /* { dg-error "argument 2 of 'svset2_u8' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/set3_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svfloat16_t f16, svfloat16x3_t f16x3, svuint16x3_t u16x3,
+    svfloat16x4_t f16x4, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  f16x3 = svset3 (f16x3); /* { dg-error {no matching function for call to 'svset3\(svfloat16x3_t\&\)'} } */
+  f16x3 = svset3 (f16x3, 1); /* { dg-error {no matching function for call to 'svset3\(svfloat16x3_t\&, int\)'} } */
+  f16x3 = svset3 (f16x3, 1, f16, 2); /* { dg-error {no matching function for call to 'svset3\(svfloat16x3_t\&, int, svfloat16_t\&, int\)'} } */
+  f16x3 = svset3 (f16, 0, f16); /* { dg-error {no matching function for call to 'svset3\(svfloat16_t\&, int, svfloat16_t\&\)'} } */
+  f16x3 = svset3 (u16x3, 0, f16); /* { dg-error {no matching function for call to 'svset3\(svuint16x3_t\&, int, svfloat16_t\&\)'} } */
+  f16x3 = svset3 (f16x4, 0, f16); /* { dg-error {no matching function for call to 'svset3\(svfloat16x4_t\&, int, svfloat16_t\&\)'} } */
+  f16x3 = svset3 (pg, 0, f16); /* { dg-error {no matching function for call to 'svset3\(svbool_t\&, int, svfloat16_t\&\)'} } */
+  f16x3 = svset3 (f16x3, 0, f64); /* { dg-error {no matching function for call to 'svset3\(svfloat16x3_t\&, int, svfloat64_t\&\)'} } */
+  f16x3 = svset3 (f16x3, 0, f16x3); /* { dg-error {no matching function for call to 'svset3\(svfloat16x3_t\&, int, svfloat16x3_t\&\)'} } */
+  f16x3 = svset3 (f16x3, 0, pg); /* { dg-error {no matching function for call to 'svset3\(svfloat16x3_t\&, int, svbool_t\&\)'} } */
+  f16x3 = svset3 (f16x3, x, f16); /* { dg-error "argument 2 of 'svset3' must be an integer constant expression" } */
+  f16x3 = svset3 (f16x3, 0, f16);
+  u16x3 = svset3 (f16x3, 0, f16); /* { dg-error {cannot convert 'svfloat16x3_t' to 'svuint16x3_t' in assignment} } */
+  f16x3 = svset3 (f16x3, 1, f16);
+  f16x3 = svset3 (f16x3, 2, f16);
+  f16x3 = svset3 (f16x3, 3, f16); /* { dg-error {passing 3 to argument 2 of 'svset3', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3 (f16x3, 4, f16); /* { dg-error {passing 4 to argument 2 of 'svset3', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3 (f16x3, 5, f16); /* { dg-error {passing 5 to argument 2 of 'svset3', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3 (f16x3, ~0U, f16); /* { dg-error {passing [^ ]* to argument 2 of 'svset3', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3 (f16x3, one, f16);
+  f16x3 = svset3 (f16x3, 3 - 2, f16);
+  f16x3 = svset3 (f16x3, 1.0, f16);
+  f16x3 = svset3 (f16x3, const_sub (5, 4), f16);
+  f16x3 = svset3 (f16x3, const_sub (6, 4), f16);
+  f16x3 = svset3 (f16x3, const_sub (7, 4), f16); /* { dg-error {passing 3 to argument 2 of 'svset3', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3 (f16x3, const_sub (8, 4), f16); /* { dg-error {passing 4 to argument 2 of 'svset3', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3 (f16x3, add (0, 0), f16); /* { dg-error "argument 2 of 'svset3' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/set3_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svfloat16_t f16, svfloat16x3_t f16x3, svuint16x3_t u16x3,
+    svfloat16x4_t f16x4, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  f16x3 = svset3_f16 (f16x3); /* { dg-error {too few arguments to function '[^']*'} } */
+  f16x3 = svset3_f16 (f16x3, 1); /* { dg-error {too few arguments to function '[^']*'} } */
+  f16x3 = svset3_f16 (f16x3, 1, f16, 2); /* { dg-error {too many arguments to function '[^']*'} } */
+  f16x3 = svset3_f16 (f16, 0, f16); /* { dg-error {cannot convert 'svfloat16_t' to 'svfloat16x3_t'} } */
+  f16x3 = svset3_f16 (u16x3, 0, f16); /* { dg-error {cannot convert 'svuint16x3_t' to 'svfloat16x3_t'} } */
+  f16x3 = svset3_f16 (f16x4, 0, f16); /* { dg-error {cannot convert 'svfloat16x4_t' to 'svfloat16x3_t'} } */
+  f16x3 = svset3_f16 (pg, 0, f16); /* { dg-error {cannot convert 'svbool_t' to 'svfloat16x3_t'} } */
+  f16x3 = svset3_f16 (f16x3, 0, f64); /* { dg-error {cannot convert 'svfloat64_t' to 'svfloat16_t'} } */
+  f16x3 = svset3_f16 (f16x3, 0, f16x3); /* { dg-error {cannot convert 'svfloat16x3_t' to 'svfloat16_t'} } */
+  f16x3 = svset3_f16 (f16x3, 0, pg); /* { dg-error {cannot convert 'svbool_t' to 'svfloat16_t'} } */
+  f16x3 = svset3_f16 (f16x3, x, f16); /* { dg-error "argument 2 of 'svset3_f16' must be an integer constant expression" } */
+  f16x3 = svset3_f16 (f16x3, 0, f16);
+  u16x3 = svset3_f16 (f16x3, 0, f16); /* { dg-error {cannot convert 'svfloat16x3_t' to 'svuint16x3_t' in assignment} } */
+  f16x3 = svset3_f16 (f16x3, 1, f16);
+  f16x3 = svset3_f16 (f16x3, 2, f16);
+  f16x3 = svset3_f16 (f16x3, 3, f16); /* { dg-error {passing 3 to argument 2 of 'svset3_f16', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3_f16 (f16x3, 4, f16); /* { dg-error {passing 4 to argument 2 of 'svset3_f16', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3_f16 (f16x3, 5, f16); /* { dg-error {passing 5 to argument 2 of 'svset3_f16', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3_f16 (f16x3, ~0U, f16); /* { dg-error {passing [^ ]* to argument 2 of 'svset3_f16', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3_f16 (f16x3, one, f16);
+  f16x3 = svset3_f16 (f16x3, 3 - 2, f16);
+  f16x3 = svset3_f16 (f16x3, 1.0, f16);
+  f16x3 = svset3_f16 (f16x3, const_sub (5, 4), f16);
+  f16x3 = svset3_f16 (f16x3, const_sub (6, 4), f16);
+  f16x3 = svset3_f16 (f16x3, const_sub (7, 4), f16); /* { dg-error {passing 3 to argument 2 of 'svset3_f16', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3_f16 (f16x3, const_sub (8, 4), f16); /* { dg-error {passing 4 to argument 2 of 'svset3_f16', which expects a value in the range \[0, 2\]} } */
+  f16x3 = svset3_f16 (f16x3, add (0, 0), f16); /* { dg-error "argument 2 of 'svset3_f16' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/set4_1.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svint32_t s32, svint32x4_t s32x4, svfloat32x4_t f32x4,
+    svint32x2_t s32x2, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  s32x4 = svset4 (s32x4); /* { dg-error {no matching function for call to 'svset4\(svint32x4_t\&\)'} } */
+  s32x4 = svset4 (s32x4, 1); /* { dg-error {no matching function for call to 'svset4\(svint32x4_t\&, int\)'} } */
+  s32x4 = svset4 (s32x4, 1, s32, 2); /* { dg-error {no matching function for call to 'svset4\(svint32x4_t\&, int, svint32_t\&, int\)'} } */
+  s32x4 = svset4 (s32, 0, s32); /* { dg-error {no matching function for call to 'svset4\(svint32_t\&, int, svint32_t\&\)'} } */
+  s32x4 = svset4 (f32x4, 0, s32); /* { dg-error {no matching function for call to 'svset4\(svfloat32x4_t\&, int, svint32_t\&\)'} } */
+  s32x4 = svset4 (s32x2, 0, s32); /* { dg-error {no matching function for call to 'svset4\(svint32x2_t\&, int, svint32_t\&\)'} } */
+  s32x4 = svset4 (pg, 0, s32); /* { dg-error {no matching function for call to 'svset4\(svbool_t\&, int, svint32_t\&\)'} } */
+  s32x4 = svset4 (s32x4, 0, f64); /* { dg-error {no matching function for call to 'svset4\(svint32x4_t\&, int, svfloat64_t\&\)'} } */
+  s32x4 = svset4 (s32x4, 0, s32x4); /* { dg-error {no matching function for call to 'svset4\(svint32x4_t\&, int, svint32x4_t\&\)'} } */
+  s32x4 = svset4 (s32x4, 0, pg); /* { dg-error {no matching function for call to 'svset4\(svint32x4_t\&, int, svbool_t\&\)'} } */
+  s32x4 = svset4 (s32x4, x, s32); /* { dg-error "argument 2 of 'svset4' must be an integer constant expression" } */
+  s32x4 = svset4 (s32x4, 0, s32);
+  f32x4 = svset4 (s32x4, 0, s32); /* { dg-error {cannot convert 'svint32x4_t' to 'svfloat32x4_t' in assignment} } */
+  s32x4 = svset4 (s32x4, 1, s32);
+  s32x4 = svset4 (s32x4, 2, s32);
+  s32x4 = svset4 (s32x4, 3, s32);
+  s32x4 = svset4 (s32x4, 4, s32); /* { dg-error {passing 4 to argument 2 of 'svset4', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4 (s32x4, 5, s32); /* { dg-error {passing 5 to argument 2 of 'svset4', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4 (s32x4, ~0U, s32); /* { dg-error {passing [^ ]* to argument 2 of 'svset4', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4 (s32x4, one, s32);
+  s32x4 = svset4 (s32x4, 3 - 2, s32);
+  s32x4 = svset4 (s32x4, 1.0, s32);
+  s32x4 = svset4 (s32x4, const_sub (5, 4), s32);
+  s32x4 = svset4 (s32x4, const_sub (6, 4), s32);
+  s32x4 = svset4 (s32x4, const_sub (7, 4), s32);
+  s32x4 = svset4 (s32x4, const_sub (8, 4), s32); /* { dg-error {passing 4 to argument 2 of 'svset4', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4 (s32x4, add (0, 0), s32); /* { dg-error "argument 2 of 'svset4' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/set4_2.C

+/* { dg-do compile } */
+/* { dg-additional-options "-std=c++11 -Wall -Wextra" } */
+
+#include <arm_sve.h>
+
+constexpr uint64_t const_sub (uint64_t a, uint64_t b) { return a - b; }
+uint64_t add (uint64_t a, uint64_t b) { return a + b; }
+
+svfloat64_t
+f1 (svbool_t pg, svint32_t s32, svint32x4_t s32x4, svfloat32x4_t f32x4,
+    svint32x2_t s32x2, int x)
+{
+  const int one = 1;
+  svfloat64_t f64;
+
+  s32x4 = svset4_s32 (s32x4); /* { dg-error {too few arguments to function '[^']*'} } */
+  s32x4 = svset4_s32 (s32x4, 1); /* { dg-error {too few arguments to function '[^']*'} } */
+  s32x4 = svset4_s32 (s32x4, 1, s32, 2); /* { dg-error {too many arguments to function '[^']*'} } */
+  s32x4 = svset4_s32 (s32, 0, s32); /* { dg-error {cannot convert 'svint32_t' to 'svint32x4_t'} } */
+  s32x4 = svset4_s32 (f32x4, 0, s32); /* { dg-error {cannot convert 'svfloat32x4_t' to 'svint32x4_t'} } */
+  s32x4 = svset4_s32 (s32x2, 0, s32); /* { dg-error {cannot convert 'svint32x2_t' to 'svint32x4_t'} } */
+  s32x4 = svset4_s32 (pg, 0, s32); /* { dg-error {cannot convert 'svbool_t' to 'svint32x4_t'} } */
+  s32x4 = svset4_s32 (s32x4, 0, f64); /* { dg-error {cannot convert 'svfloat64_t' to 'svint32_t'} } */
+  s32x4 = svset4_s32 (s32x4, 0, s32x4); /* { dg-error {cannot convert 'svint32x4_t' to 'svint32_t'} } */
+  s32x4 = svset4_s32 (s32x4, 0, pg); /* { dg-error {cannot convert 'svbool_t' to 'svint32_t'} } */
+  s32x4 = svset4_s32 (s32x4, x, s32); /* { dg-error "argument 2 of 'svset4_s32' must be an integer constant expression" } */
+  s32x4 = svset4_s32 (s32x4, 0, s32);
+  f32x4 = svset4_s32 (s32x4, 0, s32); /* { dg-error {cannot convert 'svint32x4_t' to 'svfloat32x4_t' in assignment} } */
+  s32x4 = svset4_s32 (s32x4, 1, s32);
+  s32x4 = svset4_s32 (s32x4, 2, s32);
+  s32x4 = svset4_s32 (s32x4, 3, s32);
+  s32x4 = svset4_s32 (s32x4, 4, s32); /* { dg-error {passing 4 to argument 2 of 'svset4_s32', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4_s32 (s32x4, 5, s32); /* { dg-error {passing 5 to argument 2 of 'svset4_s32', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4_s32 (s32x4, ~0U, s32); /* { dg-error {passing [^ ]* to argument 2 of 'svset4_s32', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4_s32 (s32x4, one, s32);
+  s32x4 = svset4_s32 (s32x4, 3 - 2, s32);
+  s32x4 = svset4_s32 (s32x4, 1.0, s32);
+  s32x4 = svset4_s32 (s32x4, const_sub (5, 4), s32);
+  s32x4 = svset4_s32 (s32x4, const_sub (6, 4), s32);
+  s32x4 = svset4_s32 (s32x4, const_sub (7, 4), s32);
+  s32x4 = svset4_s32 (s32x4, const_sub (8, 4), s32); /* { dg-error {passing 4 to argument 2 of 'svset4_s32', which expects a value in the range \[0, 3\]} } */
+  s32x4 = svset4_s32 (s32x4, add (0, 0), s32); /* { dg-error "argument 2 of 'svset4_s32' must be an integer constant expression" } */
+
+  return f64;
+}

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_1.c

+/* { dg-do compile } */
+
+int svbool_t; /* { dg-message "note: previous declaration 'int svbool_t'" } */
+
+#pragma GCC aarch64 "arm_sve.h"  /* { dg-error {'typedef [^'\n]* svbool_t' redeclared as different kind of entity} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_10.c

+/* { dg-do compile } */
+
+typedef int svint8x2_t;
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {conflicting declaration 'typedef struct svint8x2_t svint8x2_t'} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_11.c

+/* { dg-do compile } */
+
+struct svint8x2_t;
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {conflicting declaration 'typedef struct svint8x2_t svint8x2_t'} } */
+
+svint8_t f (svint8x2_t x) { return x.__val[0]; } /* { dg-error {'x' has incomplete type} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_12.c

+/* { dg-do compile } */
+
+typedef struct svint8x2_t svint8x2_t;
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {conflicting declaration 'typedef struct svint8x2_t svint8x2_t'} } */
+
+svint8_t f (svint8x2_t x) { return x.__val[0]; } /* { dg-error {'x' has incomplete type} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_13.c

+/* { dg-do compile } */
+
+struct svint8x2_t {};
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {conflicting declaration 'typedef struct svint8x2_t svint8x2_t'} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_14.c

+/* { dg-do compile } */
+
+enum svpattern { FOO }; /* { dg-message "note: previous definition here" } */
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error "multiple definition of 'enum svpattern'" } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_15.c

+/* { dg-do compile } */
+
+#pragma GCC aarch64 "arm_sve.h"
+
+enum svpattern { FOO }; /* { dg-error "multiple definition of 'enum svpattern'" } */
+enum foo { SV_ALL }; /* { dg-error "'SV_ALL' conflicts with a previous declaration" } */
+typedef int SV_POW2; /* { dg-error "'typedef int SV_POW2' redeclared as different kind of entity" } */
+int SV_VL3; /* { dg-error "'int SV_VL3' redeclared as different kind of entity" } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_16.c

+/* { dg-do compile } */
+
+struct svpattern { int x; };
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error "'svpattern' referred to as enum" } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_17.c

+/* { dg-do compile } */
+
+#pragma GCC aarch64 "arm_sve.h"
+
+struct svpattern { int x; }; /* { dg-error "'svpattern' referred to as 'struct'" } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_18.c

+/* { dg-do compile } */
+
+int svpattern; /* OK in C.  */
+
+#pragma GCC aarch64 "arm_sve.h"

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_19.c

+/* { dg-do compile } */
+
+#pragma GCC aarch64 "arm_sve.h"
+
+int svpattern; /* OK in C.  */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_2.c

+/* { dg-do compile } */
+
+int svint8_t; /* { dg-message "note: previous declaration 'int svint8_t" } */
+
+#pragma GCC aarch64 "arm_sve.h"  /* { dg-error {'typedef [^'\n]* svint8_t' redeclared as different kind of entity} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_20.c

+/* { dg-do compile } */
+
+enum foo { SV_VL4 };
+typedef int SV_POW2;
+int SV_ALL;
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error "'SV_VL4' conflicts with a previous declaration" } */
+/* { dg-error "'SV_POW2' redeclared as different kind of entity" "" { target *-*-* } .-1 } */
+/* { dg-error "'SV_ALL' redeclared as different kind of entity" "" { target *-*-* } .-2 } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_3.c

+/* { dg-do compile } */
+
+int svuint16_t; /* { dg-message "note: previous declaration 'int svuint16_t'" } */
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {'typedef [^'\n]* svuint16_t' redeclared as different kind of entity} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_4.c

+/* { dg-do compile } */
+
+int svfloat32_t; /* { dg-message "note: previous declaration 'int svfloat32_t'" } */
+
+#pragma GCC aarch64 "arm_sve.h"  /* { dg-error {'typedef [^'\n]* svfloat32_t' redeclared as different kind of entity} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_5.c

+/* { dg-do compile } */
+
+typedef int svbool_t; /* { dg-message "note: previous declaration as 'typedef int svbool_t'" } */
+
+#pragma GCC aarch64 "arm_sve.h"  /* { dg-error {conflicting declaration '[^'\n]* svbool_t'} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_6.c

+/* { dg-do compile } */
+
+typedef __SVBool_t svbool_t;
+
+#pragma GCC aarch64 "arm_sve.h"
+

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_7.c

+/* { dg-do compile } */
+
+int svint8x2_t;
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {'typedef struct svint8x2_t svint8x2_t' redeclared as different kind of entity} } */
+
+void f (struct svint8x2_t) {} /* { dg-error {incomplete type} } */
+void g () { int &x = svint8x2_t; }

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_8.c

+/* { dg-do compile } */
+
+struct svint8x2_t;
+
+#pragma GCC aarch64 "arm_sve.h" /* { dg-error {conflicting declaration 'typedef struct svint8x2_t svint8x2_t'} } */
+
+void f (svint8x2_t) {} /* { dg-error {incomplete type} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/type_redef_9.c

+/* { dg-do compile } */
+
+#pragma GCC aarch64 "arm_sve.h"
+
+int svint8x2_t; /* { dg-error {'int svint8x2_t' redeclared as different kind of entity} } */
+
+void f (struct svint8x2_t) {} /* { dg-error {using typedef-name 'svint8x2_t' after 'struct'} } */
+void g () { int &x = svint8x2_t; } /* { dg-error {expected primary-expression before ';' token} } */

gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/whilele_1.C

+// { dg-do compile }
+
+#include <arm_sve.h>
+
+enum foo { A, B };
+
+void
+test (int8_t s8, int16_t s16, int32_t s32, int64_t s64,
+      uint8_t u8, uint16_t u16, uint32_t u32, uint64_t u64,
+      bool b, foo e, int *ptr, float f32, svbool_t pg,
+      svint32_t vec)
+{
+  svwhilele_b8 (s32); // { dg-error {no matching function for call to 'svwhilele_b8\(int32_t&\)'} }
+  svwhilele_b8 (s32, s32, s32); // { dg-error {no matching function for call to 'svwhilele_b8\(int32_t&, int32_t&, int32_t&\)'} }
+
+  svwhilele_b8 (b, b);
+  svwhilele_b8 (e, e);
+  svwhilele_b8 (s8, s8);
+  svwhilele_b8 (u8, u8);
+  svwhilele_b8 (s16, s16);
+  svwhilele_b8 (u16, u16);
+  svwhilele_b8 (ptr, ptr); // { dg-error {no matching function for call to 'svwhilele_b8\(int\*&, int\*&\)'} }
+  // { dg-error {invalid conversion from 'int\*' to '[^']*'} "" { target *-*-* } .-1 }
+  svwhilele_b8 (f32, f32); // { dg-error {call of overloaded 'svwhilele_b8\(float&, float&\)' is ambiguous} }
+  svwhilele_b8 (pg, pg); // { dg-error {no matching function for call to 'svwhilele_b8\(svbool_t&, svbool_t&\)'} }
+  svwhilele_b8 (vec, vec); // { dg-error {no matching function for call to 'svwhilele_b8\(svint32_t&, svint32_t&\)'} }
+
+  svwhilele_b8 (s32, b);
+  svwhilele_b8 (s32, e);
+  svwhilele_b8 (s32, s8);
+  svwhilele_b8 (s32, u8);
+  svwhilele_b8 (s32, s16);
+  svwhilele_b8 (s32, u16);
+
+  svwhilele_b8 (u32, b); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, bool&\)' is ambiguous} }
+  svwhilele_b8 (u32, e); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, foo&\)' is ambiguous} }
+  svwhilele_b8 (u32, s8); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, int8_t&\)' is ambiguous} }
+  svwhilele_b8 (u32, u8); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, uint8_t&\)' is ambiguous} }
+  svwhilele_b8 (u32, s16); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, int16_t&\)' is ambiguous} }
+  svwhilele_b8 (u32, u16); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, uint16_t&\)' is ambiguous} }
+
+  svwhilele_b8 (s32, s32);
+  svwhilele_b8 (s32, u32); // { dg-error {call of overloaded 'svwhilele_b8\(int32_t&, uint32_t&\)' is ambiguous} }
+  svwhilele_b8 (s32, s64); // { dg-error {call of overloaded 'svwhilele_b8\(int32_t&, int64_t&\)' is ambiguous} }
+  svwhilele_b8 (s32, u64); // { dg-error {call of overloaded 'svwhilele_b8\(int32_t&, uint64_t&\)' is ambiguous} }
+
+  svwhilele_b8 (u32, s32); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, int32_t&\)' is ambiguous} }
+  svwhilele_b8 (u32, u32);
+  svwhilele_b8 (u32, s64); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, int64_t&\)' is ambiguous} }
+  svwhilele_b8 (u32, u64); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, uint64_t&\)' is ambiguous} }
+
+  svwhilele_b8 (s64, s32); // { dg-error {call of overloaded 'svwhilele_b8\(int64_t&, int32_t&\)' is ambiguous} }
+  svwhilele_b8 (s64, u32); // { dg-error {call of overloaded 'svwhilele_b8\(int64_t&, uint32_t&\)' is ambiguous} }
+  svwhilele_b8 (s64, s64);
+  svwhilele_b8 (s64, u64); // { dg-error {call of overloaded 'svwhilele_b8\(int64_t&, uint64_t&\)' is ambiguous} }
+
+  svwhilele_b8 (u64, s32); // { dg-error {call of overloaded 'svwhilele_b8\(uint64_t&, int32_t&\)' is ambiguous} }
+  svwhilele_b8 (u64, u32); // { dg-error {call of overloaded 'svwhilele_b8\(uint64_t&, uint32_t&\)' is ambiguous} }
+  svwhilele_b8 (u64, s64); // { dg-error {call of overloaded 'svwhilele_b8\(uint64_t&, int64_t&\)' is ambiguous} }
+  svwhilele_b8 (u64, u64);
+
+  svwhilele_b8 (0, s32);
+  svwhilele_b8 (0, u32); // { dg-error {call of overloaded 'svwhilele_b8\(int, uint32_t&\)' is ambiguous} }
+  svwhilele_b8 (0, s64); // { dg-error {call of overloaded 'svwhilele_b8\(int, int64_t&\)' is ambiguous} }
+  svwhilele_b8 (0, u64); // { dg-error {call of overloaded 'svwhilele_b8\(int, uint64_t&\)' is ambiguous} }
+
+  svwhilele_b8 (s32, 0);
+  svwhilele_b8 (u32, 0); // { dg-error {call of overloaded 'svwhilele_b8\(uint32_t&, int\)' is ambiguous} }
+  svwhilele_b8 (s64, 0); // { dg-error {call of overloaded 'svwhilele_b8\(int64_t&, int\)' is ambiguous} }
+  svwhilele_b8 (u64, 0); // { dg-error {call of overloaded 'svwhilele_b8\(uint64_t&, int\)' is ambiguous} }
+
+  svwhilele_b8 (0U, s32); // { dg-error {call of overloaded 'svwhilele_b8\(unsigned int, int32_t&\)' is ambiguous} }
+  svwhilele_b8 (0U, u32);
+  svwhilele_b8 (0U, s64); // { dg-error {call of overloaded 'svwhilele_b8\(unsigned int, int64_t&\)' is ambiguous} }
+  svwhilele_b8 (0U, u64); // { dg-error {call of overloaded 'svwhilele_b8\(unsigned int, uint64_t&\)' is ambiguous} }
+
+  svwhilele_b8 (s32, 0U); // { dg-error {call of overloaded 'svwhilele_b8\(int32_t&, unsigned int\)' is ambiguous} }
+  svwhilele_b8 (u32, 0U);
+  svwhilele_b8 (s64, 0U); // { dg-error {call of overloaded 'svwhilele_b8\(int64_t&, unsigned int\)' is ambiguous} }
+  svwhilele_b8 (u64, 0U); // { dg-error {call of overloaded 'svwhilele_b8\(uint64_t&, unsigned int\)' is ambiguous} }
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/aarch64-sve-acle.exp

+#  Specific regression driver for AArch64 SVE.
+#  Copyright (C) 2009-2019 Free Software Foundation, Inc.
+#  Contributed by ARM Ltd.
+#
+#  This file is part of GCC.
+#
+#  GCC is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 3, or (at your option)
+#  any later version.
+#
+#  GCC is distributed in the hope that it will be useful, but
+#  WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+#  General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with GCC; see the file COPYING3.  If not see
+#  <http://www.gnu.org/licenses/>.  */
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an AArch64 target.
+if {![istarget aarch64*-*-*] } {
+    return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+    set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Force SVE if we're not testing it already.
+if { [check_effective_target_aarch64_sve] } {
+    set sve_flags ""
+} else {
+    set sve_flags "-march=armv8.2-a+sve"
+}
+
+# Main loop.
+# FIXME: This should include general/*.c too, but leave that until the
+# C frontend allows initialization of SVE vectors.
+set files [glob -nocomplain $srcdir/$subdir/general-c/*.c]
+dg-runtest [lsort $files] "$sve_flags" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/adr_index_1.c

+/* { dg-do compile } */
+/* { dg-options "-std=c99" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, uint32_t *u32_ptr, svuint8_t u8, svuint16_t u16,
+    svint32_t s32, svuint32_t u32, svfloat32_t f32,
+    svint64_t s64, svuint64_t u64, svfloat64_t f64)
+{
+  svadrh_index (u32); /* { dg-error {too few arguments to function 'svadrh_index'} } */
+  svadrh_index (u32, u32, u32); /* { dg-error {too many arguments to function 'svadrh_index'} } */
+  svadrh_index (u32_ptr, s32); /* { dg-error {passing '[^']*\*'[^\n]* to argument 1 of 'svadrh_index', which expects an SVE vector type} } */
+  svadrh_index (0, s32); /* { dg-error {passing 'int' to argument 1 of 'svadrh_index', which expects an SVE vector type} } */
+  svadrh_index (u16, u16); /* { dg-error {passing 'svuint16_t' to argument 1 of 'svadrh_index', which expects 'svuint32_t' or 'svuint64_t'} } */
+  svadrh_index (s32, s32); /* { dg-error {passing 'svint32_t' to argument 1 of 'svadrh_index', which expects 'svuint32_t' or 'svuint64_t'} } */
+  svadrh_index (f32, s32); /* { dg-error {passing 'svfloat32_t' to argument 1 of 'svadrh_index', which expects 'svuint32_t' or 'svuint64_t'} } */
+  svadrh_index (pg, s32); /* { dg-error {passing 'svbool_t' to argument 1 of 'svadrh_index', which expects 'svuint32_t' or 'svuint64_t'} } */
+
+  svadrh_index (u32, 0); /* { dg-error {passing 'int' to argument 2 of 'svadrh_index', which expects an SVE vector type} } */
+  svadrh_index (u32, u8); /* { dg-error {passing 'svuint8_t' to argument 2 of 'svadrh_index', which expects a vector of 32-bit or 64-bit integers} } */
+  svadrh_index (u32, u16); /* { dg-error {passing 'svuint16_t' to argument 2 of 'svadrh_index', which expects a vector of 32-bit or 64-bit integers} } */
+  svadrh_index (u32, pg); /* { dg-error {passing 'svbool_t' to argument 2 of 'svadrh_index', which expects a vector of integers} } */
+
+  svadrh_index (u32, s32);
+  svadrh_index (u32, u32);
+  svadrh_index (u32, f32); /* { dg-error {passing 'svfloat32_t' to argument 2 of 'svadrh_index', which expects a vector of integers} } */
+  svadrh_index (u32, s64); /* { dg-error {cannot combine a base of type 'svuint32_t' with an index of type 'svint64_t'} } */
+  svadrh_index (u32, u64); /* { dg-error {cannot combine a base of type 'svuint32_t' with an index of type 'svuint64_t'} } */
+  svadrh_index (u32, f64); /* { dg-error {passing 'svfloat64_t' to argument 2 of 'svadrh_index', which expects a vector of integers} } */
+
+  svadrh_index (u64, s32); /* { dg-error {cannot combine a base of type 'svuint64_t' with an index of type 'svint32_t'} } */
+  svadrh_index (u64, u32); /* { dg-error {cannot combine a base of type 'svuint64_t' with an index of type 'svuint32_t'} } */
+  svadrh_index (u64, f32); /* { dg-error {passing 'svfloat32_t' to argument 2 of 'svadrh_index', which expects a vector of integers} } */
+  svadrh_index (u64, s64);
+  svadrh_index (u64, u64);
+  svadrh_index (u64, f64); /* { dg-error {passing 'svfloat64_t' to argument 2 of 'svadrh_index', which expects a vector of integers} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/adr_offset_1.c

+/* { dg-do compile } */
+/* { dg-options "-std=c99" } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, uint32_t *u32_ptr, svuint8_t u8, svuint16_t u16,
+    svint32_t s32, svuint32_t u32, svfloat32_t f32,
+    svint64_t s64, svuint64_t u64, svfloat64_t f64)
+{
+  svadrb_offset (u32); /* { dg-error {too few arguments to function 'svadrb_offset'} } */
+  svadrb_offset (u32, u32, u32); /* { dg-error {too many arguments to function 'svadrb_offset'} } */
+  svadrb_offset (u32_ptr, s32); /* { dg-error {passing '[^']*\*'[^\n]* to argument 1 of 'svadrb_offset', which expects an SVE vector type} } */
+  svadrb_offset (0, s32); /* { dg-error {passing 'int' to argument 1 of 'svadrb_offset', which expects an SVE vector type} } */
+  svadrb_offset (u16, u16); /* { dg-error {passing 'svuint16_t' to argument 1 of 'svadrb_offset', which expects 'svuint32_t' or 'svuint64_t'} } */
+  svadrb_offset (s32, s32); /* { dg-error {passing 'svint32_t' to argument 1 of 'svadrb_offset', which expects 'svuint32_t' or 'svuint64_t'} } */
+  svadrb_offset (f32, s32); /* { dg-error {passing 'svfloat32_t' to argument 1 of 'svadrb_offset', which expects 'svuint32_t' or 'svuint64_t'} } */
+  svadrb_offset (pg, s32); /* { dg-error {passing 'svbool_t' to argument 1 of 'svadrb_offset', which expects 'svuint32_t' or 'svuint64_t'} } */
+
+  svadrb_offset (u32, 0); /* { dg-error {passing 'int' to argument 2 of 'svadrb_offset', which expects an SVE vector type} } */
+  svadrb_offset (u32, u8); /* { dg-error {passing 'svuint8_t' to argument 2 of 'svadrb_offset', which expects a vector of 32-bit or 64-bit integers} } */
+  svadrb_offset (u32, u16); /* { dg-error {passing 'svuint16_t' to argument 2 of 'svadrb_offset', which expects a vector of 32-bit or 64-bit integers} } */
+  svadrb_offset (u32, pg); /* { dg-error {passing 'svbool_t' to argument 2 of 'svadrb_offset', which expects a vector of integers} } */
+
+  svadrb_offset (u32, s32);
+  svadrb_offset (u32, u32);
+  svadrb_offset (u32, f32); /* { dg-error {passing 'svfloat32_t' to argument 2 of 'svadrb_offset', which expects a vector of integers} } */
+  svadrb_offset (u32, s64); /* { dg-error {cannot combine a base of type 'svuint32_t' with an offset of type 'svint64_t'} } */
+  svadrb_offset (u32, u64); /* { dg-error {cannot combine a base of type 'svuint32_t' with an offset of type 'svuint64_t'} } */
+  svadrb_offset (u32, f64); /* { dg-error {passing 'svfloat64_t' to argument 2 of 'svadrb_offset', which expects a vector of integers} } */
+
+  svadrb_offset (u64, s32); /* { dg-error {cannot combine a base of type 'svuint64_t' with an offset of type 'svint32_t'} } */
+  svadrb_offset (u64, u32); /* { dg-error {cannot combine a base of type 'svuint64_t' with an offset of type 'svuint32_t'} } */
+  svadrb_offset (u64, f32); /* { dg-error {passing 'svfloat32_t' to argument 2 of 'svadrb_offset', which expects a vector of integers} } */
+  svadrb_offset (u64, s64);
+  svadrb_offset (u64, u64);
+  svadrb_offset (u64, f64); /* { dg-error {passing 'svfloat64_t' to argument 2 of 'svadrb_offset', which expects a vector of integers} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_1.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+svuint8_t
+f1 (svbool_t pg, svuint8_t u8, svint16_t s16)
+{
+  svzip1 (pg); /* { dg-error {too few arguments to function 'svzip1'} } */
+  svzip1 (pg, u8, u8); /* { dg-error {too many arguments to function 'svzip1'} } */
+  svzip1 (pg, u8); /* { dg-error {passing 'svuint8_t' to argument 2 of 'svzip1', but previous arguments had type 'svbool_t'} } */
+  svzip1 (u8, pg); /* { dg-error {passing 'svbool_t' to argument 2 of 'svzip1', but previous arguments had type 'svuint8_t'} } */
+  svzip1 (u8, s16); /* { dg-error {passing 'svint16_t' to argument 2 of 'svzip1', but previous arguments had type 'svuint8_t'} } */
+  svzip1 (u8, 0); /* { dg-error {passing 'int' to argument 2 of 'svzip1', which expects an SVE vector type} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_n.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, svfloat16_t f16, svint16_t s16, svuint16_t u16,
+    svfloat32_t f32, svint32_t s32, svuint32_t u32)
+{
+  svscale_x (pg, f16); /* { dg-error {too few arguments to function 'svscale_x'} } */
+  svscale_x (pg, f16, s16, s16); /* { dg-error {too many arguments to function 'svscale_x'} } */
+  svscale_x (s32, f16, s32); /* { dg-error {passing 'svint32_t' to argument 1 of 'svscale_x', which expects 'svbool_t'} } */
+  svscale_x (1, f16, s32); /* { dg-error {passing 'int' to argument 1 of 'svscale_x', which expects 'svbool_t'} } */
+  svscale_x (pg, pg, s16); /* { dg-error {'svscale_x' has no form that takes 'svbool_t' arguments} } */
+  svscale_x (pg, 1, s16); /* { dg-error {passing 'int' to argument 2 of 'svscale_x', which expects an SVE vector type} } */
+  svscale_x (pg, f16, s16);
+  svscale_x (pg, f16, u16); /* { dg-error {passing 'svuint16_t' to argument 3 of 'svscale_x', which expects a vector of signed integers} } */
+  svscale_x (pg, f16, f16); /* { dg-error {passing 'svfloat16_t' to argument 3 of 'svscale_x', which expects a vector of signed integers} } */
+  svscale_x (pg, f16, s32); /* { dg-error {arguments 2 and 3 of 'svscale_x' must have the same element size, but the values passed here have type 'svfloat16_t' and 'svint32_t' respectively} } */
+  svscale_x (pg, f16, u32); /* { dg-error {passing 'svuint32_t' to argument 3 of 'svscale_x', which expects a vector of signed integers} } */
+  svscale_x (pg, f16, f32); /* { dg-error {passing 'svfloat32_t' to argument 3 of 'svscale_x', which expects a vector of signed integers} } */
+  svscale_x (pg, f16, pg); /* { dg-error {passing 'svbool_t' to argument 3 of 'svscale_x', which expects a vector of signed integers} } */
+  svscale_x (pg, f16, 0);
+  svscale_x (pg, s16, s16); /* { dg-error {'svscale_x' has no form that takes 'svint16_t' arguments} } */
+  svscale_x (pg, s16, u16); /* { dg-error {passing 'svuint16_t' to argument 3 of 'svscale_x', which expects a vector of signed integers} } */
+  svscale_x (pg, s16, s32); /* { dg-error {'svscale_x' has no form that takes 'svint16_t' arguments} } */
+  svscale_x (pg, s16, u32); /* { dg-error {passing 'svuint32_t' to argument 3 of 'svscale_x', which expects a vector of signed integers} } */
+  svscale_x (pg, u16, s16); /* { dg-error {'svscale_x' has no form that takes 'svuint16_t' arguments} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_lane_1.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, svfloat16_t f16, svfloat32_t f32, svfloat64_t f64,
+    svint32_t s32, int i)
+{
+  svmul_lane (f32, f32); /* { dg-error {too few arguments to function 'svmul_lane'} } */
+  svmul_lane (f32, f32, 0, 0); /* { dg-error {too many arguments to function 'svmul_lane'} } */
+  svmul_lane (pg, pg, 0); /* { dg-error {'svmul_lane' has no form that takes 'svbool_t' arguments} } */
+  svmul_lane (s32, s32, 0); /* { dg-error {'svmul_lane' has no form that takes 'svint32_t' arguments} } */
+  svmul_lane (1, f32, 0); /* { dg-error {passing 'int' to argument 1 of 'svmul_lane', which expects an SVE vector type} } */
+  svmul_lane (f32, 1, 0); /* { dg-error {passing 'int' to argument 2 of 'svmul_lane', which expects an SVE vector type} } */
+  svmul_lane (f32, f64, 0); /* { dg-error {passing 'svfloat64_t' to argument 2 of 'svmul_lane', but previous arguments had type 'svfloat32_t'} } */
+  svmul_lane (f32, f32, s32); /* { dg-error {argument 3 of 'svmul_lane' must be an integer constant expression} } */
+  svmul_lane (f32, f32, i); /* { dg-error {argument 3 of 'svmul_lane' must be an integer constant expression} } */
+
+  svmul_lane (f16, f16, 0);
+  svmul_lane (f16, f16, 7);
+  svmul_lane (f16, f16, 8); /* { dg-error {passing 8 to argument 3 of 'svmul_lane', which expects a value in the range \[0, 7\]} } */
+  svmul_lane (f16, f16, -1); /* { dg-error {passing -1 to argument 3 of 'svmul_lane', which expects a value in the range \[0, 7\]} } */
+
+  svmul_lane (f32, f32, 0);
+  svmul_lane (f32, f32, 3);
+  svmul_lane (f32, f32, 4); /* { dg-error {passing 4 to argument 3 of 'svmul_lane', which expects a value in the range \[0, 3\]} } */
+  svmul_lane (f32, f32, -1); /* { dg-error {passing -1 to argument 3 of 'svmul_lane', which expects a value in the range \[0, 3\]} } */
+
+  svmul_lane (f64, f64, 0);
+  svmul_lane (f64, f64, 1);
+  svmul_lane (f64, f64, 2); /* { dg-error {passing 2 to argument 3 of 'svmul_lane', which expects a value in the range \[0, 1\]} } */
+  svmul_lane (f64, f64, -1); /* { dg-error {passing -1 to argument 3 of 'svmul_lane', which expects a value in the range \[0, 1\]} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_n_1.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, svuint8_t u8, svfloat16_t f16, int i, float f)
+{
+  svinsr (u8); /* { dg-error {too few arguments to function 'svinsr'} } */
+  svinsr (u8, 0, 0); /* { dg-error {too many arguments to function 'svinsr'} } */
+  svinsr (0, 0); /* { dg-error {passing 'int' to argument 1 of 'svinsr', which expects an SVE vector type} } */
+  svinsr (u8, 0);
+  svinsr (u8, -1);
+  svinsr (u8, i);
+  svinsr (u8, f);
+  svinsr (u8, u8); /* { dg-error {passing 'svuint8_t' to argument 2 of 'svinsr', which expects a scalar element} } */
+  svinsr (pg, 0); /* { dg-error {'svinsr' has no form that takes 'svbool_t' arguments} } */
+  svinsr (f16, f);
+  svinsr (f16, f16); /* { dg-error {passing 'svfloat16_t' to argument 2 of 'svinsr', which expects a scalar element} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_n_1.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+svuint8_t
+f1 (svbool_t pg, svuint8_t u8, svint8_t s8)
+{
+  svadd_u8_x (pg, u8, s8); /* { dg-error {incompatible type for argument 3 of 'svadd_u8_x'} } */
+  svadd_u8_x (pg, u8); /* { dg-error {too few arguments to function 'svadd_u8_x'} } */
+  svadd_u8_x (pg, u8, u8, u8); /* { dg-error {too many arguments to function 'svadd_u8_x'} } */
+  return svadd_s8_x (pg, s8, s8); /* { dg-error {incompatible types when returning type 'svint8_t' but 'svuint8_t' was expected} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_n_2.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, svint8_t s8, svuint8_t u8,
+    svint16_t s16, svuint16_t u16, svfloat16_t f16)
+{
+  svadd_x (pg, u8); /* { dg-error {too few arguments to function 'svadd_x'} } */
+  svadd_x (pg, u8, u8, u8); /* { dg-error {too many arguments to function 'svadd_x'} } */
+  svadd_x (u8, u8, u8); /* { dg-error {passing 'svuint8_t' to argument 1 of 'svadd_x', which expects 'svbool_t'} } */
+  svadd_x (pg, pg, pg); /* { dg-error {'svadd_x' has no form that takes 'svbool_t' arguments} } */
+  svadd_x (pg, 1, u8); /* { dg-error {passing 'int' to argument 2 of 'svadd_x', which expects an SVE vector type} } */
+  svadd_x (pg, u8, s8); /* { dg-error {passing 'svint8_t' to argument 3 of 'svadd_x', but previous arguments had type 'svuint8_t'} } */
+  svadd_x (pg, u8, u8);
+  svadd_x (pg, u8, s16); /* { dg-error {passing 'svint16_t' to argument 3 of 'svadd_x', but previous arguments had type 'svuint8_t'} } */
+  svadd_x (pg, u8, u16); /* { dg-error {passing 'svuint16_t' to argument 3 of 'svadd_x', but previous arguments had type 'svuint8_t'} } */
+  svadd_x (pg, u8, f16); /* { dg-error {passing 'svfloat16_t' to argument 3 of 'svadd_x', but previous arguments had type 'svuint8_t'} } */
+  svadd_x (pg, u8, pg); /* { dg-error {passing 'svbool_t' to argument 3 of 'svadd_x', but previous arguments had type 'svuint8_t'} } */
+  svadd_x (pg, u8, 0);
+
+  svadd_x (pg, f16, s16); /* { dg-error {passing 'svint16_t' to argument 3 of 'svadd_x', but previous arguments had type 'svfloat16_t'} } */
+  svadd_x (pg, f16, u16); /* { dg-error {passing 'svuint16_t' to argument 3 of 'svadd_x', but previous arguments had type 'svfloat16_t'} } */
+  svadd_x (pg, f16, f16);
+  svadd_x (pg, f16, 1);
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_n_3.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, svint8_t s8, svuint8_t u8,
+    svint16_t s16, svuint16_t u16, svfloat16_t f16)
+{
+  svand_z (pg, u8); /* { dg-error {too few arguments to function 'svand_z'} } */
+  svand_z (pg, u8, u8, u8); /* { dg-error {too many arguments to function 'svand_z'} } */
+  svand_z (u8, u8, u8); /* { dg-error {passing 'svuint8_t' to argument 1 of 'svand_z', which expects 'svbool_t'} } */
+  svand_z (pg, pg, pg);
+  svand_z (pg, 1, u8); /* { dg-error {passing 'int' to argument 2 of 'svand_z', which expects an SVE vector type} } */
+  svand_z (pg, u8, s8); /* { dg-error {passing 'svint8_t' to argument 3 of 'svand_z', but previous arguments had type 'svuint8_t'} } */
+  svand_z (pg, u8, u8);
+  svand_z (pg, u8, s16); /* { dg-error {passing 'svint16_t' to argument 3 of 'svand_z', but previous arguments had type 'svuint8_t'} } */
+  svand_z (pg, u8, u16); /* { dg-error {passing 'svuint16_t' to argument 3 of 'svand_z', but previous arguments had type 'svuint8_t'} } */
+  svand_z (pg, u8, f16); /* { dg-error {passing 'svfloat16_t' to argument 3 of 'svand_z', but previous arguments had type 'svuint8_t'} } */
+  svand_z (pg, u8, pg); /* { dg-error {passing 'svbool_t' to argument 3 of 'svand_z', but previous arguments had type 'svuint8_t'} } */
+  svand_z (pg, u8, 0);
+
+  svand_z (pg, pg, u8); /* { dg-error {passing 'svuint8_t' to argument 3 of 'svand_z', but previous arguments had type 'svbool_t'} } */
+  svand_z (pg, pg, 0); /* { dg-error {passing 'int' to argument 3 of 'svand_z', but its 'svbool_t' form does not accept scalars} } */
+
+  svand_z (pg, f16, s16); /* { dg-error {passing 'svint16_t' to argument 3 of 'svand_z', but previous arguments had type 'svfloat16_t'} } */
+  svand_z (pg, f16, u16); /* { dg-error {passing 'svuint16_t' to argument 3 of 'svand_z', but previous arguments had type 'svfloat16_t'} } */
+  svand_z (pg, f16, f16); /* { dg-error {'svand_z' has no form that takes 'svfloat16_t' arguments} } */
+  svand_z (pg, f16, 1); /* { dg-error {'svand_z' has no form that takes 'svfloat16_t' arguments} } */
+}

gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_rotate_1.c

+/* { dg-do compile } */
+
+#include <arm_sve.h>
+
+void
+f1 (svbool_t pg, svfloat32_t f32, svfloat64_t f64, svint32_t s32, int i)
+{
+  svcadd_x (pg, f32, f32); /* { dg-error {too few arguments to function 'svcadd_x'} } */
+  svcadd_x (pg, f32, f32, 90, 90); /* { dg-error {too many arguments to function 'svcadd_x'} } */
+  svcadd_x (f32, f32, f32, 90); /* { dg-error {passing 'svfloat32_t' to argument 1 of 'svcadd_x', which expects 'svbool_t'} } */
+  svcadd_x (pg, pg, pg, 90); /* { dg-error {'svcadd_x' has no form that takes 'svbool_t' arguments} } */
+  svcadd_x (pg, s32, s32, 90); /* { dg-error {'svcadd_x' has no form that takes 'svint32_t' arguments} } */
+  svcadd_x (pg, 1, f32, 90); /* { dg-error {passing 'int' to argument 2 of 'svcadd_x', which expects an SVE vector type} } */
+  svcadd_x (pg, f32, 1, 90); /* { dg-error {passing 'int' to argument 3 of 'svcadd_x', which expects an SVE vector type} } */
+  svcadd_x (pg, f32, f64, 90); /* { dg-error {passing 'svfloat64_t' to argument 3 of 'svcadd_x', but previous arguments had type 'svfloat32_t'} } */
+  svcadd_x (pg, f32, f32, s32); /* { dg-error {argument 4 of 'svcadd_x' must be an integer constant expression} } */
+  svcadd_x (pg, f32, f32, i); /* { dg-error {argument 4 of 'svcadd_x' must be an integer constant expression} } */
+  svcadd_x (pg, f32, f32, -90); /* { dg-error {passing -90 to argument 4 of 'svcadd_x', which expects either 90 or 270} } */
+  svcadd_x (pg, f32, f32, 0); /* { dg-error {passing 0 to argument 4 of 'svcadd_x', which expects either 90 or 270} } */
+  svcadd_x (pg, f32, f32, 1); /* { dg-error {passing 1 to argument 4 of 'svcadd_x', which expects either 90 or 270} } */
+  svcadd_x (pg, f32, f32, 90);
+  svcadd_x (pg, f32, f32, 180); /* { dg-error {passing 180 to argument 4 of 'svcadd_x', which expects either 90 or 270} } */
+  svcadd_x (pg, f32, f32, 270);
+}