Commit 49bd1d27 by Stan Shebs Committed by Stan Shebs

Basic support for 64-bit Darwin.

        * config/darwin.c (macho_indirect_data_reference): Add DImode case.
        (machopic_legitimize_pic_address): Similarly, plus use Pmode
        instead of SImode.
        * config/rs6000/darwin.h (PTRDIFF_TYPE): Be "long int" if 64-bit.
        (TARGET_OS_CPP_BUILTINS): Add 64-bit preprocessor macro.
        (SUBTARGET_SWITCHES): Add -m32 and -m64 flags.
        (SUBTARGET_OVERRIDE_OPTIONS): Require 64-bit processor if -m64.
        (PROCESSOR_DEFAULT64): Define.
        * config/rs6000/darwin.md: New file, patterns specific to 64-bit
        Darwin.
        * config/rs6000/rs6000.md: Include darwin.md.
        (builtin_setjmp_receiver): Add DImode case.
        * config/rs6000/rs6000.c (TARGET_ASM_UNALIGNED_DI_OP): Define for
        Darwin.
        (TARGET_ASM_ALIGNED_DI_OP): Ditto.
        (rs6000_emit_move): Add DImode case to Darwin bits.
        (machopic_output_stub): Use .quad if 64-bit.
        * invoke.texi: Document -m32 and -m64.

From-SVN: r86070
parent dcb9bd6b
2004-08-16 Stan Shebs <shebs@apple.com>
Basic support for 64-bit Darwin.
* config/darwin.c (macho_indirect_data_reference): Add DImode case.
(machopic_legitimize_pic_address): Similarly, plus use Pmode
instead of SImode.
* config/rs6000/darwin.h (PTRDIFF_TYPE): Be "long int" if 64-bit.
(TARGET_OS_CPP_BUILTINS): Add 64-bit preprocessor macro.
(SUBTARGET_SWITCHES): Add -m32 and -m64 flags.
(SUBTARGET_OVERRIDE_OPTIONS): Require 64-bit processor if -m64.
(PROCESSOR_DEFAULT64): Define.
* config/rs6000/darwin.md: New file, patterns specific to 64-bit
Darwin.
* config/rs6000/rs6000.md: Include darwin.md.
(builtin_setjmp_receiver): Add DImode case.
* config/rs6000/rs6000.c (TARGET_ASM_UNALIGNED_DI_OP): Define for
Darwin.
(TARGET_ASM_ALIGNED_DI_OP): Ditto.
(rs6000_emit_move): Add DImode case to Darwin bits.
(machopic_output_stub): Use .quad if 64-bit.
* invoke.texi: Document -m32 and -m64.
2004-08-16 Janis Johnson <janis187@us.ibm.com>
* doc/extend.texi (AltiVec builtins): Document additional differences
......
......@@ -333,8 +333,12 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
if (defined && MACHO_DYNAMIC_NO_PIC_P)
{
#if defined (TARGET_TOC)
emit_insn (gen_macho_high (reg, orig));
emit_insn (gen_macho_low (reg, reg, orig));
emit_insn (GET_MODE (orig) == DImode
? gen_macho_high_di (reg, orig)
: gen_macho_high (reg, orig));
emit_insn (GET_MODE (orig) == DImode
? gen_macho_low_di (reg, reg, orig)
: gen_macho_low (reg, reg, orig));
#else
/* some other cpu -- writeme! */
abort ();
......@@ -529,7 +533,9 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
rtx asym = XEXP (orig, 0);
rtx mem;
emit_insn (gen_macho_high (temp_reg, asym));
emit_insn (mode == DImode
? gen_macho_high_di (temp_reg, asym)
: gen_macho_high (temp_reg, asym));
mem = gen_rtx_MEM (GET_MODE (orig),
gen_rtx_LO_SUM (Pmode, temp_reg, asym));
RTX_UNCHANGING_P (mem) = 1;
......@@ -551,7 +557,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
#if defined (TARGET_TOC) /* i.e., PowerPC */
/* Generating a new reg may expose opportunities for
common subexpression elimination. */
rtx hi_sum_reg = no_new_pseudos ? reg : gen_reg_rtx (SImode);
rtx hi_sum_reg = no_new_pseudos ? reg : gen_reg_rtx (Pmode);
rtx mem;
rtx insn;
rtx sum;
......@@ -634,7 +640,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
if (reload_in_progress)
abort ();
else
reg = gen_reg_rtx (SImode);
reg = gen_reg_rtx (Pmode);
}
hi_sum_reg = reg;
......
......@@ -35,6 +35,10 @@
#define TARGET_TOC 0
#define TARGET_NO_TOC 1
/* Override the default rs6000 definition. */
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_64BIT ? "long int" : "int")
/* Darwin switches. */
/* Use dynamic-no-pic codegen (no picbase reg; not suitable for shlibs.) */
#define MASK_MACHO_DYNAMIC_NO_PIC 0x00800000
......@@ -48,7 +52,8 @@
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define ("__ppc__"); \
if (!TARGET_64BIT) builtin_define ("__ppc__"); \
if (TARGET_64BIT) builtin_define ("__ppc64__"); \
builtin_define ("__POWERPC__"); \
builtin_define ("__NATURAL_ALIGNMENT__"); \
builtin_define ("__MACH__"); \
......@@ -60,6 +65,10 @@
/* */
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{ "64", MASK_64BIT | MASK_POWERPC64, \
N_("Generate 64-bit code") }, \
{ "32", - (MASK_64BIT | MASK_POWERPC64), \
N_("Generate 32-bit code") }, \
{"dynamic-no-pic", MASK_MACHO_DYNAMIC_NO_PIC, \
N_("Generate code suitable for executables (NOT shared libs)")}, \
{"no-dynamic-no-pic", -MASK_MACHO_DYNAMIC_NO_PIC, ""},
......@@ -87,6 +96,11 @@ do { \
flag_pic = 2; \
} \
} \
if (TARGET_64BIT && ! TARGET_POWERPC64) \
{ \
target_flags |= MASK_POWERPC64; \
warning ("-m64 requires PowerPC64 architecture, enabling"); \
} \
} while(0)
/* Darwin has 128-bit long double support in libc in 10.4 and later.
......@@ -252,10 +266,12 @@ do { \
#define RS6000_MCOUNT "*mcount"
/* Default processor: a G4. */
/* Default processor: G4, and G5 for 64-bit. */
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_PPC7400
#undef PROCESSOR_DEFAULT64
#define PROCESSOR_DEFAULT64 PROCESSOR_POWER4
/* Default target flag settings. Despite the fact that STMW/LMW
serializes, it's still a big code size win to use them. Use FSEL by
......
......@@ -851,6 +851,10 @@ static const char alt_reg_names[][8] =
#define TARGET_ASM_UNALIGNED_HI_OP "\t.short\t"
#undef TARGET_ASM_UNALIGNED_SI_OP
#define TARGET_ASM_UNALIGNED_SI_OP "\t.long\t"
#undef TARGET_ASM_UNALIGNED_DI_OP
#define TARGET_ASM_UNALIGNED_DI_OP "\t.quad\t"
#undef TARGET_ASM_ALIGNED_DI_OP
#define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
#endif
#endif
......@@ -4310,8 +4314,16 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
return;
}
#endif
emit_insn (gen_macho_high (target, operands[1]));
emit_insn (gen_macho_low (operands[0], target, operands[1]));
if (mode == DImode)
{
emit_insn (gen_macho_high_di (target, operands[1]));
emit_insn (gen_macho_low_di (operands[0], target, operands[1]));
}
else
{
emit_insn (gen_macho_high (target, operands[1]));
emit_insn (gen_macho_low (operands[0], target, operands[1]));
}
return;
}
......@@ -16208,7 +16220,8 @@ machopic_output_stub (FILE *file, const char *symb, const char *stub)
machopic_lazy_symbol_ptr_section ();
fprintf (file, "%s:\n", lazy_ptr_name);
fprintf (file, "\t.indirect_symbol %s\n", symbol_name);
fprintf (file, "\t.long dyld_stub_binding_helper\n");
fprintf (file, "%sdyld_stub_binding_helper\n",
(TARGET_64BIT ? DOUBLE_INT_ASM_OP : "\t.long\t"));
}
/* Legitimize PIC addresses. If the address is already
......
......@@ -101,6 +101,7 @@
(include "8540.md")
(include "power4.md")
(include "power5.md")
(include "darwin.md")
;; Start with fixed-point load and store insns. Here we put only the more
......@@ -10158,8 +10159,12 @@
CODE_LABEL_NUMBER (operands[0]));
tmplabrtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (tmplab));
emit_insn (gen_load_macho_picbase (picreg, tmplabrtx));
emit_insn (gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
emit_insn (TARGET_64BIT
? gen_load_macho_picbase_di (picreg, tmplabrtx)
: gen_load_macho_picbase (picreg, tmplabrtx));
emit_insn (TARGET_64BIT
? gen_macho_correct_pic_di (picreg, picreg, picrtx, tmplabrtx)
: gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
}
else
#endif
......
......@@ -9974,6 +9974,17 @@ This switch enables or disables the generation of floating point
operations on the general purpose registers for architectures that
support it. This option is currently only available on the MPC8540.
@item -m32
@itemx -m64
@opindex m32
@opindex m64
Generate code for 32-bit or 64-bit environments of Darwin and SVR4
targets (including GNU/Linux). The 32-bit environment sets int, long
and pointer to 32 bits and generates code that runs on any PowerPC
variant. The 64-bit environment sets int to 32 bits and long and
pointer to 64 bits, and generates code for PowerPC64, as for
@option{-mpowerpc64}.
@item -mfull-toc
@itemx -mno-fp-in-toc
@itemx -mno-sum-in-toc
......
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