Skip to content

R
riscv-gcc-1
Commit 44e88db2 by Richard Sandiford Committed by Richard Sandiford
Options

mips.h: Use #elif in preprocessor conditions. 

gcc/
	* config/mips/mips.h: Use #elif in preprocessor conditions.

From-SVN: r199330
parent 3b859704
Showing with 38 additions and 53 deletions
gcc/ChangeLog
2013-05-25 Richard Sandiford <rdsandiford@googlemail.com> 2013-05-25 Richard Sandiford <rdsandiford@googlemail.com>
* config/mips/mips.h: Use #elif in preprocessor conditions.
2013-05-25 Richard Sandiford <rdsandiford@googlemail.com>
PR target/53916 PR target/53916
* config/mips/constraints.md (kl): New constraint. * config/mips/constraints.md (kl): New constraint.
* config/mips/mips.md (divmod<mode>4, udivmod<mode>4): Delete. * config/mips/mips.md (divmod<mode>4, udivmod<mode>4): Delete.
......
gcc/config/mips/mips.h
...@@ -614,39 +614,25 @@ struct mips_cpu_info { ...@@ -614,39 +614,25 @@ struct mips_cpu_info {
#endif #endif
#ifndef MULTILIB_ISA_DEFAULT #ifndef MULTILIB_ISA_DEFAULT
# if MIPS_ISA_DEFAULT == 1 #if MIPS_ISA_DEFAULT == 1
# define MULTILIB_ISA_DEFAULT "mips1" #define MULTILIB_ISA_DEFAULT "mips1"
# else #elif MIPS_ISA_DEFAULT == 2
# if MIPS_ISA_DEFAULT == 2 #define MULTILIB_ISA_DEFAULT "mips2"
# define MULTILIB_ISA_DEFAULT "mips2" #elif MIPS_ISA_DEFAULT == 3
# else #define MULTILIB_ISA_DEFAULT "mips3"
# if MIPS_ISA_DEFAULT == 3 #elif MIPS_ISA_DEFAULT == 4
# define MULTILIB_ISA_DEFAULT "mips3" #define MULTILIB_ISA_DEFAULT "mips4"
# else #elif MIPS_ISA_DEFAULT == 32
# if MIPS_ISA_DEFAULT == 4 #define MULTILIB_ISA_DEFAULT "mips32"
# define MULTILIB_ISA_DEFAULT "mips4" #elif MIPS_ISA_DEFAULT == 33
# else #define MULTILIB_ISA_DEFAULT "mips32r2"
# if MIPS_ISA_DEFAULT == 32 #elif MIPS_ISA_DEFAULT == 64
# define MULTILIB_ISA_DEFAULT "mips32" #define MULTILIB_ISA_DEFAULT "mips64"
# else #elif MIPS_ISA_DEFAULT == 65
# if MIPS_ISA_DEFAULT == 33 #define MULTILIB_ISA_DEFAULT "mips64r2"
# define MULTILIB_ISA_DEFAULT "mips32r2" #else
# else #define MULTILIB_ISA_DEFAULT "mips1"
# if MIPS_ISA_DEFAULT == 64 #endif
# define MULTILIB_ISA_DEFAULT "mips64"
# else
# if MIPS_ISA_DEFAULT == 65
# define MULTILIB_ISA_DEFAULT "mips64r2"
# else
# define MULTILIB_ISA_DEFAULT "mips1"
# endif
# endif
# endif
# endif
# endif
# endif
# endif
# endif
#endif #endif
#ifndef MIPS_ABI_DEFAULT #ifndef MIPS_ABI_DEFAULT
...@@ -657,21 +643,13 @@ struct mips_cpu_info { ...@@ -657,21 +643,13 @@ struct mips_cpu_info {
#if MIPS_ABI_DEFAULT == ABI_32 #if MIPS_ABI_DEFAULT == ABI_32
#define MULTILIB_ABI_DEFAULT "mabi=32" #define MULTILIB_ABI_DEFAULT "mabi=32"
#endif #elif MIPS_ABI_DEFAULT == ABI_O64
#if MIPS_ABI_DEFAULT == ABI_O64
#define MULTILIB_ABI_DEFAULT "mabi=o64" #define MULTILIB_ABI_DEFAULT "mabi=o64"
#endif #elif MIPS_ABI_DEFAULT == ABI_N32
#if MIPS_ABI_DEFAULT == ABI_N32
#define MULTILIB_ABI_DEFAULT "mabi=n32" #define MULTILIB_ABI_DEFAULT "mabi=n32"
#endif #elif MIPS_ABI_DEFAULT == ABI_64
#if MIPS_ABI_DEFAULT == ABI_64
#define MULTILIB_ABI_DEFAULT "mabi=64" #define MULTILIB_ABI_DEFAULT "mabi=64"
#endif #elif MIPS_ABI_DEFAULT == ABI_EABI
#if MIPS_ABI_DEFAULT == ABI_EABI
#define MULTILIB_ABI_DEFAULT "mabi=eabi" #define MULTILIB_ABI_DEFAULT "mabi=eabi"
#endif #endif
...@@ -743,9 +721,9 @@ struct mips_cpu_info { ...@@ -743,9 +721,9 @@ struct mips_cpu_info {
#define MIPS_ISA_SYNCI_SPEC \ #define MIPS_ISA_SYNCI_SPEC \
"%{msynci|mno-synci:;:%{mips32r2|mips64r2:-msynci;:-mno-synci}}" "%{msynci|mno-synci:;:%{mips32r2|mips64r2:-msynci;:-mno-synci}}"
#if MIPS_ABI_DEFAULT == ABI_O64 \ #if (MIPS_ABI_DEFAULT == ABI_O64 \
|| MIPS_ABI_DEFAULT == ABI_N32 \ || MIPS_ABI_DEFAULT == ABI_N32 \
|| MIPS_ABI_DEFAULT == ABI_64 || MIPS_ABI_DEFAULT == ABI_64)
#define OPT_ARCH64 "mabi=32|mgp32:;" #define OPT_ARCH64 "mabi=32|mgp32:;"
#define OPT_ARCH32 "mabi=32|mgp32" #define OPT_ARCH32 "mabi=32|mgp32"
#else #else
...@@ -839,6 +817,10 @@ struct mips_cpu_info { ...@@ -839,6 +817,10 @@ struct mips_cpu_info {
&& TARGET_OCTEON \ && TARGET_OCTEON \
&& !TARGET_MIPS16) && !TARGET_MIPS16)
#define ISA_HAS_DIV3 ((TARGET_LOONGSON_2EF \
|| TARGET_LOONGSON_3A) \
&& !TARGET_MIPS16)
/* ISA has the floating-point conditional move instructions introduced /* ISA has the floating-point conditional move instructions introduced
in mips4. */ in mips4. */
#define ISA_HAS_FP_CONDMOVE ((ISA_MIPS4 \ #define ISA_HAS_FP_CONDMOVE ((ISA_MIPS4 \
...@@ -1361,8 +1343,8 @@ struct mips_cpu_info { ...@@ -1361,8 +1343,8 @@ struct mips_cpu_info {
#define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE #define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE
#ifdef IN_LIBGCC2 #ifdef IN_LIBGCC2
#if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \ #if ((defined _ABIN32 && _MIPS_SIM == _ABIN32) \
|| (defined _ABI64 && _MIPS_SIM == _ABI64) || (defined _ABI64 && _MIPS_SIM == _ABI64))
# define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128 # define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
# else # else
# define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 # define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
...@@ -2868,9 +2850,8 @@ while (0) ...@@ -2868,9 +2850,8 @@ while (0)
jal " USER_LABEL_PREFIX #FUNC "\n\ jal " USER_LABEL_PREFIX #FUNC "\n\
.set pop\n\ .set pop\n\
" TEXT_SECTION_ASM_OP); " TEXT_SECTION_ASM_OP);
#endif /* Switch to #elif when we're no longer limited by K&R C. */ #elif ((defined _ABIN32 && _MIPS_SIM == _ABIN32) \
#if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \ || (defined _ABI64 && _MIPS_SIM == _ABI64))
|| (defined _ABI64 && _MIPS_SIM == _ABI64)
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
asm (SECTION_OP "\n\ asm (SECTION_OP "\n\
.set push\n\ .set push\n\
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment