Commit 44e88db2 by Richard Sandiford Committed by Richard Sandiford

mips.h: Use #elif in preprocessor conditions.

gcc/
	* config/mips/mips.h: Use #elif in preprocessor conditions.

From-SVN: r199330
parent 3b859704
2013-05-25 Richard Sandiford <rdsandiford@googlemail.com>
* config/mips/mips.h: Use #elif in preprocessor conditions.
2013-05-25 Richard Sandiford <rdsandiford@googlemail.com>
PR target/53916
* config/mips/constraints.md (kl): New constraint.
* config/mips/mips.md (divmod<mode>4, udivmod<mode>4): Delete.
......
......@@ -614,39 +614,25 @@ struct mips_cpu_info {
#endif
#ifndef MULTILIB_ISA_DEFAULT
# if MIPS_ISA_DEFAULT == 1
# define MULTILIB_ISA_DEFAULT "mips1"
# else
# if MIPS_ISA_DEFAULT == 2
# define MULTILIB_ISA_DEFAULT "mips2"
# else
# if MIPS_ISA_DEFAULT == 3
# define MULTILIB_ISA_DEFAULT "mips3"
# else
# if MIPS_ISA_DEFAULT == 4
# define MULTILIB_ISA_DEFAULT "mips4"
# else
# if MIPS_ISA_DEFAULT == 32
# define MULTILIB_ISA_DEFAULT "mips32"
# else
# if MIPS_ISA_DEFAULT == 33
# define MULTILIB_ISA_DEFAULT "mips32r2"
# else
# if MIPS_ISA_DEFAULT == 64
# define MULTILIB_ISA_DEFAULT "mips64"
# else
# if MIPS_ISA_DEFAULT == 65
# define MULTILIB_ISA_DEFAULT "mips64r2"
# else
# define MULTILIB_ISA_DEFAULT "mips1"
# endif
# endif
# endif
# endif
# endif
# endif
# endif
# endif
#if MIPS_ISA_DEFAULT == 1
#define MULTILIB_ISA_DEFAULT "mips1"
#elif MIPS_ISA_DEFAULT == 2
#define MULTILIB_ISA_DEFAULT "mips2"
#elif MIPS_ISA_DEFAULT == 3
#define MULTILIB_ISA_DEFAULT "mips3"
#elif MIPS_ISA_DEFAULT == 4
#define MULTILIB_ISA_DEFAULT "mips4"
#elif MIPS_ISA_DEFAULT == 32
#define MULTILIB_ISA_DEFAULT "mips32"
#elif MIPS_ISA_DEFAULT == 33
#define MULTILIB_ISA_DEFAULT "mips32r2"
#elif MIPS_ISA_DEFAULT == 64
#define MULTILIB_ISA_DEFAULT "mips64"
#elif MIPS_ISA_DEFAULT == 65
#define MULTILIB_ISA_DEFAULT "mips64r2"
#else
#define MULTILIB_ISA_DEFAULT "mips1"
#endif
#endif
#ifndef MIPS_ABI_DEFAULT
......@@ -657,21 +643,13 @@ struct mips_cpu_info {
#if MIPS_ABI_DEFAULT == ABI_32
#define MULTILIB_ABI_DEFAULT "mabi=32"
#endif
#if MIPS_ABI_DEFAULT == ABI_O64
#elif MIPS_ABI_DEFAULT == ABI_O64
#define MULTILIB_ABI_DEFAULT "mabi=o64"
#endif
#if MIPS_ABI_DEFAULT == ABI_N32
#elif MIPS_ABI_DEFAULT == ABI_N32
#define MULTILIB_ABI_DEFAULT "mabi=n32"
#endif
#if MIPS_ABI_DEFAULT == ABI_64
#elif MIPS_ABI_DEFAULT == ABI_64
#define MULTILIB_ABI_DEFAULT "mabi=64"
#endif
#if MIPS_ABI_DEFAULT == ABI_EABI
#elif MIPS_ABI_DEFAULT == ABI_EABI
#define MULTILIB_ABI_DEFAULT "mabi=eabi"
#endif
......@@ -743,9 +721,9 @@ struct mips_cpu_info {
#define MIPS_ISA_SYNCI_SPEC \
"%{msynci|mno-synci:;:%{mips32r2|mips64r2:-msynci;:-mno-synci}}"
#if MIPS_ABI_DEFAULT == ABI_O64 \
|| MIPS_ABI_DEFAULT == ABI_N32 \
|| MIPS_ABI_DEFAULT == ABI_64
#if (MIPS_ABI_DEFAULT == ABI_O64 \
|| MIPS_ABI_DEFAULT == ABI_N32 \
|| MIPS_ABI_DEFAULT == ABI_64)
#define OPT_ARCH64 "mabi=32|mgp32:;"
#define OPT_ARCH32 "mabi=32|mgp32"
#else
......@@ -839,6 +817,10 @@ struct mips_cpu_info {
&& TARGET_OCTEON \
&& !TARGET_MIPS16)
#define ISA_HAS_DIV3 ((TARGET_LOONGSON_2EF \
|| TARGET_LOONGSON_3A) \
&& !TARGET_MIPS16)
/* ISA has the floating-point conditional move instructions introduced
in mips4. */
#define ISA_HAS_FP_CONDMOVE ((ISA_MIPS4 \
......@@ -1361,8 +1343,8 @@ struct mips_cpu_info {
#define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE
#ifdef IN_LIBGCC2
#if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
|| (defined _ABI64 && _MIPS_SIM == _ABI64)
#if ((defined _ABIN32 && _MIPS_SIM == _ABIN32) \
|| (defined _ABI64 && _MIPS_SIM == _ABI64))
# define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
# else
# define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
......@@ -2868,9 +2850,8 @@ while (0)
jal " USER_LABEL_PREFIX #FUNC "\n\
.set pop\n\
" TEXT_SECTION_ASM_OP);
#endif /* Switch to #elif when we're no longer limited by K&R C. */
#if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
|| (defined _ABI64 && _MIPS_SIM == _ABI64)
#elif ((defined _ABIN32 && _MIPS_SIM == _ABIN32) \
|| (defined _ABI64 && _MIPS_SIM == _ABI64))
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
asm (SECTION_OP "\n\
.set push\n\
......
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