i386.md (unnamed peephole2): Do not force memory operands of arith or logical…

i386.md (unnamed peephole2): Do not force memory operands of arith or logical instructions into registers...

	* config/i386/i386.md (unnamed peephole2): Do not force memory
	operands of arith or logical instructions into registers for
	non-TARGET_READ_MODIFY targets.

	(ffs_cmove): Change operand 0 predicate to register_operand.
	Change operand 1 predicate to nonimmediate_operand.
	(ffsdi2): Ditto.
	(*ffs_no_cmove): Change operand 0 predicate to register_operand.

From-SVN: r141213

MAINTAINERS

@@ -220,8 +220,8 @@ auto-vectorizer		Dorit Nuzman		dorit@il.ibm.com
 loop infrastructure	Zdenek Dvorak		ook@ucw.cz
 OpenMP			Jakub Jelinek		jakub@redhat.com
 
-Note that individuals who maintain parts of the compiler need approval to check
-in changes outside of the parts of the compiler they maintain.
+Note that individuals who maintain parts of the compiler need approval to
+check in changes outside of the parts of the compiler they maintain.
 
 			Non-Algorithmic Maintainers
 

gcc/config/i386/i386.md

@@ -15366,9 +15366,9 @@
 (define_expand "ffs_cmove"
   [(set (match_dup 2) (const_int -1))
    (parallel [(set (reg:CCZ FLAGS_REG)
-		   (compare:CCZ (match_operand:SI 1 "register_operand" "")
+		   (compare:CCZ (match_operand:SI 1 "nonimmediate_operand" "")
 				(const_int 0)))
-	      (set (match_operand:SI 0 "nonimmediate_operand" "")
+	      (set (match_operand:SI 0 "register_operand" "")
 		   (ctz:SI (match_dup 1)))])
    (set (match_dup 0) (if_then_else:SI
 			(eq (reg:CCZ FLAGS_REG) (const_int 0))
@@ -15380,7 +15380,7 @@
   "operands[2] = gen_reg_rtx (SImode);")
 
 (define_insn_and_split "*ffs_no_cmove"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=r")
+  [(set (match_operand:SI 0 "register_operand" "=r")
 	(ffs:SI (match_operand:SI 1 "nonimmediate_operand" "rm")))
    (clobber (match_scratch:SI 2 "=&q"))
    (clobber (reg:CC FLAGS_REG))]
@@ -15416,9 +15416,9 @@
 (define_expand "ffsdi2"
   [(set (match_dup 2) (const_int -1))
    (parallel [(set (reg:CCZ FLAGS_REG)
-		   (compare:CCZ (match_operand:DI 1 "register_operand" "")
+		   (compare:CCZ (match_operand:DI 1 "nonimmediate_operand" "")
 				(const_int 0)))
-	      (set (match_operand:DI 0 "nonimmediate_operand" "")
+	      (set (match_operand:DI 0 "register_operand" "")
 		   (ctz:DI (match_dup 1)))])
    (set (match_dup 0) (if_then_else:DI
 			(eq (reg:CCZ FLAGS_REG) (const_int 0))
@@ -20684,7 +20684,7 @@
                      [(match_dup 0)
                       (match_operand:SI 1 "memory_operand" "")]))
               (clobber (reg:CC FLAGS_REG))])]
-  "optimize_insn_for_speed_p ()"
+  "optimize_insn_for_speed_p () && ! TARGET_READ_MODIFY"
   [(set (match_dup 2) (match_dup 1))
    (parallel [(set (match_dup 0)
                    (match_op_dup 3 [(match_dup 0) (match_dup 2)]))

gcc/testsuite/ChangeLog

@@ -42,13 +42,13 @@
 	* gfortran.dg/reshape_order_4.f90:  Likewise.
 
 2008-10-15  Jan Sjodin  <jan.sjodin@amd.com>
-    	    Harsha Jagasia  <harsha.jagasia@amd.com>
+	    Harsha Jagasia  <harsha.jagasia@amd.com>
 
 	PR tree-optimization/37485
 	* gcc.dg/graphite/pr37485.c: New.
 
 2008-10-15  Sebastian Pop  <sebastian.pop@amd.com>
-    	    Harsha Jagasia  <harsha.jagasia@amd.com>
+	    Harsha Jagasia  <harsha.jagasia@amd.com>
 
 	PR tree-optimization/37828
 	* testsuite/gcc.dg/graphite/pr37828.c: New.
@@ -75,8 +75,8 @@
 
 2008-10-14  Douglas Gregor  <doug.gregor@gmail.com>
 
-       PR c++/37553
-       * g++.dg/ext/alias-canon2.C: New.
+	PR c++/37553
+	* g++.dg/ext/alias-canon2.C: New.
 
 2008-10-13  Jerry DeLisle  <jvdelisle@gcc.gnu.org