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riscv-gcc-1
Commit 37409796 by Nathan Sidwell Committed by Nathan Sidwell
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rs6000.c (rs6000_override_options): Use gcc_assert and gcc_unreachable as appropriate. 

	* config/rs6000/rs6000.c (rs6000_override_options): Use gcc_assert
	and gcc_unreachable as appropriate.
	(num_insns_constant, output_vec_const_move,
	build_mask64_2_operands, rs6000_output_dwarf_dtprel,
	rs6000_emit_set_const, rs6000_emit_move,
	spe_build_register_parallel, function_arg,
	rs6000_move_block_from_reg, altivec_expand_predicate_builtin,
	spe_expand_predicate_builtin, spe_expand_evsel_builtin,
	rs6000_expand_builtin, spe_init_builtins, altivec_init_builtins,
	rs6000_common_init_builtins, expand_block_clear,
	expand_block_move, validate_condition_mode, ccr_bit, extract_MB,
	extract_ME, rs6000_get_some_local_dynamic_name,
	rs6000_output_function_entry, print_operand,
	print_operand_address, rs6000_generate_compare, rs6000_emit_sCOND,
	output_cbranch, output_e500_flip_gt_bit,
	rs6000_emit_vector_compare, rs6000_emit_vector_compare,
	rs6000_emit_cmove, rs6000_emit_minmax, rs6000_split_multireg_move,
	compute_save_world_info, rs6000_stack_info,
	rs6000_emit_load_toc_table, rs6000_frame_related,
	spe_synthesize_frame_save, rs6000_emit_epilogue,
	rs6000_output_function_epilogue, rs6000_hash_constant, output_toc,
	output_function_profiler, rs6000_trampoline_size,
	rs6000_initialize_trampoline, find_addr_reg,
	rs6000_machopic_legitimize_pic_address,
	rs6000_initial_elimination_offset,
	rs6000_dbx_register_number): Likewise.
	* config/rs6000/rs6000.md (*fix_truncdfsi2_internal,
	*movdf_hardfloat32, *movdf_softfloat32, *fix_trunctfsi2_internal,
	*movti_power, *movti_string, call, call_value, sibcall,
	sibcall_value): Likewise.
	* config/rs6000/spe.md (*movdf_e500_double,
	*movv2si_internal): Likewise.
	* config/rs6000/rs6000.h (PREFERRED_RELOAD_CLASS): Remove 'abort'
	from comment.

From-SVN: r98658
parent ea8261fb
Showing with 76 additions and 37 deletions
gcc/ChangeLog
2005-04-24 Nathan Sidwell <nathan@codesourcery.com>
* config/rs6000/rs6000.c (rs6000_override_options): Use gcc_assert
and gcc_unreachable as appropriate.
(num_insns_constant, output_vec_const_move,
build_mask64_2_operands, rs6000_output_dwarf_dtprel,
rs6000_emit_set_const, rs6000_emit_move,
spe_build_register_parallel, function_arg,
rs6000_move_block_from_reg, altivec_expand_predicate_builtin,
spe_expand_predicate_builtin, spe_expand_evsel_builtin,
rs6000_expand_builtin, spe_init_builtins, altivec_init_builtins,
rs6000_common_init_builtins, expand_block_clear,
expand_block_move, validate_condition_mode, ccr_bit, extract_MB,
extract_ME, rs6000_get_some_local_dynamic_name,
rs6000_output_function_entry, print_operand,
print_operand_address, rs6000_generate_compare, rs6000_emit_sCOND,
output_cbranch, output_e500_flip_gt_bit,
rs6000_emit_vector_compare, rs6000_emit_vector_compare,
rs6000_emit_cmove, rs6000_emit_minmax, rs6000_split_multireg_move,
compute_save_world_info, rs6000_stack_info,
rs6000_emit_load_toc_table, rs6000_frame_related,
spe_synthesize_frame_save, rs6000_emit_epilogue,
rs6000_output_function_epilogue, rs6000_hash_constant, output_toc,
output_function_profiler, rs6000_trampoline_size,
rs6000_initialize_trampoline, find_addr_reg,
rs6000_machopic_legitimize_pic_address,
rs6000_initial_elimination_offset,
rs6000_dbx_register_number): Likewise.
* config/rs6000/rs6000.md (*fix_truncdfsi2_internal,
*movdf_hardfloat32, *movdf_softfloat32, *fix_trunctfsi2_internal,
*movti_power, *movti_string, call, call_value, sibcall,
sibcall_value): Likewise.
* config/rs6000/spe.md (*movdf_e500_double,
*movv2si_internal): Likewise.
* config/rs6000/rs6000.h (PREFERRED_RELOAD_CLASS): Remove 'abort'
from comment.
2005-04-24 Richard Henderson <rth@redhat.com>
PR target/21101
......
gcc/config/rs6000/rs6000.h
......@@ -1393,7 +1393,7 @@ enum reg_class
We also don't want to reload integer values into floating-point
registers if we can at all help it. In fact, this can
cause reload to abort, if it tries to generate a reload of CTR
cause reload to die, if it tries to generate a reload of CTR
into a FP register and discovers it doesn't have the memory location
required.
......
gcc/config/rs6000/rs6000.md
......@@ -5194,8 +5194,7 @@
"
{
rtx lowword, highword;
if (GET_CODE (operands[4]) != MEM)
abort();
gcc_assert (GET_CODE (operands[4]) == MEM);
highword = XEXP (operands[4], 0);
lowword = plus_constant (highword, 4);
if (! WORDS_BIG_ENDIAN)
......@@ -5278,8 +5277,7 @@
"
{
rtx lowword, highword;
if (GET_CODE (operands[4]) != MEM)
abort();
gcc_assert (GET_CODE (operands[4]) == MEM);
highword = XEXP (operands[4], 0);
lowword = plus_constant (highword, 4);
if (! WORDS_BIG_ENDIAN)
......@@ -5338,8 +5336,7 @@
"
{
rtx lowword;
if (GET_CODE (operands[3]) != MEM)
abort();
gcc_assert (GET_CODE (operands[3]) == MEM);
lowword = XEXP (operands[3], 0);
if (WORDS_BIG_ENDIAN)
lowword = plus_constant (lowword, 4);
......@@ -8149,7 +8146,7 @@
switch (which_alternative)
{
default:
abort ();
gcc_unreachable ();
case 0:
/* We normally copy the low-numbered register first. However, if
the first register operand 0 is the same as the second register
......@@ -8246,7 +8243,7 @@
switch (which_alternative)
{
default:
abort ();
gcc_unreachable ();
case 0:
/* We normally copy the low-numbered register first. However, if
the first register operand 0 is the same as the second register of
......@@ -8485,8 +8482,7 @@
rtx lowword;
emit_insn (gen_fix_trunc_helper (operands[2], operands[1], operands[3]));
if (GET_CODE (operands[5]) != MEM)
abort();
gcc_assert (GET_CODE (operands[5]) == MEM);
lowword = XEXP (operands[5], 0);
if (WORDS_BIG_ENDIAN)
lowword = plus_constant (lowword, 4);
......@@ -8738,7 +8734,7 @@
switch (which_alternative)
{
default:
abort ();
gcc_unreachable ();
case 0:
if (TARGET_STRING)
......@@ -8770,7 +8766,7 @@
switch (which_alternative)
{
default:
abort ();
gcc_unreachable ();
case 0:
if (TARGET_STRING)
return \"{stsi|stswi} %1,%P0,16\";
......@@ -10332,8 +10328,8 @@
operands[0] = machopic_indirect_call_target (operands[0]);
#endif
if (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != CONST_INT)
abort ();
gcc_assert (GET_CODE (operands[0]) == MEM);
gcc_assert (GET_CODE (operands[1]) == CONST_INT);
operands[0] = XEXP (operands[0], 0);
......@@ -10344,12 +10340,14 @@
if (INTVAL (operands[2]) & CALL_LONG)
operands[0] = rs6000_longcall_ref (operands[0]);
if (DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN)
operands[0] = force_reg (Pmode, operands[0]);
switch (DEFAULT_ABI)
{
case ABI_V4:
case ABI_DARWIN:
operands[0] = force_reg (Pmode, operands[0]);
break;
else if (DEFAULT_ABI == ABI_AIX)
{
case ABI_AIX:
/* AIX function pointers are really pointers to a three word
area. */
emit_call_insn (TARGET_32BIT
......@@ -10360,9 +10358,10 @@
operands[0]),
operands[1]));
DONE;
default:
gcc_unreachable ();
}
else
abort ();
}
}")
......@@ -10380,8 +10379,8 @@
operands[1] = machopic_indirect_call_target (operands[1]);
#endif
if (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != CONST_INT)
abort ();
gcc_assert (GET_CODE (operands[1]) == MEM);
gcc_assert (GET_CODE (operands[2]) == CONST_INT);
operands[1] = XEXP (operands[1], 0);
......@@ -10392,12 +10391,14 @@
if (INTVAL (operands[3]) & CALL_LONG)
operands[1] = rs6000_longcall_ref (operands[1]);
if (DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN)
operands[1] = force_reg (Pmode, operands[1]);
switch (DEFAULT_ABI)
{
case ABI_V4:
case ABI_DARWIN:
operands[1] = force_reg (Pmode, operands[1]);
break;
else if (DEFAULT_ABI == ABI_AIX)
{
case ABI_AIX:
/* AIX function pointers are really pointers to a three word
area. */
emit_call_insn (TARGET_32BIT
......@@ -10410,9 +10411,10 @@
operands[1]),
operands[2]));
DONE;
default:
gcc_unreachable ();
}
else
abort ();
}
}")
......@@ -10749,8 +10751,8 @@
operands[0] = machopic_indirect_call_target (operands[0]);
#endif
if (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != CONST_INT)
abort ();
gcc_assert (GET_CODE (operands[0]) == MEM);
gcc_assert (GET_CODE (operands[1]) == CONST_INT);
operands[0] = XEXP (operands[0], 0);
operands[3] = gen_reg_rtx (SImode);
......@@ -10935,8 +10937,8 @@
operands[1] = machopic_indirect_call_target (operands[1]);
#endif
if (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != CONST_INT)
abort ();
gcc_assert (GET_CODE (operands[1]) == MEM);
gcc_assert (GET_CODE (operands[2]) == CONST_INT);
operands[1] = XEXP (operands[1], 0);
operands[4] = gen_reg_rtx (SImode);
......
gcc/config/rs6000/spe.md
......@@ -2247,7 +2247,7 @@
case 2:
return \"evstdd%X0 %1,%y0\";
default:
abort ();
gcc_unreachable ();
}
}"
[(set_attr "type" "*,vecload,vecstore")
......@@ -2327,7 +2327,7 @@
case 1: return \"evldd%X1 %0,%y1\";
case 2: return \"evor %0,%1,%1\";
case 3: return output_vec_const_move (operands);
default: abort ();
default: gcc_unreachable ();
}
}"
[(set_attr "type" "vecload,vecstore,*,*")
......
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