Commit 17ec4b79 by Andreas Krebbel Committed by Andreas Krebbel

S/390: Fix vmslg instruction and builtin.

gcc/ChangeLog:

2017-09-26  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/vx-builtins.md ("vmslg"): Add missing operand in
	assembler output.
	* config/s390/s390-builtins.def: Fix constraint on op4.

From-SVN: r253198
parent 0c9ce4e6
2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com> 2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vx-builtins.md ("vmslg"): Add missing operand in
assembler output.
* config/s390/s390-builtins.def: Fix constraint on op4.
2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_compare): Use the new mode * config/s390/s390.c (s390_expand_vec_compare): Use the new mode
independent expanders. independent expanders.
* config/s390/vector.md ("vec_cmpuneq", "vec_cmpltgt") * config/s390/vector.md ("vec_cmpuneq", "vec_cmpltgt")
...@@ -2271,7 +2271,7 @@ OB_DEF_VAR (s390_vec_test_mask_dbl, s390_vtm, 0, ...@@ -2271,7 +2271,7 @@ OB_DEF_VAR (s390_vec_test_mask_dbl, s390_vtm, 0,
B_DEF (s390_vtm, vec_test_mask_intv16qi,0, B_VX, 0, BT_FN_INT_UV16QI_UV16QI) B_DEF (s390_vtm, vec_test_mask_intv16qi,0, B_VX, 0, BT_FN_INT_UV16QI_UV16QI)
B_DEF (s390_vec_msum_u128, vec_msumv2di, 0, B_VXE, O4_U2, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT) B_DEF (s390_vec_msum_u128, vec_msumv2di, 0, B_VXE, O4_U2, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT)
B_DEF (s390_vmslg, vmslg, 0, B_VXE, O4_U2, BT_FN_INT128_UV2DI_UV2DI_INT128_INT) B_DEF (s390_vmslg, vmslg, 0, B_VXE, O4_U4, BT_FN_INT128_UV2DI_UV2DI_INT128_INT)
OB_DEF (s390_vec_eqv, s390_vec_eqv_b8, s390_vec_eqv_dbl_c, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF (s390_vec_eqv, s390_vec_eqv_b8, s390_vec_eqv_dbl_c, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_eqv_b8, s390_vnx, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) OB_DEF_VAR (s390_vec_eqv_b8, s390_vnx, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI)
......
...@@ -1190,7 +1190,7 @@ ...@@ -1190,7 +1190,7 @@
(match_operand:QI 4 "const_mask_operand" "C")] (match_operand:QI 4 "const_mask_operand" "C")]
UNSPEC_VEC_MSUM))] UNSPEC_VEC_MSUM))]
"TARGET_VXE" "TARGET_VXE"
"vmslg\t%v0,%v1,%v2,%v3" "vmslg\t%v0,%v1,%v2,%v3,%4"
[(set_attr "op_type" "VRR")]) [(set_attr "op_type" "VRR")])
(define_insn "vmslg" (define_insn "vmslg"
...@@ -1201,7 +1201,7 @@ ...@@ -1201,7 +1201,7 @@
(match_operand:QI 4 "const_mask_operand" "C")] (match_operand:QI 4 "const_mask_operand" "C")]
UNSPEC_VEC_MSUM))] UNSPEC_VEC_MSUM))]
"TARGET_VXE" "TARGET_VXE"
"vmslg\t%v0,%v1,%v2,%v3" "vmslg\t%v0,%v1,%v2,%v3,%4"
[(set_attr "op_type" "VRR")]) [(set_attr "op_type" "VRR")])
......
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