Commits · 5aa3025ce7264a172a070a78d7b7db0cd1fca3f0 · lvzhengyang / abc · GitLab

21 Nov, 2018 2 commits
- Adding switch &w -n to modify the comment section of the AIGER file written. · 5aa3025c
  Alan Mishchenko committed 6 years ago
  
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- Adding an option to write new-line after the comment symbol when dumping an AIGER file. · f3c5bab5
  Alan Mishchenko committed 6 years ago
  
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16 Nov, 2018 1 commit
- Undoing some of the previous changes. · 33159929
  Alan Mishchenko committed 6 years ago
  
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12 Nov, 2018 1 commit
- Procedures to verify equivalence classes. · 8b310db5
  Alan Mishchenko committed 6 years ago
  
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04 Nov, 2018 1 commit
- Several recent bug fixes. · 4d56acfd
  Alan Mishchenko committed 6 years ago
  
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23 Oct, 2018 2 commits
- Fix timing info communication in GIA APIs. · 455e0bae
  Alan Mishchenko committed 6 years ago
  
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- Fix timing info communication in GIA APIs. · 2ef879e9
  Alan Mishchenko committed 6 years ago
  
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22 Oct, 2018 1 commit
- Fix timing info communication in GIA APIs. · 341e55ab
  Alan Mishchenko committed 6 years ago
  
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01 Oct, 2018 1 commit
- Experiments with word-level retiming. · 9e787c71
  Alan Mishchenko committed 6 years ago
  
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20 Sep, 2018 2 commits
- Preserving output names while deriving a miter. · c861635c
  Alan Mishchenko committed 6 years ago
  
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- Preserving names while deriving a miter. · 0dec03ba
  Alan Mishchenko committed 6 years ago
  
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23 Jul, 2018 1 commit
- Procedure to return seq equivalences. · 7732b9a2
  Alan Mishchenko committed 6 years ago
  
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15 Jun, 2018 1 commit
- Extending NDR to support adder/subtractor. · 15939511
  Alan Mishchenko committed 6 years ago
  
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12 Jun, 2018 1 commit
- Bug fix (accessing unassigned memory). · aa2f29fa
  Alan Mishchenko committed 6 years ago
  
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08 Jun, 2018 1 commit
- Compiler warnings. · dca22182
  Alan Mishchenko committed 6 years ago
  
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05 Jun, 2018 1 commit
- Supporting the decoder primitive in NDR and bit-blasting. · 867600b7
  Alan Mishchenko committed 6 years ago
  
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04 Jun, 2018 1 commit
- Disabling unused feature in &nf. · 044c7a07
  Alan Mishchenko committed 6 years ago
  
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24 May, 2018 1 commit
- Supporting NMUX and SEL in NDR. · 21c7dad7
  Alan Mishchenko committed 6 years ago
  
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04 May, 2018 1 commit
- Updates to NDR format (bug fixes). · aa313189
  Alan Mishchenko committed 6 years ago
  
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29 Apr, 2018 1 commit
- Updates to NDR format (flops, memories, signed mult, etc). · f23ea8e3
  Alan Mishchenko committed 6 years ago
  
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25 Apr, 2018 1 commit
- Adding switch &w -p to dump AIG in a Verilog file. · fa00219d
  Alan Mishchenko committed 6 years ago
  
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12 Apr, 2018 2 commits
- Adding adder-subtractor primitive. · 37504a49
  Alan Mishchenko committed 6 years ago
  
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- Making sure duplicated inverters are not created. · a8f913f7
  Alan Mishchenko committed 6 years ago
  
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26 Mar, 2018 1 commit
- Integrating SAT-based CEX minimization (bug fix). · a2d59be3
  Alan Mishchenko committed 6 years ago
  
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25 Mar, 2018 1 commit
- Integrating SAT-based CEX minimization. · e639e8fd
  Alan Mishchenko committed 6 years ago
  
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24 Mar, 2018 1 commit
- Updating &mfs to support hard objects. · a6d489e7
  Alan Mishchenko committed 6 years ago
  
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22 Mar, 2018 1 commit
- Adding switch 'scorr -f' to dump inductive invariant as an AIG. · 53e7d1f9
  Alan Mishchenko committed 6 years ago
  
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01 Mar, 2018 1 commit
- Adding parameters and improvements to %blast. · 7e9f3f02
  Alan Mishchenko committed 7 years ago
  
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24 Feb, 2018 1 commit
- Adding support for adders with carry-in in WLC and NDR. · 33971604
  Alan Mishchenko committed 7 years ago
  
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21 Feb, 2018 1 commit
- Improvements to circuit based solver. · b2055bd6
  Alan Mishchenko committed 7 years ago
  
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17 Feb, 2018 1 commit
- Improvements to circuit based solver. · 1d1b11cb
  Alan Mishchenko committed 7 years ago
  
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12 Feb, 2018 1 commit
- Extending MiniLUT to return attributes. · fd390aae
  Alan Mishchenko committed 7 years ago
  
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10 Feb, 2018 1 commit
- Experiments with LUT mapping. · f716948c
  Alan Mishchenko committed 7 years ago
  
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05 Feb, 2018 3 commits
- Improvements to NDR to represent hierarchical designs. · f8d9fc3a
  Alan Mishchenko committed 7 years ago
  
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- Improvements to NDR to represent hierarchical designs. · 28602ccf
  Alan Mishchenko committed 7 years ago
  
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- Improvements to NDR to represent hierarchical designs. · 3202c258
  Alan Mishchenko committed 7 years ago
  
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29 Jan, 2018 1 commit
- Adding support of reading and writing designs using a new internal format. · 99ddb640
  Alan Mishchenko committed 7 years ago
  
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28 Jan, 2018 1 commit
- Experiments with circuit-based SAT. · c8008383
  Alan Mishchenko committed 7 years ago
  
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27 Jan, 2018 2 commits
- Experiments with circuit-based SAT. · 20603c75
  Alan Mishchenko committed 7 years ago
  
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- Experiments with circuit-based SAT. · f826956b
  Alan Mishchenko committed 7 years ago
  
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