Commit ea98a249 by Alan Mishchenko

Fixing time primtouts throughout the code.

parent 4760983a
......@@ -23,6 +23,7 @@
#include "src/sat/cnf/cnf.h"
#include "src/sat/bsat/satSolver2.h"
#include "src/base/main/main.h"
#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
......@@ -187,7 +188,7 @@ Abc_Cex_t * Gia_ManCexRemap( Gia_Man_t * p, Abc_Cex_t * pCexAbs, Vec_Int_t * vPi
int Gia_ManGlaRefine( Gia_Man_t * p, Abc_Cex_t * pCex, int fMinCut, int fVerbose )
{
extern void Nwk_ManDeriveMinCut( Gia_Man_t * p, int fVerbose );
extern Abc_Cex_t * Saig_ManCbaFindCexCareBits( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInputs, int fVerbose );
// extern Abc_Cex_t * Saig_ManCbaFindCexCareBits( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInputs, int fVerbose );
int fAddOneLayer = 1;
Abc_Cex_t * pCexNew = NULL;
Gia_Man_t * pAbs;
......
......@@ -84,7 +84,7 @@ static int Ivy_FastMapNodeDeref( Ivy_Man_t * pAig, Ivy_Obj_t * pObj );
extern clock_t s_MappingTime;
extern clock_t s_MappingMem;
extern int s_MappingMem;
////////////////////////////////////////////////////////////////////////
......
......@@ -37,10 +37,10 @@ ABC_NAMESPACE_IMPL_START
//extern int s_TotalNodes = 0;
//extern int s_TotalChanges = 0;
int s_MappingTime = 0;
clock_t s_MappingTime = 0;
int s_MappingMem = 0;
int s_ResubTime = 0;
int s_ResynTime = 0;
clock_t s_ResubTime = 0;
clock_t s_ResynTime = 0;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......
......@@ -117,7 +117,7 @@ static Dec_Graph_t * Abc_ManResubDivs3( Abc_ManRes_t * p, int Required );
static Vec_Ptr_t * Abc_CutFactorLarge( Abc_Obj_t * pNode, int nLeavesMax );
static int Abc_CutVolumeCheck( Abc_Obj_t * pNode, Vec_Ptr_t * vLeaves );
extern int s_ResubTime;
extern clock_t s_ResubTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......
......@@ -684,8 +684,9 @@ char * Io_NtkDeriveSop( Mem_Flex_t * pMem, word uTruth, int nVars, Vec_Int_t * v
// check the case of constant cover
if ( Vec_IntSize(vCover) == 0 || (Vec_IntSize(vCover) == 1 && Vec_IntEntry(vCover,0) == 0) )
{
char * pStr0 = " 0\n", * pStr1 = " 1\n";
assert( RetValue == 0 );
return Vec_IntSize(vCover) == 0 ? " 0\n" : " 1\n";
return Vec_IntSize(vCover) == 0 ? pStr0 : pStr1;
}
// derive the AIG for that tree
pSop = Abc_SopCreateFromIsop( pMem, nVars, vCover );
......
......@@ -28,7 +28,7 @@ ABC_NAMESPACE_IMPL_START
static int Fpga_MappingPostProcess( Fpga_Man_t * p );
extern clock_t s_MappingTime;
extern clock_t s_MappingMem;
extern int s_MappingMem;
////////////////////////////////////////////////////////////////////////
......
......@@ -27,7 +27,7 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
extern int s_MappingTime;
extern clock_t s_MappingTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......
......@@ -27,7 +27,7 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
extern int s_MappingTime;
extern clock_t s_MappingTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......
......@@ -76,7 +76,7 @@ struct Res_Man_t_
extern Hop_Obj_t * Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph );
extern int s_ResynTime;
extern clock_t s_ResynTime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
......
......@@ -65,7 +65,7 @@ struct Llb_Mnn_t_
};
extern int timeBuild, timeAndEx, timeOther;
extern clock_t timeBuild, timeAndEx, timeOther;
extern int nSuppMax;
////////////////////////////////////////////////////////////////////////
......
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