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lvzhengyang
abc
Commits
ea98a249
Commit
ea98a249
authored
Jul 07, 2012
by
Alan Mishchenko
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Plain Diff
Fixing time primtouts throughout the code.
parent
4760983a
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10 changed files
with
14 additions
and
12 deletions
+14
-12
src/aig/gia/giaAbsGla.c
+2
-1
src/aig/ivy/ivyFastMap.c
+1
-1
src/base/abci/abcPrint.c
+3
-3
src/base/abci/abcResub.c
+1
-1
src/base/io/ioWriteBlif.c
+2
-1
src/map/fpga/fpgaCore.c
+1
-1
src/map/if/ifCore.c
+1
-1
src/map/if/ifSeq.c
+1
-1
src/opt/res/resCore.c
+1
-1
src/proof/llb/llb3Nonlin.c
+1
-1
No files found.
src/aig/gia/giaAbsGla.c
View file @
ea98a249
...
...
@@ -23,6 +23,7 @@
#include "src/sat/cnf/cnf.h"
#include "src/sat/bsat/satSolver2.h"
#include "src/base/main/main.h"
#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
...
...
@@ -187,7 +188,7 @@ Abc_Cex_t * Gia_ManCexRemap( Gia_Man_t * p, Abc_Cex_t * pCexAbs, Vec_Int_t * vPi
int
Gia_ManGlaRefine
(
Gia_Man_t
*
p
,
Abc_Cex_t
*
pCex
,
int
fMinCut
,
int
fVerbose
)
{
extern
void
Nwk_ManDeriveMinCut
(
Gia_Man_t
*
p
,
int
fVerbose
);
extern
Abc_Cex_t
*
Saig_ManCbaFindCexCareBits
(
Aig_Man_t
*
pAig
,
Abc_Cex_t
*
pCex
,
int
nInputs
,
int
fVerbose
);
//
extern Abc_Cex_t * Saig_ManCbaFindCexCareBits( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInputs, int fVerbose );
int
fAddOneLayer
=
1
;
Abc_Cex_t
*
pCexNew
=
NULL
;
Gia_Man_t
*
pAbs
;
...
...
src/aig/ivy/ivyFastMap.c
View file @
ea98a249
...
...
@@ -84,7 +84,7 @@ static int Ivy_FastMapNodeDeref( Ivy_Man_t * pAig, Ivy_Obj_t * pObj );
extern
clock_t
s_MappingTime
;
extern
clock_
t
s_MappingMem
;
extern
in
t
s_MappingMem
;
////////////////////////////////////////////////////////////////////////
...
...
src/base/abci/abcPrint.c
View file @
ea98a249
...
...
@@ -37,10 +37,10 @@ ABC_NAMESPACE_IMPL_START
//extern int s_TotalNodes = 0;
//extern int s_TotalChanges = 0;
in
t
s_MappingTime
=
0
;
clock_
t
s_MappingTime
=
0
;
int
s_MappingMem
=
0
;
in
t
s_ResubTime
=
0
;
in
t
s_ResynTime
=
0
;
clock_
t
s_ResubTime
=
0
;
clock_
t
s_ResynTime
=
0
;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
...
...
src/base/abci/abcResub.c
View file @
ea98a249
...
...
@@ -117,7 +117,7 @@ static Dec_Graph_t * Abc_ManResubDivs3( Abc_ManRes_t * p, int Required );
static
Vec_Ptr_t
*
Abc_CutFactorLarge
(
Abc_Obj_t
*
pNode
,
int
nLeavesMax
);
static
int
Abc_CutVolumeCheck
(
Abc_Obj_t
*
pNode
,
Vec_Ptr_t
*
vLeaves
);
extern
in
t
s_ResubTime
;
extern
clock_
t
s_ResubTime
;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
...
...
src/base/io/ioWriteBlif.c
View file @
ea98a249
...
...
@@ -684,8 +684,9 @@ char * Io_NtkDeriveSop( Mem_Flex_t * pMem, word uTruth, int nVars, Vec_Int_t * v
// check the case of constant cover
if
(
Vec_IntSize
(
vCover
)
==
0
||
(
Vec_IntSize
(
vCover
)
==
1
&&
Vec_IntEntry
(
vCover
,
0
)
==
0
)
)
{
char
*
pStr0
=
" 0
\n
"
,
*
pStr1
=
" 1
\n
"
;
assert
(
RetValue
==
0
);
return
Vec_IntSize
(
vCover
)
==
0
?
" 0
\n
"
:
" 1
\n
"
;
return
Vec_IntSize
(
vCover
)
==
0
?
pStr0
:
pStr1
;
}
// derive the AIG for that tree
pSop
=
Abc_SopCreateFromIsop
(
pMem
,
nVars
,
vCover
);
...
...
src/map/fpga/fpgaCore.c
View file @
ea98a249
...
...
@@ -28,7 +28,7 @@ ABC_NAMESPACE_IMPL_START
static
int
Fpga_MappingPostProcess
(
Fpga_Man_t
*
p
);
extern
clock_t
s_MappingTime
;
extern
clock_
t
s_MappingMem
;
extern
in
t
s_MappingMem
;
////////////////////////////////////////////////////////////////////////
...
...
src/map/if/ifCore.c
View file @
ea98a249
...
...
@@ -27,7 +27,7 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
extern
in
t
s_MappingTime
;
extern
clock_
t
s_MappingTime
;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
...
...
src/map/if/ifSeq.c
View file @
ea98a249
...
...
@@ -27,7 +27,7 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
extern
in
t
s_MappingTime
;
extern
clock_
t
s_MappingTime
;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
...
...
src/opt/res/resCore.c
View file @
ea98a249
...
...
@@ -76,7 +76,7 @@ struct Res_Man_t_
extern
Hop_Obj_t
*
Kit_GraphToHop
(
Hop_Man_t
*
pMan
,
Kit_Graph_t
*
pGraph
);
extern
in
t
s_ResynTime
;
extern
clock_
t
s_ResynTime
;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
...
...
src/proof/llb/llb3Nonlin.c
View file @
ea98a249
...
...
@@ -65,7 +65,7 @@ struct Llb_Mnn_t_
};
extern
in
t
timeBuild
,
timeAndEx
,
timeOther
;
extern
clock_
t
timeBuild
,
timeAndEx
,
timeOther
;
extern
int
nSuppMax
;
////////////////////////////////////////////////////////////////////////
...
...
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