Commit 9bd16029 by Alan Mishchenko

Renaming Cba into Bac.

parent ae46690b
...@@ -64,7 +64,7 @@ static void Psr_ManWriteVerilogSignal( FILE * pFile, Psr_Ntk_t * p, int Sig ) ...@@ -64,7 +64,7 @@ static void Psr_ManWriteVerilogSignal( FILE * pFile, Psr_Ntk_t * p, int Sig )
Psr_ManWriteVerilogConcat( pFile, p, Value ); Psr_ManWriteVerilogConcat( pFile, p, Value );
else assert( 0 ); else assert( 0 );
} }
static void Psr_ManWriteVerilogArray( FILE * pFile, Psr_Ntk_t * p, Vec_Int_t * vSigs, int Start, int Stop, int fOdd ) void Psr_ManWriteVerilogArray( FILE * pFile, Psr_Ntk_t * p, Vec_Int_t * vSigs, int Start, int Stop, int fOdd )
{ {
int i, Sig; int i, Sig;
assert( Vec_IntSize(vSigs) > 0 ); assert( Vec_IntSize(vSigs) > 0 );
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment