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Commit 243cb29e by Alan Mishchenko
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Version abc90311

parent 32314347
Showing with 387 additions and 1587 deletions
abclib.dsp
......@@ -3571,6 +3571,10 @@ SOURCE=.\src\aig\cec\cecPat.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\cec\cecSeq.c
# End Source File
# Begin Source File
SOURCE=.\src\aig\cec\cecSim.c
# End Source File
# Begin Source File
......
src/aig/cec/cec.h
......@@ -57,7 +57,7 @@ struct Cec_ParSim_t_
int nWords; // the number of simulation words
int nRounds; // the number of simulation rounds
int TimeLimit; // the runtime limit in seconds
int fDoubleOuts; // miter with separate outputs
int fDualOut; // miter with separate outputs
int fCheckMiter; // the circuit is the miter
int fFirstStop; // stop on the first sat output
int fSeqSimulate; // performs sequential simulation
......@@ -65,6 +65,21 @@ struct Cec_ParSim_t_
int fVerbose; // verbose stats
};
// semiformal parameters
typedef struct Cec_ParSmf_t_ Cec_ParSmf_t;
struct Cec_ParSmf_t_
{
int nWords; // the number of simulation words
int nRounds; // the number of simulation rounds
int nFrames; // the number of time frames
int nBTLimit; // conflict limit at a node
int TimeLimit; // the runtime limit in seconds
int fDualOut; // miter with separate outputs
int fCheckMiter; // the circuit is the miter
int fFirstStop; // stop on the first sat output
int fVerbose; // verbose stats
};
// combinational SAT sweeping parameters
typedef struct Cec_ParFra_t_ Cec_ParFra_t;
struct Cec_ParFra_t_
......@@ -79,7 +94,7 @@ struct Cec_ParFra_t_
int fRewriting; // enables AIG rewriting
int fCheckMiter; // the circuit is the miter
int fFirstStop; // stop on the first sat output
int fDoubleOuts; // miter with separate outputs
int fDualOut; // miter with separate outputs
int fColorDiff; // miter with separate outputs
int fVeryVerbose; // verbose stats
int fVerbose; // verbose stats
......@@ -112,11 +127,15 @@ extern int Cec_ManVerifyTwo( Gia_Man_t * p0, Gia_Man_t * p1, int fVerb
/*=== cecCore.c ==========================================================*/
extern void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p );
extern void Cec_ManSimSetDefaultParams( Cec_ParSim_t * p );
extern void Cec_ManSmfSetDefaultParams( Cec_ParSmf_t * p );
extern void Cec_ManFraSetDefaultParams( Cec_ParFra_t * p );
extern void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p );
extern Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars );
extern Gia_Man_t * Cec_ManSatSolving( Gia_Man_t * pAig, Cec_ParSat_t * pPars );
extern void Cec_ManSimulation( Gia_Man_t * pAig, Cec_ParSim_t * pPars );
/*=== cecSeq.c ==========================================================*/
extern int Cec_ManSeqResimulateCounter( Gia_Man_t * pAig, Cec_ParSim_t * pPars, Gia_Cex_t * pCex );
extern int Cec_ManSeqSemiformal( Gia_Man_t * pAig, Cec_ParSmf_t * pPars );
#ifdef __cplusplus
}
......
src/aig/cec/cecCec.c
......@@ -134,7 +134,7 @@ int Cec_ManVerify( Gia_Man_t * p, Cec_ParCec_t * pPars )
pParsFra->fVerbose = pPars->fVerbose;
pParsFra->fCheckMiter = 1;
pParsFra->fFirstStop = 1;
pParsFra->fDoubleOuts = 1;
pParsFra->fDualOut = 1;
pNew = Cec_ManSatSweeping( p, pParsFra );
if ( pNew == NULL )
{
......@@ -192,7 +192,7 @@ int Cec_ManVerifyTwo( Gia_Man_t * p0, Gia_Man_t * p1, int fVerbose )
int RetValue;
Cec_ManCecSetDefaultParams( pPars );
pPars->fVerbose = fVerbose;
pMiter = Gia_ManMiter( p0, p1, 0, 1, pPars->fVerbose );
pMiter = Gia_ManMiter( p0, p1, 1, 0, pPars->fVerbose );
if ( pMiter == NULL )
return -1;
RetValue = Cec_ManVerify( pMiter, pPars );
......
src/aig/cec/cecClass.c
......@@ -155,6 +155,70 @@ int Cec_ManSimCompareEqualFirstBit( unsigned * p0, unsigned * p1, int nWords )
/**Function*************************************************************
Synopsis [Returns the number of the first non-equal bit.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSimCompareConstScore( unsigned * p, int nWords, int * pScores )
{
int w, b;
if ( p[0] & 1 )
{
for ( w = 0; w < nWords; w++ )
if ( p[w] != ~0 )
for ( b = 0; b < 32; b++ )
if ( ((~p[w]) >> b ) & 1 )
pScores[32*w + b]++;
}
else
{
for ( w = 0; w < nWords; w++ )
if ( p[w] != 0 )
for ( b = 0; b < 32; b++ )
if ( ((p[w]) >> b ) & 1 )
pScores[32*w + b]++;
}
}
/**Function*************************************************************
Synopsis [Compares simulation info of two nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSimCompareEqualScore( unsigned * p0, unsigned * p1, int nWords, int * pScores )
{
int w, b;
if ( (p0[0] & 1) == (p1[0] & 1) )
{
for ( w = 0; w < nWords; w++ )
if ( p0[w] != p1[w] )
for ( b = 0; b < 32; b++ )
if ( ((p0[w] ^ p1[w]) >> b ) & 1 )
pScores[32*w + b]++;
}
else
{
for ( w = 0; w < nWords; w++ )
if ( p0[w] != ~p1[w] )
for ( b = 0; b < 32; b++ )
if ( ((p0[w] ^ ~p1[w]) >> b ) & 1 )
pScores[32*w + b]++;
}
}
/**Function*************************************************************
Synopsis [Creates equivalence class.]
Description []
......@@ -211,7 +275,11 @@ int Cec_ManSimClassRefineOne( Cec_ManSim_t * p, int i )
if ( Cec_ManSimCompareEqual( pSim0, pSim1, p->nWords ) )
Vec_IntPush( p->vClassOld, Ent );
else
{
Vec_IntPush( p->vClassNew, Ent );
if ( p->pBestState )
Cec_ManSimCompareEqualScore( pSim0, pSim1, p->nWords, p->pScores );
}
}
if ( Vec_IntSize( p->vClassNew ) == 0 )
return 0;
......@@ -422,6 +490,42 @@ void Cec_ManSimSavePattern( Cec_ManSim_t * p, int iPat )
/**Function*************************************************************
Synopsis [Find the best pattern using the scores.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSimFindBestPattern( Cec_ManSim_t * p )
{
unsigned * pInfo;
int i, ScoreBest = 0, iPatBest = 1;
// find the best pattern
for ( i = 0; i < 32 * p->nWords; i++ )
if ( ScoreBest < p->pScores[i] )
{
ScoreBest = p->pScores[i];
iPatBest = i;
}
// compare this with the available patterns - and save
if ( p->pBestState->iPo <= ScoreBest )
{
assert( p->pBestState->nRegs == Gia_ManRegNum(p->pAig) );
for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
{
pInfo = Vec_PtrEntry( p->vCiSimInfo, Gia_ManPiNum(p->pAig) + i );
if ( Aig_InfoHasBit(p->pBestState->pData, i) != Aig_InfoHasBit(pInfo, iPatBest) )
Aig_InfoXorBit( p->pBestState->pData, i );
}
p->pBestState->iPo = ScoreBest;
}
}
/**Function*************************************************************
Synopsis [Returns 1 if computation should stop.]
Description []
......@@ -435,10 +539,11 @@ int Cec_ManSimAnalyzeOutputs( Cec_ManSim_t * p )
{
unsigned * pInfo, * pInfo2;
int i;
if ( p->vCoSimInfo == NULL )
if ( !p->pPars->fCheckMiter )
return 0;
assert( p->vCoSimInfo != NULL );
// compare outputs with 0
if ( p->pPars->fDoubleOuts )
if ( p->pPars->fDualOut )
{
assert( (Gia_ManCoNum(p->pAig) & 1) == 0 );
for ( i = 0; i < Gia_ManCoNum(p->pAig); i++ )
......@@ -507,6 +612,10 @@ int Cec_ManSimSimulateRound( Cec_ManSim_t * p, Vec_Ptr_t * vInfoCis, Vec_Ptr_t *
if ( p->nWordsOld != p->nWords )
Cec_ManSimMemRelink( p );
p->nMemsMax = 0;
// allocate score counters
ABC_FREE( p->pScores );
if ( p->pBestState )
p->pScores = ABC_CALLOC( int, 32 * p->nWords );
// simulate nodes
Vec_IntClear( p->vRefinedC );
if ( Gia_ObjValue(Gia_ManConst0(p->pAig)) )
......@@ -583,6 +692,8 @@ references:
{
pRes[0]++;
Vec_IntPush( p->vRefinedC, i );
if ( p->pBestState )
Cec_ManSimCompareConstScore( pRes + 1, p->nWords, p->pScores );
}
// if the node belongs to a class, save it
if ( Gia_ObjIsClass(p->pAig, i) )
......@@ -607,6 +718,8 @@ references:
printf( "Cec_ManSimSimulateRound(): Memory management error!\n" );
if ( p->pPars->fVeryVerbose )
Gia_ManEquivPrintClasses( p->pAig, 0, Cec_MemUsage(p) );
if ( p->pBestState )
Cec_ManSimFindBestPattern( p );
/*
if ( p->nMems > 1 ) {
for ( i = 1; i < p->nObjs; i++ )
......@@ -682,8 +795,13 @@ int Cec_ManSimClassesPrepare( Cec_ManSim_t * p )
// allocate representation
p->pAig->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p->pAig) );
p->pAig->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p->pAig) );
// set starting representative of internal nodes to be constant 0
Gia_ManForEachObj( p->pAig, pObj, i )
Gia_ObjSetRepr( p->pAig, i, (Gia_ObjIsAnd(pObj) || Gia_ObjIsCi(pObj)) ? 0 : GIA_VOID );
Gia_ObjSetRepr( p->pAig, i, Gia_ObjIsAnd(pObj) ? 0 : GIA_VOID );
// if sequential simulation, set starting representative of ROs to be constant 0
if ( p->pPars->fSeqSimulate )
Gia_ManForEachRo( p->pAig, pObj, i )
Gia_ObjSetRepr( p->pAig, Gia_ObjId(p->pAig, pObj), 0 );
// perform simulation
Gia_ManSetRefs( p->pAig );
p->nWords = 1;
......
src/aig/cec/cecCore.c
......@@ -70,12 +70,37 @@ void Cec_ManSimSetDefaultParams( Cec_ParSim_t * p )
p->TimeLimit = 0; // the runtime limit in seconds
p->fCheckMiter = 0; // the circuit is the miter
p->fFirstStop = 0; // stop on the first sat output
p->fDoubleOuts = 0; // miter with separate outputs
p->fDualOut = 0; // miter with separate outputs
p->fSeqSimulate = 0; // performs sequential simulation
p->fVeryVerbose = 0; // verbose stats
p->fVerbose = 0; // verbose stats
}
/**Function************ *************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSmfSetDefaultParams( Cec_ParSmf_t * p )
{
memset( p, 0, sizeof(Cec_ParSmf_t) );
p->nWords = 15; // the number of simulation words
p->nRounds = 15; // the number of simulation rounds
p->nFrames = 2; // the number of time frames
p->nBTLimit = 1000; // conflict limit at a node
p->TimeLimit = 0; // the runtime limit in seconds
p->fDualOut = 0; // miter with separate outputs
p->fCheckMiter = 0; // the circuit is the miter
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 0; // verbose stats
}
/**Function************ *************************************************
Synopsis [This procedure sets default parameters.]
......@@ -100,7 +125,7 @@ void Cec_ManFraSetDefaultParams( Cec_ParFra_t * p )
p->fRewriting = 0; // enables AIG rewriting
p->fCheckMiter = 0; // the circuit is the miter
p->fFirstStop = 0; // stop on the first sat output
p->fDoubleOuts = 0; // miter with separate outputs
p->fDualOut = 0; // miter with separate outputs
p->fColorDiff = 0; // miter with separate outputs
p->fVeryVerbose = 0; // verbose stats
p->fVerbose = 0; // verbose stats
......@@ -177,7 +202,8 @@ void Cec_ManSimulation( Gia_Man_t * pAig, Cec_ParSim_t * pPars )
if ( pPars->fCheckMiter )
printf( "The number of failed outputs of the miter = %6d. (Words = %4d. Rounds = %4d.)\n",
pSim->iOut, pSim->nOuts, pPars->nWords, pPars->nRounds );
ABC_PRT( "Time", clock() - clkTotal );
if ( pPars->fVerbose )
ABC_PRT( "Time", clock() - clkTotal );
Cec_ManSimStop( pSim );
}
......@@ -213,7 +239,7 @@ Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars )
// prepare the managers
// SAT sweeping
p = Cec_ManFraStart( pIni, pPars );
if ( pPars->fDoubleOuts )
if ( pPars->fDualOut )
pPars->fColorDiff = 1;
// simulation
Cec_ManSimSetDefaultParams( pParsSim );
......@@ -221,10 +247,9 @@ Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars )
pParsSim->nRounds = pPars->nRounds;
pParsSim->fCheckMiter = pPars->fCheckMiter;
pParsSim->fFirstStop = pPars->fFirstStop;
pParsSim->fDoubleOuts = pPars->fDoubleOuts;
pParsSim->fDualOut = pPars->fDualOut;
pParsSim->fVerbose = pPars->fVerbose;
pSim = Cec_ManSimStart( p->pAig, pParsSim );
pSim->nWords = p->pPars->nWords;
// SAT solving
Cec_ManSatSetDefaultParams( pParsSat );
pParsSat->nBTLimit = pPars->nBTLimit;
......@@ -250,7 +275,7 @@ p->timeSim += clock() - clk;
{
clk2 = clock();
nMatches = 0;
if ( pPars->fDoubleOuts )
if ( pPars->fDualOut )
{
nMatches = Gia_ManEquivSetColors( p->pAig, pPars->fVeryVerbose );
// p->pAig->pIso = Cec_ManDetectIsomorphism( p->pAig );
......@@ -264,7 +289,7 @@ p->timeSim += clock() - clk;
Gia_ManStop( pSrm );
if ( p->pPars->fVerbose )
printf( "Considered all available candidate equivalences.\n" );
if ( pPars->fDoubleOuts && Gia_ManAndNum(p->pAig) > 0 )
if ( pPars->fDualOut && Gia_ManAndNum(p->pAig) > 0 )
{
if ( pPars->fColorDiff )
{
......@@ -276,7 +301,7 @@ p->timeSim += clock() - clk;
{
if ( p->pPars->fVerbose )
printf( "Switching into normal mode.\n" );
pPars->fDoubleOuts = 0;
pPars->fDualOut = 0;
}
continue;
}
......@@ -295,7 +320,7 @@ p->timeSat += clock() - clk;
Gia_ManStop( pSrm );
// update the manager
pSim->pAig = p->pAig = Gia_ManEquivReduceAndRemap( pTemp = p->pAig, 0, pParsSim->fDoubleOuts );
pSim->pAig = p->pAig = Gia_ManEquivReduceAndRemap( pTemp = p->pAig, 0, pParsSim->fDualOut );
Gia_ManStop( pTemp );
if ( p->pPars->fVerbose )
{
......@@ -332,18 +357,18 @@ p->timeSat += clock() - clk;
}
}
}
if ( pPars->fDoubleOuts && pPars->fColorDiff && Gia_ManAndNum(p->pAig) < 100000 )
if ( pPars->fDualOut && pPars->fColorDiff && Gia_ManAndNum(p->pAig) < 100000 )
{
if ( p->pPars->fVerbose )
printf( "Switching into reduced mode.\n" );
pPars->fColorDiff = 0;
}
if ( pPars->fDoubleOuts && Gia_ManAndNum(p->pAig) < 20000 )
if ( pPars->fDualOut && Gia_ManAndNum(p->pAig) < 20000 )
{
if ( p->pPars->fVerbose )
printf( "Switching into normal mode.\n" );
pPars->fColorDiff = 0;
pPars->fDoubleOuts = 0;
pPars->fDualOut = 0;
}
}
finalize:
......
src/aig/cec/cecInt.h
......@@ -117,13 +117,17 @@ struct Cec_ManSim_t_
int nMemsMax; // the max number of used entries
int MemFree; // next free entry
int nWordsOld; // the number of simulation words after previous relink
// bug catcher
// internal simulation info
Vec_Ptr_t * vCiSimInfo; // CI simulation info
Vec_Ptr_t * vCoSimInfo; // CO simulation info
// counter examples
void ** pCexes; // counter-examples for each output
int iOut; // first failed output
int nOuts; // the number of failed outputs
Gia_Cex_t * pCexComb; // counter-example for the first failed output
Gia_Cex_t * pBestState; // the state that led to most of the refinements
// scoring simulation patterns
int * pScores; // counters of refinement for each pattern
// temporaries
Vec_Int_t * vClassOld; // old class numbers
Vec_Int_t * vClassNew; // new class numbers
......@@ -182,6 +186,7 @@ extern Vec_Ptr_t * Cec_ManPatCollectPatterns( Cec_ManPat_t * pMan, int
/*=== cecSolve.c ============================================================*/
extern int Cec_ObjSatVarValue( Cec_ManSat_t * p, Gia_Obj_t * pObj );
extern void Cec_ManSatSolve( Cec_ManPat_t * pPat, Gia_Man_t * pAig, Cec_ParSat_t * pPars );
extern void Cec_ManSatSolveSeq( Vec_Ptr_t * vPatts, Gia_Man_t * pAig, Cec_ParSat_t * pPars, int nRegs, int * pnPats );
/*=== ceFraeep.c ============================================================*/
extern Gia_Man_t * Cec_ManFraSpecReduction( Cec_ManFra_t * p );
extern int Cec_ManFraClassesUpdate( Cec_ManFra_t * p, Cec_ManSim_t * pSim, Cec_ManPat_t * pPat, Gia_Man_t * pNew );
......
src/aig/cec/cecMan.c
......@@ -193,6 +193,7 @@ Cec_ManSim_t * Cec_ManSimStart( Gia_Man_t * pAig, Cec_ParSim_t * pPars )
memset( p, 0, sizeof(Cec_ManSim_t) );
p->pAig = pAig;
p->pPars = pPars;
p->nWords = pPars->nWords;
p->pSimInfo = ABC_CALLOC( int, Gia_ManObjNum(pAig) );
p->vClassOld = Vec_IntAlloc( 1000 );
p->vClassNew = Vec_IntAlloc( 1000 );
......@@ -229,6 +230,7 @@ void Cec_ManSimStop( Cec_ManSim_t * p )
Vec_PtrFree( p->vCiSimInfo );
if ( p->vCoSimInfo )
Vec_PtrFree( p->vCoSimInfo );
ABC_FREE( p->pScores );
ABC_FREE( p->pCexComb );
ABC_FREE( p->pCexes );
ABC_FREE( p->pMems );
......
src/aig/cec/cecSolve.c
......@@ -630,6 +630,85 @@ ABC_PRT( "time", clock() - clk2 );
Cec_ManSatStop( p );
}
/**Function*************************************************************
Synopsis [Save values in the cone of influence.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSolveSeq_rec( Cec_ManSat_t * pSat, Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Ptr_t * vInfo, int iPat, int nRegs )
{
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return;
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
unsigned * pInfo = Vec_PtrEntry( vInfo, nRegs + Gia_ObjCioId(pObj) );
if ( Cec_ObjSatVarValue( pSat, pObj ) != Aig_InfoHasBit( pInfo, iPat ) )
Aig_InfoXorBit( pInfo, iPat );
return;
}
assert( Gia_ObjIsAnd(pObj) );
Cec_ManSatSolveSeq_rec( pSat, p, Gia_ObjFanin0(pObj), vInfo, iPat, nRegs );
Cec_ManSatSolveSeq_rec( pSat, p, Gia_ObjFanin1(pObj), vInfo, iPat, nRegs );
}
/**Function*************************************************************
Synopsis [Performs one round of solving for the POs of the AIG.]
Description [Labels the nodes that have been proved (pObj->fMark1)
and returns the set of satisfying assignments.]
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSolveSeq( Vec_Ptr_t * vPatts, Gia_Man_t * pAig, Cec_ParSat_t * pPars, int nRegs, int * pnPats )
{
Bar_Progress_t * pProgress = NULL;
Cec_ManSat_t * p;
Gia_Obj_t * pObj;
int iPat = 1, nPats = 32 * Vec_PtrReadWordsSimInfo(vPatts);
int i, status, clk = clock();
Gia_ManSetPhase( pAig );
Gia_ManLevelNum( pAig );
Gia_ManResetTravId( pAig );
p = Cec_ManSatCreate( pAig, pPars );
pProgress = Bar_ProgressStart( stdout, Gia_ManPoNum(pAig) );
Gia_ManForEachCo( pAig, pObj, i )
{
if ( Gia_ObjIsConst0(Gia_ObjFanin0(pObj)) )
continue;
Bar_ProgressUpdate( pProgress, i, "BMC..." );
status = Cec_ManSatCheckNode( p, pObj );
if ( status != 0 )
continue;
// save the pattern
Gia_ManIncrementTravId( pAig );
Cec_ManSatSolveSeq_rec( p, pAig, Gia_ObjFanin0(pObj), vPatts, iPat++, nRegs );
if ( iPat == nPats )
break;
// quit if one of them is solved
if ( pPars->fFirstStop )
break;
}
p->timeTotal = clock() - clk;
Bar_ProgressStop( pProgress );
// Cec_ManSatPrintStats( p );
Cec_ManSatStop( p );
if ( pnPats )
*pnPats = iPat-1;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/aig/cec/cecSweep.c
......@@ -83,7 +83,7 @@ Gia_Man_t * Cec_ManFraSpecReduction( Cec_ManFra_t * p )
(Gia_ObjLevel(p->pAig, pObj) > p->pPars->nLevelMax ||
Gia_ObjLevel(p->pAig, pRepr) > p->pPars->nLevelMax) )
continue;
if ( p->pPars->fDoubleOuts )
if ( p->pPars->fDualOut )
{
// if ( i % 1000 == 0 && Gia_ObjRepr(p->pAig, i) )
// Gia_ManEquivPrintOne( p->pAig, Gia_ObjRepr(p->pAig, i), 0 );
......
src/aig/cec/module.make
......@@ -4,6 +4,7 @@ SRC += src/aig/cec/cecCec.c \
src/aig/cec/cecIso.c \
src/aig/cec/cecMan.c \
src/aig/cec/cecPat.c \
src/aig/cec/cecSeq.c \
src/aig/cec/cecSim.c \
src/aig/cec/cecSolve.c \
src/aig/cec/cecSweep.c
src/aig/cec2/cec.h deleted 100644 → 0
/**CFile****************************************************************
FileName [cec.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cec.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __CEC_H__
#define __CEC_H__
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
// dynamic SAT parameters
typedef struct Cec_ParSat_t_ Cec_ParSat_t;
struct Cec_ParSat_t_
{
int nBTLimit; // conflict limit at a node
int nSatVarMax; // the max number of SAT variables
int nCallsRecycle; // calls to perform before recycling SAT solver
int fFirstStop; // stop on the first sat output
int fPolarFlip; // uses polarity adjustment
int fVerbose; // verbose stats
};
// combinational SAT sweeping parameters
typedef struct Cec_ParCsw_t_ Cec_ParCsw_t;
struct Cec_ParCsw_t_
{
int nWords; // the number of simulation words
int nRounds; // the number of simulation rounds
int nBTLimit; // conflict limit at a node
int nSatVarMax; // the max number of SAT variables
int nCallsRecycle; // calls to perform before recycling SAT solver
int nLevelMax; // restriction on the level nodes to be swept
int fRewriting; // enables AIG rewriting
int fFirstStop; // stop on the first sat output
int fVerbose; // verbose stats
};
// combinational equivalence checking parameters
typedef struct Cec_ParCec_t_ Cec_ParCec_t;
struct Cec_ParCec_t_
{
int nIters; // iterations of SAT solving/sweeping
int nBTLimitBeg; // starting backtrack limit
int nBTlimitMulti; // multiple of backtrack limit
int fUseSmartCnf; // use smart CNF computation
int fRewriting; // enables AIG rewriting
int fSatSweeping; // enables SAT sweeping
int fFirstStop; // stop on the first sat output
int fVerbose; // verbose stats
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== cecCore.c ==========================================================*/
extern void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p );
extern void Cec_ManCswSetDefaultParams( Cec_ParCsw_t * p );
extern void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p );
extern int Cec_Solve( Aig_Man_t * pAig0, Aig_Man_t * pAig1, Cec_ParCec_t * p );
#ifdef __cplusplus
}
#endif
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/cecAig.c deleted 100644 → 0
/**CFile****************************************************************
FileName [cecAig.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [AIG manipulation.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecAig.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Derives combinational miter of the two AIGs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Obj_t * Cec_DeriveMiter_rec( Aig_Man_t * pNew, Aig_Obj_t * pObj )
{
if ( pObj->pData )
return pObj->pData;
if ( Aig_ObjIsPi(pObj) )
{
pObj->pData = Aig_ObjCreatePi( pNew );
if ( pObj->pHaig )
{
assert( pObj->pHaig->pData == NULL );
pObj->pHaig->pData = pObj->pData;
}
return pObj->pData;
}
assert( Aig_ObjIsNode(pObj) );
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin0(pObj) );
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin1(pObj) );
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
return pObj->pData;
}
/**Function*************************************************************
Synopsis [Derives combinational miter of the two AIGs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Cec_DeriveMiter( Aig_Man_t * p0, Aig_Man_t * p1 )
{
Bar_Progress_t * pProgress = NULL;
Aig_Man_t * pNew;
Aig_Obj_t * pObj0, * pObj1, * pObjNew;
int i;
assert( Aig_ManPiNum(p0) == Aig_ManPiNum(p1) );
assert( Aig_ManPoNum(p0) == Aig_ManPoNum(p1) );
// create the new manager
pNew = Aig_ManStart( Aig_ManNodeNum(p0) + Aig_ManNodeNum(p1) );
pNew->pName = Aig_UtilStrsav( p0->pName );
// create the PIs
Aig_ManCleanData( p0 );
Aig_ManCleanData( p1 );
Aig_ManConst1(p0)->pData = Aig_ManConst1(pNew);
Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p0, pObj0, i )
{
pObj1 = Aig_ManPi( p1, i );
pObj0->pHaig = pObj1;
pObj1->pHaig = pObj0;
if ( Aig_ObjRefs(pObj0) || Aig_ObjRefs(pObj1) )
continue;
pObjNew = Aig_ObjCreatePi( pNew );
pObj0->pData = pObjNew;
pObj1->pData = pObjNew;
}
// add logic for the POs
pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p0) );
Aig_ManForEachPo( p0, pObj0, i )
{
Bar_ProgressUpdate( pProgress, i, "Miter..." );
pObj1 = Aig_ManPo( p1, i );
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin0(pObj0) );
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin0(pObj1) );
pObjNew = Aig_Exor( pNew, Aig_ObjChild0Copy(pObj0), Aig_ObjChild0Copy(pObj1) );
Aig_ObjCreatePo( pNew, pObjNew );
}
Bar_ProgressStop( pProgress );
Aig_ManSetRegNum( pNew, 0 );
assert( Aig_ManHasNoGaps(pNew) );
return pNew;
}
/**Function*************************************************************
Synopsis [Duplicates AIG in the DFS order.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Cec_Duplicate( Aig_Man_t * p )
{
Bar_Progress_t * pProgress = NULL;
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
// make sure the AIG does not have choices and dangling nodes
Aig_ManForEachNode( p, pObj, i )
assert( Aig_ObjRefs(pObj) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManNodeNum(p) );
pNew->pName = Aig_UtilStrsav( p->pName );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
{
pObj->pHaig = NULL;
if ( Aig_ObjRefs(pObj) == 0 )
pObj->pData = Aig_ObjCreatePi( pNew );
}
// add logic for the POs
pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p) );
Aig_ManForEachPo( p, pObj, i )
{
Bar_ProgressUpdate( pProgress, i, "Miter..." );
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin0(pObj) );
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
}
Bar_ProgressStop( pProgress );
Aig_ManSetRegNum( pNew, 0 );
assert( Aig_ManHasNoGaps(pNew) );
return pNew;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/cecCore.c deleted 100644 → 0
/**CFile****************************************************************
FileName [cecCore.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Core procedures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p )
{
memset( p, 0, sizeof(Cec_ParSat_t) );
p->nBTLimit = 10; // conflict limit at a node
p->nSatVarMax = 2000; // the max number of SAT variables
p->nCallsRecycle = 100; // calls to perform before recycling SAT solver
p->fFirstStop = 0; // stop on the first sat output
p->fPolarFlip = 0; // uses polarity adjustment
p->fVerbose = 0; // verbose stats
}
/**Function*************************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManCswSetDefaultParams( Cec_ParCsw_t * p )
{
memset( p, 0, sizeof(Cec_ParCsw_t) );
p->nWords = 10; // the number of simulation words
p->nRounds = 10; // the number of simulation rounds
p->nBTLimit = 10; // conflict limit at a node
p->nSatVarMax = 2000; // the max number of SAT variables
p->nCallsRecycle = 100; // calls to perform before recycling SAT solver
p->nLevelMax = 50; // restriction on the level of nodes to be swept
p->fRewriting = 0; // enables AIG rewriting
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 1; // verbose stats
}
/**Function*************************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p )
{
memset( p, 0, sizeof(Cec_ParCec_t) );
p->nIters = 1; // iterations of SAT solving/sweeping
p->nBTLimitBeg = 2; // starting backtrack limit
p->nBTlimitMulti = 8; // multiple of backtrack limiter
p->fUseSmartCnf = 0; // use smart CNF computation
p->fRewriting = 0; // enables AIG rewriting
p->fSatSweeping = 0; // enables SAT sweeping
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 1; // verbose stats
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_Sweep( Aig_Man_t * pAig, int nBTLimit )
{
extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
// Cec_MtrStatus_t Status;
Cec_ParCsw_t ParsCsw, * pParsCsw = &ParsCsw;
Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
Caig_Man_t * pCaig;
Aig_Man_t * pSRAig;
// int clk;
Cec_ManCswSetDefaultParams( pParsCsw );
pParsCsw->nBTLimit = nBTLimit;
pCaig = Caig_ManClassesPrepare( pAig, pParsCsw->nWords, pParsCsw->nRounds );
pSRAig = Caig_ManSpecReduce( pCaig, 20 );
Aig_ManPrintStats( pSRAig );
Ioa_WriteAiger( pSRAig, "temp_srm.aig", 0, 1 );
/*
Cec_ManSatSetDefaultParams( pParsSat );
pParsSat->fFirstStop = 0;
pParsSat->nBTLimit = pParsCsw->nBTlimit;
clk = clock();
Status = Cec_SatSolveOutputs( pSRAig, pParsSat );
Cec_MiterStatusPrint( Status, "SRM ", clock() - clk );
*/
Aig_ManStop( pSRAig );
Caig_ManDelete( pCaig );
return 1;
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_Solve( Aig_Man_t * pAig0, Aig_Man_t * pAig1, Cec_ParCec_t * pPars )
{
Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
Cec_ParCsw_t ParsCsw, * pParsCsw = &ParsCsw;
Cec_MtrStatus_t Status;
Caig_Man_t * pCaig;
Aig_Man_t * pMiter;
int i, clk = clock();
if ( pPars->fVerbose )
{
Status = Cec_MiterStatusTrivial( pAig0 );
Status.nNodes += pAig1? Aig_ManNodeNum( pAig1 ) : 0;
Cec_MiterStatusPrint( Status, "Init ", 0 );
}
// create combinational miter
if ( pAig1 == NULL )
{
Status = Cec_MiterStatus( pAig0 );
if ( Status.nSat > 0 && pPars->fFirstStop )
{
if ( pPars->fVerbose )
printf( "Output %d is trivially SAT.\n", Status.iOut );
return 0;
}
if ( Status.nUndec == 0 )
{
if ( pPars->fVerbose )
printf( "The miter has no undecided outputs.\n" );
return 1;
}
pMiter = Cec_Duplicate( pAig0 );
}
else
{
pMiter = Cec_DeriveMiter( pAig0, pAig1 );
Status = Cec_MiterStatus( pMiter );
if ( Status.nSat > 0 && pPars->fFirstStop )
{
if ( pPars->fVerbose )
printf( "Output %d is trivially SAT.\n", Status.iOut );
Aig_ManStop( pMiter );
return 0;
}
if ( Status.nUndec == 0 )
{
if ( pPars->fVerbose )
printf( "The problem is solved by structrual hashing.\n" );
Aig_ManStop( pMiter );
return 1;
}
}
if ( pPars->fVerbose )
Cec_MiterStatusPrint( Status, "Strash", clock() - clk );
// start parameter structures
// Cec_ManSatSetDefaultParams( pParsSat );
// pParsSat->fFirstStop = pPars->fFirstStop;
// pParsSat->nBTLimit = pPars->nBTLimitBeg;
/*
// try SAT solving
clk = clock();
pParsSat->nBTLimit *= pPars->nBTlimitMulti;
Status = Cec_SatSolveOutputs( pMiter, pParsSat );
if ( pPars->fVerbose )
Cec_MiterStatusPrint( Status, "SAT ", clock() - clk );
if ( Status.nSat && pParsSat->fFirstStop )
break;
if ( Status.nUndec == 0 )
break;
*/
Cec_ManCswSetDefaultParams( pParsCsw );
pCaig = Caig_ManClassesPrepare( pMiter, pParsCsw->nWords, pParsCsw->nRounds );
for ( i = 0; i < pPars->nIters; i++ )
{
Cec_ManSatSweepInt( pCaig, pParsCsw );
i = i;
}
Caig_ManDelete( pCaig );
Aig_ManStop( pMiter );
return 1;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/cecInt.h deleted 100644 → 0
/**CFile****************************************************************
FileName [cecInt.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __CEC_INT_H__
#define __CEC_INT_H__
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
#include "aig.h"
#include "satSolver.h"
#include "bar.h"
#include "cec.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
typedef struct Cec_ManSat_t_ Cec_ManSat_t;
struct Cec_ManSat_t_
{
// parameters
Cec_ParSat_t * pPars;
// AIGs used in the package
Aig_Man_t * pAig; // the AIG whose outputs are considered
Vec_Int_t * vStatus; // status for each output
// SAT solving
sat_solver * pSat; // recyclable SAT solver
int nSatVars; // the counter of SAT variables
int * pSatVars; // mapping of each node into its SAT var
Vec_Ptr_t * vUsedNodes; // nodes whose SAT vars are assigned
int nRecycles; // the number of times SAT solver was recycled
int nCallsSince; // the number of calls since the last recycle
Vec_Ptr_t * vFanins; // fanins of the CNF node
// SAT calls statistics
int nSatUnsat; // the number of proofs
int nSatSat; // the number of failure
int nSatUndec; // the number of timeouts
// runtime stats
int timeSatUnsat; // unsat
int timeSatSat; // sat
int timeSatUndec; // undecided
int timeTotal; // total runtime
};
typedef struct Cec_ManCec_t_ Cec_ManCec_t;
struct Cec_ManCec_t_
{
// parameters
Cec_ParCec_t * pPars;
// AIGs used in the package
Aig_Man_t * pAig; // the miter for equivalence checking
// mapping of PI/PO nodes
// counter-example
int * pCex; // counter-example
int iOutput; // the output for this counter-example
// statistics
};
typedef struct Cec_MtrStatus_t_ Cec_MtrStatus_t;
struct Cec_MtrStatus_t_
{
int nInputs; // the total number of inputs
int nNodes; // the total number of nodes
int nOutputs; // the total number of outputs
int nUnsat; // the number of UNSAT outputs
int nSat; // the number of SAT outputs
int nUndec; // the number of undecided outputs
int iOut; // the satisfied output
};
// combinational simulation manager
typedef struct Caig_Man_t_ Caig_Man_t;
struct Caig_Man_t_
{
// parameters
Aig_Man_t * pAig; // the AIG to be used for simulation
int nWords; // the number of simulation words
// AIG representation
int nPis; // the number of primary inputs
int nPos; // the number of primary outputs
int nNodes; // the number of internal nodes
int nObjs; // nPis + nNodes + nPos + 1
int * pFans0; // fanin0 for all objects
int * pFans1; // fanin1 for all objects
// simulation info
int * pRefs; // reference counter for each node
unsigned * pSims; // simlulation information for each node
// recycable memory
unsigned * pMems; // allocated simulaton memory
int nWordsAlloc; // the number of allocated entries
int nMems; // the number of used entries
int nMemsMax; // the max number of used entries
int MemFree; // next ABC_FREE entry
// equivalence class representation
int * pReprs; // representatives of each node
int * pNexts; // nexts for each node
// temporaries
Vec_Ptr_t * vSims; // pointers to sim info
Vec_Int_t * vClassOld; // old class numbers
Vec_Int_t * vClassNew; // new class numbers
Vec_Int_t * vRefinedC; // refined const reprs
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
static inline int Cec_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
static inline int Cec_Lit2Var( int Lit ) { return Lit >> 1; }
static inline int Cec_LitIsCompl( int Lit ) { return Lit & 1; }
static inline int Cec_LitNot( int Lit ) { return Lit ^ 1; }
static inline int Cec_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
static inline int Cec_LitRegular( int Lit ) { return Lit & ~01; }
static inline int Cec_ObjSatNum( Cec_ManSat_t * p, Aig_Obj_t * pObj ) { return p->pSatVars[pObj->Id]; }
static inline void Cec_ObjSetSatNum( Cec_ManSat_t * p, Aig_Obj_t * pObj, int Num ) { p->pSatVars[pObj->Id] = Num; }
static inline Aig_Obj_t * Cec_ObjFraig( Aig_Obj_t * pObj ) { return pObj->pData; }
static inline void Cec_ObjSetFraig( Aig_Obj_t * pObj, Aig_Obj_t * pNode ) { pObj->pData = pNode; }
static inline int Cec_ObjIsConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj )
{
return Aig_ObjRepr(pAig, pObj) == Aig_ManConst1(pAig);
}
static inline void Cec_ObjSetConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj )
{
assert( !Cec_ObjIsConst1Cand( pAig, pObj ) );
Aig_ObjSetRepr( pAig, pObj, Aig_ManConst1(pAig) );
}
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== cecAig.c ==========================================================*/
extern Aig_Man_t * Cec_Duplicate( Aig_Man_t * p );
extern Aig_Man_t * Cec_DeriveMiter( Aig_Man_t * p0, Aig_Man_t * p1 );
/*=== cecClass.c ==========================================================*/
extern Aig_Man_t * Caig_ManSpecReduce( Caig_Man_t * p, int nLevels );
extern int Caig_ManCompareEqual( unsigned * p0, unsigned * p1, int nWords );
extern int Caig_ManCompareConst( unsigned * p, int nWords );
extern void Caig_ManCollectSimsNormal( Caig_Man_t * p, int i );
extern int Caig_ManClassRefineOne( Caig_Man_t * p, int i, Vec_Ptr_t * vSims );
extern void Caig_ManProcessRefined( Caig_Man_t * p, Vec_Int_t * vRefined );
extern void Caig_ManPrintClasses( Caig_Man_t * p, int fVerbose );
extern Caig_Man_t * Caig_ManClassesPrepare( Aig_Man_t * pAig, int nWords, int nIters );
/*=== cecCnf.c ==========================================================*/
extern void Cec_CnfNodeAddToSolver( Cec_ManSat_t * p, Aig_Obj_t * pObj );
/*=== cecSat.c ==========================================================*/
extern Cec_MtrStatus_t Cec_SatSolveOutputs( Aig_Man_t * pAig, Cec_ParSat_t * pPars );
/*=== cecSim.c ==========================================================*/
extern Caig_Man_t * Caig_ManCreate( Aig_Man_t * pAig );
extern void Caig_ManDelete( Caig_Man_t * p );
extern void Caig_ManSimMemRelink( Caig_Man_t * p );
extern unsigned * Caig_ManSimRead( Caig_Man_t * p, int i );
extern unsigned * Caig_ManSimRef( Caig_Man_t * p, int i );
extern unsigned * Caig_ManSimDeref( Caig_Man_t * p, int i );
extern void Caig_ManSimulateRound( Caig_Man_t * p, Vec_Ptr_t * vInfoCis, Vec_Ptr_t * vInfoCos );
extern int Cec_ManSimulate( Aig_Man_t * pAig, int nWords, int nIters, int TimeLimit, int fMiter, int fVerbose );
/*=== cecStatus.c ==========================================================*/
extern int Cec_OutputStatus( Aig_Man_t * p, Aig_Obj_t * pObj );
extern Cec_MtrStatus_t Cec_MiterStatus( Aig_Man_t * p );
extern Cec_MtrStatus_t Cec_MiterStatusTrivial( Aig_Man_t * p );
extern void Cec_MiterStatusPrint( Cec_MtrStatus_t S, char * pString, int Time );
/*=== cecSweep.c ==========================================================*/
extern void Cec_ManSatSweepInt( Caig_Man_t * pMan, Cec_ParCsw_t * pPars );
extern Aig_Man_t * Cec_ManSatSweep( Aig_Man_t * pAig, Cec_ParCsw_t * pPars );
#ifdef __cplusplus
}
#endif
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/cecMan.c deleted 100644 → 0
/**CFile****************************************************************
FileName [cecMan.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Manager pcocures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/cecSat.c deleted 100644 → 0
/**CFile****************************************************************
FileName [cecSat.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [SAT solver calls.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecSat.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Creates the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cec_ManSat_t * Cec_ManCreate( Aig_Man_t * pAig, Cec_ParSat_t * pPars )
{
Cec_ManSat_t * p;
// create interpolation manager
p = ABC_ALLOC( Cec_ManSat_t, 1 );
memset( p, 0, sizeof(Cec_ManSat_t) );
p->pPars = pPars;
p->pAig = pAig;
// SAT solving
p->nSatVars = 1;
p->pSatVars = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
p->vUsedNodes = Vec_PtrAlloc( 1000 );
p->vFanins = Vec_PtrAlloc( 100 );
return p;
}
/**Function*************************************************************
Synopsis [Frees the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManStop( Cec_ManSat_t * p )
{
if ( p->pSat )
sat_solver_delete( p->pSat );
Vec_PtrFree( p->vUsedNodes );
Vec_PtrFree( p->vFanins );
ABC_FREE( p->pSatVars );
ABC_FREE( p );
}
/**Function*************************************************************
Synopsis [Recycles the SAT solver.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSolverRecycle( Cec_ManSat_t * p )
{
int Lit;
if ( p->pSat )
{
Aig_Obj_t * pObj;
int i;
Vec_PtrForEachEntry( p->vUsedNodes, pObj, i )
Cec_ObjSetSatNum( p, pObj, 0 );
Vec_PtrClear( p->vUsedNodes );
// memset( p->pSatVars, 0, sizeof(int) * Aig_ManObjNumMax(p->pAigTotal) );
sat_solver_delete( p->pSat );
}
p->pSat = sat_solver_new();
sat_solver_setnvars( p->pSat, 1000 );
// var 0 is not used
// var 1 is reserved for const1 node - add the clause
p->nSatVars = 1;
// p->nSatVars = 0;
Lit = toLit( p->nSatVars );
if ( p->pPars->fPolarFlip )
Lit = lit_neg( Lit );
sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
Cec_ObjSetSatNum( p, Aig_ManConst1(p->pAig), p->nSatVars++ );
p->nRecycles++;
p->nCallsSince = 0;
}
/**Function*************************************************************
Synopsis [Runs equivalence test for the two nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManSatCheckNode( Cec_ManSat_t * p, Aig_Obj_t * pNode )
{
int nBTLimit = p->pPars->nBTLimit;
int Lit, RetValue, status, clk;
// sanity checks
assert( !Aig_IsComplement(pNode) );
p->nCallsSince++; // experiment with this!!!
// check if SAT solver needs recycling
if ( p->pSat == NULL ||
(p->pPars->nSatVarMax &&
p->nSatVars > p->pPars->nSatVarMax &&
p->nCallsSince > p->pPars->nCallsRecycle) )
Cec_ManSatSolverRecycle( p );
// if the nodes do not have SAT variables, allocate them
Cec_CnfNodeAddToSolver( p, pNode );
// propage unit clauses
if ( p->pSat->qtail != p->pSat->qhead )
{
status = sat_solver_simplify(p->pSat);
assert( status != 0 );
assert( p->pSat->qtail == p->pSat->qhead );
}
// solve under assumptions
// A = 1; B = 0 OR A = 1; B = 1
Lit = toLitCond( Cec_ObjSatNum(p,pNode), pNode->fPhase );
if ( p->pPars->fPolarFlip )
{
if ( pNode->fPhase ) Lit = lit_neg( Lit );
}
//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
clk = clock();
RetValue = sat_solver_solve( p->pSat, &Lit, &Lit + 1,
(ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( RetValue == l_False )
{
p->timeSatUnsat += clock() - clk;
Lit = lit_neg( Lit );
RetValue = sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
assert( RetValue );
p->timeSatUnsat++;
return 1;
}
else if ( RetValue == l_True )
{
p->timeSatSat += clock() - clk;
p->timeSatSat++;
return 0;
}
else // if ( RetValue == l_Undef )
{
p->timeSatUndec += clock() - clk;
p->timeSatUndec++;
return -1;
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cec_MtrStatus_t Cec_SatSolveOutputs( Aig_Man_t * pAig, Cec_ParSat_t * pPars )
{
Bar_Progress_t * pProgress = NULL;
Cec_MtrStatus_t Status;
Cec_ManSat_t * p;
Aig_Obj_t * pObj;
int i, status;
Status = Cec_MiterStatus( pAig );
p = Cec_ManCreate( pAig, pPars );
pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(pAig) );
Aig_ManForEachPo( pAig, pObj, i )
{
Bar_ProgressUpdate( pProgress, i, "SAT..." );
if ( Cec_OutputStatus(pAig, pObj) )
continue;
status = Cec_ManSatCheckNode( p, Aig_ObjFanin0(pObj) );
if ( status == 1 )
{
Status.nUndec--, Status.nUnsat++;
Aig_ObjPatchFanin0( pAig, pObj, Aig_ManConst0(pAig) );
}
if ( status == 0 )
{
Status.nUndec--, Status.nSat++;
Aig_ObjPatchFanin0( pAig, pObj, Aig_ManConst1(pAig) );
}
if ( status == -1 )
continue;
// save the pattern (if it is first)
if ( Status.iOut == -1 )
{
}
// quit if at least one of them is solved
if ( status == 0 && pPars->fFirstStop )
break;
}
Aig_ManCleanup( pAig );
Bar_ProgressStop( pProgress );
printf( " Confs = %8d. Recycles = %6d.\n", p->pPars->nBTLimit, p->nRecycles );
Cec_ManStop( p );
return Status;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/cecSat2.c deleted 100644 → 0
/**CFile****************************************************************
FileName [cecSat.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinational equivalence checking.]
Synopsis [Backend calling the SAT solver.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 30, 2007.]
Revision [$Id: cecSat.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
#include "cnf.h"
#include "../../sat/lsat/solver.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Writes CNF into a file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
solver * Cnf_WriteIntoSolverNew( Cnf_Dat_t * p )
{
solver * pSat;
int i, status;
pSat = solver_new();
for ( i = 0; i < p->nVars; i++ )
solver_newVar( pSat );
for ( i = 0; i < p->nClauses; i++ )
{
if ( !solver_addClause( pSat, p->pClauses[i+1]-p->pClauses[i], p->pClauses[i] ) )
{
solver_delete( pSat );
return NULL;
}
}
status = solver_simplify(pSat);
if ( status == 0 )
{
solver_delete( pSat );
return NULL;
}
return pSat;
}
/**Function*************************************************************
Synopsis [Adds the OR-clause.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cnf_DataWriteAndClausesNew( void * p, Cnf_Dat_t * pCnf )
{
/*
sat_solver * pSat = p;
Aig_Obj_t * pObj;
int i, Lit;
Aig_ManForEachPo( pCnf->pMan, pObj, i )
{
Lit = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
if ( !sat_solver_addclause( pSat, &Lit, &Lit+1 ) )
return 0;
}
*/
return 1;
}
/**Function*************************************************************
Synopsis [Adds the OR-clause.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cnf_DataWriteOrClauseNew( solver * pSat, Cnf_Dat_t * pCnf )
{
Aig_Obj_t * pObj;
int i, * pLits;
pLits = ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
Aig_ManForEachPo( pCnf->pMan, pObj, i )
pLits[i] = solver_mkLit_args( pCnf->pVarNums[pObj->Id], 0 );
if ( !solver_addClause( pSat, Aig_ManPoNum(pCnf->pMan), pLits ) )
{
free( pLits );
return 0;
}
free( pLits );
return 1;
}
/**Function*************************************************************
Synopsis [Writes the given clause in a file in DIMACS format.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Sat_SolverPrintStatsNew( FILE * pFile, solver * pSat )
{
// printf( "starts : %8d\n", solver_num_assigns(pSat) );
printf( "vars : %8d\n", solver_num_vars(pSat) );
printf( "clauses : %8d\n", solver_num_clauses(pSat) );
printf( "conflicts : %8d\n", solver_num_learnts(pSat) );
}
/**Function*************************************************************
Synopsis [Returns a counter-example.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int * Sat_SolverGetModelNew( solver * pSat, int * pVars, int nVars )
{
int * pModel;
int i;
pModel = ALLOC( int, nVars+1 );
for ( i = 0; i < nVars; i++ )
{
assert( pVars[i] >= 0 && pVars[i] < solver_num_vars(pSat) );
pModel[i] = (int)(solver_modelValue_Var( pSat, pVars[i] ) == solver_l_True);
}
return pModel;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_RunSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFlipBits, int fAndOuts, int fVerbose )
{
solver * pSat;
Cnf_Dat_t * pCnf;
int status, RetValue, clk = clock();
Vec_Int_t * vCiIds;
assert( Aig_ManRegNum(pMan) == 0 );
pMan->pData = NULL;
// derive CNF
pCnf = Cnf_Derive( pMan, Aig_ManPoNum(pMan) );
// pCnf = Cnf_DeriveSimple( pMan, Aig_ManPoNum(pMan) );
// convert into SAT solver
pSat = Cnf_WriteIntoSolverNew( pCnf );
if ( pSat == NULL )
{
Cnf_DataFree( pCnf );
return 1;
}
if ( fAndOuts )
{
assert( 0 );
// assert each output independently
if ( !Cnf_DataWriteAndClausesNew( pSat, pCnf ) )
{
solver_delete( pSat );
Cnf_DataFree( pCnf );
return 1;
}
}
else
{
// add the OR clause for the outputs
if ( !Cnf_DataWriteOrClauseNew( pSat, pCnf ) )
{
solver_delete( pSat );
Cnf_DataFree( pCnf );
return 1;
}
}
vCiIds = Cnf_DataCollectPiSatNums( pCnf, pMan );
Cnf_DataFree( pCnf );
// printf( "Created SAT problem with %d variable and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
// PRT( "Time", clock() - clk );
// simplify the problem
clk = clock();
status = solver_simplify(pSat);
// printf( "Simplified the problem to %d variables and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
// PRT( "Time", clock() - clk );
if ( status == 0 )
{
Vec_IntFree( vCiIds );
solver_delete( pSat );
// printf( "The problem is UNSATISFIABLE after simplification.\n" );
return 1;
}
// solve the miter
clk = clock();
if ( fVerbose )
solver_set_verbosity( pSat, 1 );
status = solver_solve( pSat, 0, NULL );
if ( status == solver_l_Undef )
{
// printf( "The problem timed out.\n" );
RetValue = -1;
}
else if ( status == solver_l_True )
{
// printf( "The problem is SATISFIABLE.\n" );
RetValue = 0;
}
else if ( status == solver_l_False )
{
// printf( "The problem is UNSATISFIABLE.\n" );
RetValue = 1;
}
else
assert( 0 );
// PRT( "SAT sat_solver time", clock() - clk );
// printf( "The number of conflicts = %d.\n", (int)pSat->sat_solver_stats.conflicts );
// if the problem is SAT, get the counterexample
if ( status == solver_l_True )
{
pMan->pData = Sat_SolverGetModelNew( pSat, vCiIds->pArray, vCiIds->nSize );
}
// free the sat_solver
if ( fVerbose )
Sat_SolverPrintStatsNew( stdout, pSat );
//sat_solver_store_write( pSat, "trace.cnf" );
//sat_solver_store_free( pSat );
solver_delete( pSat );
Vec_IntFree( vCiIds );
return RetValue;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/cecStatus.c deleted 100644 → 0
/**CFile****************************************************************
FileName [cecStatus.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Miter status.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecStatus.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Returns 1 if the output is known.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_OutputStatus( Aig_Man_t * p, Aig_Obj_t * pObj )
{
Aig_Obj_t * pChild;
assert( Aig_ObjIsPo(pObj) );
pChild = Aig_ObjChild0(pObj);
// check if the output is constant 0
if ( pChild == Aig_ManConst0(p) )
return 1;
// check if the output is constant 1
if ( pChild == Aig_ManConst1(p) )
return 1;
// check if the output is a primary input
if ( Aig_ObjIsPi(Aig_Regular(pChild)) )
return 1;
// check if the output is 1 for the 0000 pattern
if ( Aig_Regular(pChild)->fPhase != (unsigned)Aig_IsComplement(pChild) )
return 1;
return 0;
}
/**Function*************************************************************
Synopsis [Returns number of used inputs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_CountInputs( Aig_Man_t * p )
{
Aig_Obj_t * pObj;
int i, Counter = 0;
Aig_ManForEachPi( p, pObj, i )
Counter += (int)(pObj->nRefs > 0);
return Counter;
}
/**Function*************************************************************
Synopsis [Checks the status of the miter.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cec_MtrStatus_t Cec_MiterStatus( Aig_Man_t * p )
{
Cec_MtrStatus_t Status;
Aig_Obj_t * pObj, * pChild;
int i;
assert( p->nRegs == 0 );
memset( &Status, 0, sizeof(Cec_MtrStatus_t) );
Status.iOut = -1;
Status.nInputs = Cec_CountInputs( p );
Status.nNodes = Aig_ManNodeNum( p );
Status.nOutputs = Aig_ManPoNum(p);
Aig_ManForEachPo( p, pObj, i )
{
pChild = Aig_ObjChild0(pObj);
// check if the output is constant 0
if ( pChild == Aig_ManConst0(p) )
Status.nUnsat++;
// check if the output is constant 1
else if ( pChild == Aig_ManConst1(p) )
{
Status.nSat++;
if ( Status.iOut == -1 )
Status.iOut = i;
}
// check if the output is a primary input
else if ( Aig_ObjIsPi(Aig_Regular(pChild)) )
{
Status.nSat++;
if ( Status.iOut == -1 )
Status.iOut = i;
}
// check if the output is 1 for the 0000 pattern
else if ( Aig_Regular(pChild)->fPhase != (unsigned)Aig_IsComplement(pChild) )
{
Status.nSat++;
if ( Status.iOut == -1 )
Status.iOut = i;
}
else
Status.nUndec++;
}
return Status;
}
/**Function*************************************************************
Synopsis [Checks the status of the miter.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cec_MtrStatus_t Cec_MiterStatusTrivial( Aig_Man_t * p )
{
Cec_MtrStatus_t Status;
memset( &Status, 0, sizeof(Cec_MtrStatus_t) );
Status.iOut = -1;
Status.nInputs = Aig_ManPiNum(p);
Status.nNodes = Aig_ManNodeNum( p );
Status.nOutputs = Aig_ManPoNum(p);
Status.nUndec = Aig_ManPoNum(p);
return Status;
}
/**Function*************************************************************
Synopsis [Prints the status of the miter.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_MiterStatusPrint( Cec_MtrStatus_t S, char * pString, int Time )
{
printf( "%s:", pString );
printf( " I =%6d", S.nInputs );
printf( " N =%7d", S.nNodes );
printf( " " );
printf( " ? =%6d", S.nUndec );
printf( " U =%6d", S.nUnsat );
printf( " S =%6d", S.nSat );
printf(" %7.2f sec\n", (float)(Time)/(float)(CLOCKS_PER_SEC));
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
src/aig/cec2/module.make deleted 100644 → 0
SRC += src/aig/cec/cecAig.c \
src/aig/cec/cecClass.c \
src/aig/cec/cecCnf.c \
src/aig/cec/cecCore.c \
src/aig/cec/cecMan.c \
src/aig/cec/cecSat.c \
src/aig/cec/cecSim.c \
src/aig/cec/cecStatus.c \
src/aig/cec/cecSweep.c
src/aig/gia/gia.h
......@@ -80,6 +80,7 @@ struct Gia_Cex_t_
unsigned pData[0]; // the cex bit data (the number of bits: nRegs + (iFrame+1) * nPis)
};
// new AIG manager
typedef struct Gia_Man_t_ Gia_Man_t;
struct Gia_Man_t_
{
......@@ -109,6 +110,7 @@ struct Gia_Man_t_
int nFansAlloc; // the size of fanout representation
int * pMapping; // mapping for each node
Gia_Cex_t * pCexComb; // combinational counter-example
int * pCopies; // intermediate copies
};
......@@ -446,7 +448,7 @@ extern Gia_Man_t * Gia_ManDupCofactored( Gia_Man_t * p, int iVar, int nL
extern Gia_Man_t * Gia_ManDupDfsCiMap( Gia_Man_t * p, int * pCi2Lit, Vec_Int_t * vLits );
extern Gia_Man_t * Gia_ManDupDfsClasses( Gia_Man_t * p );
extern Gia_Man_t * Gia_ManDupTopAnd( Gia_Man_t * p, int fVerbose );
extern Gia_Man_t * Gia_ManMiter( Gia_Man_t * pAig0, Gia_Man_t * pAig1, int fXorOuts, int fComb, int fVerbose );
extern Gia_Man_t * Gia_ManMiter( Gia_Man_t * pAig0, Gia_Man_t * pAig1, int fDualOut, int fSeq, int fVerbose );
extern Gia_Man_t * Gia_ManTransformMiter( Gia_Man_t * p );
/*=== giaEnable.c ==========================================================*/
extern void Gia_ManDetectSeqSignals( Gia_Man_t * p, int fSetReset );
......@@ -454,9 +456,11 @@ extern void Gia_ManDetectSeqSignals( Gia_Man_t * p, int fSetReset
extern int * Gia_ManDeriveNexts( Gia_Man_t * p );
extern void Gia_ManEquivPrintOne( Gia_Man_t * p, int i, int Counter );
extern void Gia_ManEquivPrintClasses( Gia_Man_t * p, int fVerbose, float Mem );
extern Gia_Man_t * Gia_ManEquivReduce( Gia_Man_t * p, int fUseAll );
extern Gia_Man_t * Gia_ManEquivReduceAndRemap( Gia_Man_t * p, int fSeq, int fMiterPairs );
extern int Gia_ManEquivSetColors( Gia_Man_t * p, int fVerbose );
extern Gia_Man_t * Gia_ManSpecReduce( Gia_Man_t * p );
extern Gia_Man_t * Gia_ManSpecReduce( Gia_Man_t * p, int fDualOut );
extern Gia_Man_t * Gia_ManSpecReduceInit( Gia_Man_t * p, Gia_Cex_t * pInit, int nFrames, int fDualOut );
extern void Gia_ManEquivTransform( Gia_Man_t * p, int fVerbose );
/*=== giaFanout.c =========================================================*/
extern void Gia_ObjAddFanout( Gia_Man_t * p, Gia_Obj_t * pObj, Gia_Obj_t * pFanout );
......@@ -526,7 +530,10 @@ extern Vec_Int_t * Gia_ManCollectPoIds( Gia_Man_t * p );
extern int Gia_ObjIsMuxType( Gia_Obj_t * pNode );
extern int Gia_ObjRecognizeExor( Gia_Obj_t * pObj, Gia_Obj_t ** ppFan0, Gia_Obj_t ** ppFan1 );
extern Gia_Obj_t * Gia_ObjRecognizeMux( Gia_Obj_t * pNode, Gia_Obj_t ** ppNodeT, Gia_Obj_t ** ppNodeE );
extern int Gia_ManVerifyCounterExample( Gia_Man_t * pAig, Gia_Cex_t * p, int fDoubleOuts );
extern Gia_Cex_t * Gia_ManAllocCounterExample( int nRegs, int nRealPis, int nFrames );
extern int Gia_ManVerifyCounterExample( Gia_Man_t * pAig, Gia_Cex_t * p, int fDualOut );
extern void Gia_ManPrintCounterExample( Gia_Cex_t * p );
#ifdef __cplusplus
}
......
src/aig/gia/giaDup.c
......@@ -756,25 +756,12 @@ int Gia_ManMiter_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fXorOuts, int fComb, int fVerbose )
Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fDualOut, int fSeq, int fVerbose )
{
Gia_Man_t * pNew, * pTemp;
Gia_Obj_t * pObj;
int i, iLit;
if ( fComb )
{
if ( Gia_ManCiNum(p0) != Gia_ManCiNum(p1) )
{
printf( "Gia_ManMiter(): Designs have different number of CIs.\n" );
return NULL;
}
if ( Gia_ManCoNum(p0) != Gia_ManCoNum(p1) )
{
printf( "Gia_ManMiter(): Designs have different number of COs.\n" );
return NULL;
}
}
else
if ( fSeq )
{
if ( Gia_ManPiNum(p0) != Gia_ManPiNum(p1) )
{
......@@ -792,6 +779,19 @@ Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fXorOuts, int fCom
return NULL;
}
}
else
{
if ( Gia_ManCiNum(p0) != Gia_ManCiNum(p1) )
{
printf( "Gia_ManMiter(): Designs have different number of CIs.\n" );
return NULL;
}
if ( Gia_ManCoNum(p0) != Gia_ManCoNum(p1) )
{
printf( "Gia_ManMiter(): Designs have different number of COs.\n" );
return NULL;
}
}
// start the manager
pNew = Gia_ManStart( Gia_ManObjNum(p0) + Gia_ManObjNum(p1) );
pNew->pName = Aig_UtilStrsav( "miter" );
......@@ -802,31 +802,7 @@ Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fXorOuts, int fCom
Gia_ManConst0(p1)->Value = 0;
// map internal nodes and outputs
Gia_ManHashAlloc( pNew );
if ( fComb )
{
// create combinational inputs
Gia_ManForEachCi( p0, pObj, i )
pObj->Value = Gia_ManAppendCi( pNew );
Gia_ManForEachCi( p1, pObj, i )
pObj->Value = Gia_ObjToLit( pNew, Gia_ManCi(pNew, i) );
// create combinational outputs
Gia_ManForEachCo( p0, pObj, i )
{
Gia_ManMiter_rec( pNew, p0, Gia_ObjFanin0(pObj) );
Gia_ManMiter_rec( pNew, p1, Gia_ObjFanin0(Gia_ManCo(p1,i)) );
if ( fXorOuts )
{
iLit = Gia_ManHashXor( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin0Copy(Gia_ManCo(p1,i)) );
Gia_ManAppendCo( pNew, iLit );
}
else
{
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(Gia_ManCo(p1,i)) );
}
}
}
else
if ( fSeq )
{
// create primary inputs
Gia_ManForEachPi( p0, pObj, i )
......@@ -843,15 +819,15 @@ Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fXorOuts, int fCom
{
Gia_ManMiter_rec( pNew, p0, Gia_ObjFanin0(pObj) );
Gia_ManMiter_rec( pNew, p1, Gia_ObjFanin0(Gia_ManPo(p1,i)) );
if ( fXorOuts )
if ( fDualOut )
{
iLit = Gia_ManHashXor( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin0Copy(Gia_ManPo(p1,i)) );
Gia_ManAppendCo( pNew, iLit );
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(Gia_ManPo(p1,i)) );
}
else
{
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(Gia_ManPo(p1,i)) );
iLit = Gia_ManHashXor( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin0Copy(Gia_ManPo(p1,i)) );
Gia_ManAppendCo( pNew, iLit );
}
}
// create register inputs
......@@ -867,6 +843,30 @@ Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fXorOuts, int fCom
}
Gia_ManSetRegNum( pNew, Gia_ManRegNum(p0) + Gia_ManRegNum(p1) );
}
else
{
// create combinational inputs
Gia_ManForEachCi( p0, pObj, i )
pObj->Value = Gia_ManAppendCi( pNew );
Gia_ManForEachCi( p1, pObj, i )
pObj->Value = Gia_ObjToLit( pNew, Gia_ManCi(pNew, i) );
// create combinational outputs
Gia_ManForEachCo( p0, pObj, i )
{
Gia_ManMiter_rec( pNew, p0, Gia_ObjFanin0(pObj) );
Gia_ManMiter_rec( pNew, p1, Gia_ObjFanin0(Gia_ManCo(p1,i)) );
if ( fDualOut )
{
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(Gia_ManCo(p1,i)) );
}
else
{
iLit = Gia_ManHashXor( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin0Copy(Gia_ManCo(p1,i)) );
Gia_ManAppendCo( pNew, iLit );
}
}
}
Gia_ManHashStop( pNew );
pNew = Gia_ManCleanup( pTemp = pNew );
Gia_ManStop( pTemp );
......
src/aig/gia/giaUtil.c
......@@ -580,6 +580,29 @@ Gia_Obj_t * Gia_ObjRecognizeMux( Gia_Obj_t * pNode, Gia_Obj_t ** ppNodeT, Gia_Ob
/**Function*************************************************************
Synopsis [Allocates a counter-example.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Cex_t * Gia_ManAllocCounterExample( int nRegs, int nRealPis, int nFrames )
{
Gia_Cex_t * pCex;
int nWords = Aig_BitWordNum( nRegs + nRealPis * nFrames );
pCex = (Gia_Cex_t *)ABC_ALLOC( char, sizeof(Gia_Cex_t) + sizeof(unsigned) * nWords );
memset( pCex, 0, sizeof(Gia_Cex_t) + sizeof(unsigned) * nWords );
pCex->nRegs = nRegs;
pCex->nPis = nRealPis;
pCex->nBits = nRegs + nRealPis * nFrames;
return pCex;
}
/**Function*************************************************************
Synopsis [Resimulates the counter-example.]
Description []
......@@ -589,7 +612,7 @@ Gia_Obj_t * Gia_ObjRecognizeMux( Gia_Obj_t * pNode, Gia_Obj_t ** ppNodeT, Gia_Ob
SeeAlso []
***********************************************************************/
int Gia_ManVerifyCounterExample( Gia_Man_t * pAig, Gia_Cex_t * p, int fDoubleOuts )
int Gia_ManVerifyCounterExample( Gia_Man_t * pAig, Gia_Cex_t * p, int fDualOut )
{
Gia_Obj_t * pObj, * pObjRi, * pObjRo;
int RetValue, i, k, iBit = 0;
......@@ -608,7 +631,7 @@ int Gia_ManVerifyCounterExample( Gia_Man_t * pAig, Gia_Cex_t * p, int fDoubleOut
pObjRo->fMark0 = pObjRi->fMark0;
}
assert( iBit == p->nBits );
if ( fDoubleOuts )
if ( fDualOut )
RetValue = Gia_ManPo(pAig, 2*p->iPo)->fMark0 ^ Gia_ManPo(pAig, 2*p->iPo+1)->fMark0;
else
RetValue = Gia_ManPo(pAig, p->iPo)->fMark0;
......@@ -616,6 +639,36 @@ int Gia_ManVerifyCounterExample( Gia_Man_t * pAig, Gia_Cex_t * p, int fDoubleOut
return RetValue;
}
/**Function*************************************************************
Synopsis [Prints out the counter-example.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManPrintCounterExample( Gia_Cex_t * p )
{
int i, f, k;
printf( "Counter-example: iPo = %d iFrame = %d nRegs = %d nPis = %d nBits = %d\n",
p->iPo, p->iFrame, p->nRegs, p->nPis, p->nBits );
printf( "State : " );
for ( k = 0; k < p->nRegs; k++ )
printf( "%d", Aig_InfoHasBit(p->pData, k) );
printf( "\n" );
for ( f = 0; f <= p->iFrame; f++ )
{
printf( "Frame %2d : ", f );
for ( i = 0; i < p->nPis; i++ )
printf( "%d", Aig_InfoHasBit(p->pData, k++) );
printf( "\n" );
}
assert( k == p->nBits );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/main/mainInt.h
......@@ -80,6 +80,7 @@ struct Abc_Frame_t_
void * pAbc8Aig; // the current AIG
void * pAbc8Lib; // the current LUT library
void * pAig;
void * pCex;
// the addition to keep the best Ntl that can be used to restore
void * pAbc8NtlBestDelay; // the best delay, Ntl
......
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