* [VTA][Chisel] scale dram base address in hardware instead of runtime

* remove trailing spaces

* Support BatchMatMul with shapes greater than length 3

* Fixes

* Add tests

* Remove dependency on Python3

* Clean up

* Merge with master

* Resolve comments

* [VTA][Chisel] run all unittests by default

* better naming

* add generated unittest folder to clean rule

* building TSIM specific library along with fast simulator to quickly switch between dlls

* cmake controlled TSIM libraries

* always build tsim driver in either simulation modes

* build DLLs based on CMAKE flags

* updating the jenkinsfile

* small restructuring

* reducing the cmake flags

* update instructions

* reverting to 3 flags

* update Jenkinsfile

* adding new line

* enabling TSIM unit and integration tests

* fix description

* temporarily disabling task_python_vta tests in CPU Build stage

* move CPU tests in unit test stage

* stage  reorg

* better make

* disabling TSIM tests for now

* reverting some restructuring

* fix

* added alutest

* fix indent

* name change for cycle

* improved data gen and infra

* added alutest

* fix indent

* name change for cycle

* improved data gen and infra

* fix space

* fix indent

* fixes

* aluRef

* fix randomarary

* add

* Revert "add"

This reverts commit 87077daebbe055dee11f80e37da3a6291138e0f0.

* Revert "fix randomarary"

This reverts commit df386c1e660eb6ebcff1a1f905610573676f1589.

* Revert "aluRef"

This reverts commit 8665f0d4a7b12b796b2cb1ca6bf9cfe5613ee389.

* should fix dlmc-core

* [ARITH] Simplify casts of constants 0 and 1

* [EXPR] is_const_value to check whether non-ints are consts

* Revert "[EXPR] is_const_value to check whether non-ints are consts"

This reverts commit 7e1b3462e3f74fd0afb1541d72978107cfa23c30.

* Use tvm::cast

* Added relay and topi mirror_pad operator.

* Added mirror_padding to tensorflow frontend.

* Added mirrorpad testing in tensorflow frontent.

* Added space_to_depth in tf frontend.

* Added tests for spacetodepth.

* spacetodepth bug fix.

* Lint fix

* Added mirror pad python attrs.

* Pad code formatting.

* Syntax improvement

* Hopefully last lint fix

* Don't replace reduction init axis with new axis if bound to a thread.

* Linter.

* Reduce bind test case.

* Guard test on CUDA support.

* [CUDA TE TESTS] Add rfactor predicate test, add global bx and tx.

* [CUDA TE TESTS] Add loop partition test for simple rfactor case.

* [bugfix] tvm.scan follow by tvm.compute segfault

* more strict bound condition check

* access k + 1 -> k

* fix scan test

* Revert compile_cmd kwarg name change

* Fix binutil tests

* Improve graph tuner dealing with Tuple

* Add test case

* Move some data out of _base.py

* Fix lint

* aot

* save

* save

* fix test

* remove vta changes

* lint

* use pip3 for python3

* make python3 as default

* reproduce error

* fix

* lint

* lint

* fix

* fixes

* [Relay] [Quantization] WIP - Common files for the qauntization work.

* [Relay] [Quantization] WIP - Prototyping requantize op.

* Requantize operator implementation.

Requantize converts one quantized tensor representation to another quantized
representation. The PR has following implementation features

- Requantize operator defined in qnn namespace - relay.qnn.requantize
- Lowering of the requantize to exisiting Relay operators
- Integer fixed point implementation of requantize
    - Two rounding modes - FE_UPWARDS (round towards infinity) and
    FE_AWAY_FROM_ZERO (std::round behavior)
- Floating point implementation as well, that can act as reference or can be
used for devices when FP32 computation is not used.
- Unit test cases

Relevant Issue - https://github.com/dmlc/tvm/issues/2351

Credit to TFLite and GemmLowp to provide reference implementations.

* Typo and lint fixes.

* Doc fix.

* Uncommenting the lint script (fixing mistake).

* Modifying the unit tests.

* Moving C++ files into src/relay/qnn

* Moving python files to python/tvm/relay/qnn. Some minor fixes.

* Moving the attrs.h inside the include directory.

* Pushing files that I forgot earlier. Changing util location.

* Incorporating comments. API change. Lint fixes.

* Modifying the GetFixedPointMultiplierShift API as per comments.

* Forgot the dialect change.

* Changing rewrite to qnn_lower.

* Renaming Quantize to Qnn for clarity.

* Remove use_int_domain.

* Incorportaing review comments.

* Adding API doc for QNN dialect.

* Move the qnn_lower pass to transform namespace.

* Moving from expr to module. Adding namespace in C++.

* Minor sentence rewrites. Added qnn namespace.

* Added the API doc.

* Chanding default out_dtype to int8. Adding a test with in/out_dtype as uint8.

* Style fixes. Better error messages.

* Adding documentation.

* More documentation fixes.

* Adding out dtype check for requantize.

* Adding corner case for FP32 to fixed point conversion.

* Adding extra line.

* Documentation fix.

* Adding static inline.

* Incorporating jackwish comment. Removed idtype from requantize lowering.

* Removing Quantize/Dequantize code. Restricting Requantize to (u)int8/int32.

* Style fixes.

* Fix the docs.

* Move to Legalize API.

* [DOCKER] Fix missing apt https transport support

* [DOCKER] Drop superflous explicit sudo's

* add build gcn tutorial

* add dgl to docker file

* add dgl to docker file

* Apply suggestions from code review

Co-Authored-By: 雾雨魔理沙 <lolisa@marisa.moe>

* add dgl to docker file

* rerun checks

* Revert "add build gcn tutorial"

This reverts commit dbe8b5f0e02a13fdd586a9faa58fd1326653afb0.

* resolve git issue

* resolve git issue

* resolve git issue

* apply marisa's comment

* Add LayerNorm op

* update

* fix

* Add mean_std and mean_variance

* add std and update doc

* add license

* x

* lint

* x

* fix

* fix doc

* Fix mxnet converter for hybrid block

* tweak

* fix rebase

* fix

* add test

* [Relay] Rewrite pass.

This pass transforms an expression to other expression.

This pass has many usecases
 * Replace a expr to another expr, if the other expr has faster performance.
 * For ASICs, we might want to modify the inputs to adapt to the HW support.
 * Alter op layout can work in conjunction with this pass.

The supporting usecase is the Intel i8 x i8 conv. Intel HW supports u8 x i8 conv
in HW. Using this pass, we can replace an i8 x i8 conv to a sequence of
operators where one of the operators is now u8 x i8 conv. This will also help
automatic quantizaion performance.

* Better API name.

* Removing the conv2d legalization for x86. Will send a separate PR.

* Test name changes.

* Registering one funtion to register FTVMLegalize.

* Better comments.

* Fix the tile_rx and tile_ry issue.

    Note that this patch depends on pull request #9 in tvm-distro.

This includes changes to build TVM runtime for Hexagon.

* clean up tf frontend

* fix get_relay_op