- 14 Nov, 2019 1 commit
-
-
jason-song-dev committed
-
- 11 Nov, 2019 1 commit
-
-
Previously runtime::Module was supported using shared_ptr. This PR refactors the codebase to use the Object protocol. It will open doors to allow easier interpolation between Object containers and module in the future.
Tianqi Chen committed
-
- 02 Nov, 2019 1 commit
-
-
* [VTA] Performance optimize, remove unnecessary contigious memory use. Issue: Uop maintain a cache vector to copy uop data into contigious DRAM memory for FPGA/Simulator use, but this cache vector not get clear after FPGA/Simulator core run, in Resnet18 case, if we printf the cache size in UopQueue::ReadBarrier function, we can saw such cache size keep increase, this would cause no use data copy and unnecessary contigous DRAM memory malloc. Analysis: This issue caused by not clear cache_ vector when do uop_queue_.Reset(). Solution: Override BaseQueue Reset function in UopQueue and add cache_ clear logic. * address review comments, remove spacing.
Hua Jiang committed
-
- 07 Sep, 2019 1 commit
-
-
* [VTA] Support TLPP in function simulator. Issue: currently vta function simulator just doing serialized instruction execution, the dependency logic of runtime ISA which use for task level pipe line parallelism can not get verified by function simulator. Solution: make the simulator driver to be multiple thread and support TLPP. Benefit: TLPP support VTA function simulator would make VTA logic testing/debug /change more easy. replace boost lockfree queue add configure control for simulator tlpp enable or disable. change code tyle into google style. Wrap queue read/write and sync logic to make function call more simple. Add some comments. Remove MT logic, change into Single thread mode. address review comments. code style change to match google code style and add comments. add cmake macro to enable/disable simulator tlpp logic. submodule update. correct file name mentioned in comments. * remove USE_VTA_FSIM_TLPP.
Hua Jiang committed
-
- 05 Sep, 2019 1 commit
-
-
* rework; * `de10-nano` -> `de10nano`; * fix compilation error; * bug fix; * Update install.md * Update install.md * Update install.md * update with current runtime; * add debug messages; * bug fix in cma kernel module;
Liangfu Chen committed
-
- 02 Sep, 2019 1 commit
-
-
Luis Vega committed
-
- 29 Aug, 2019 1 commit
-
-
Issue: RewriteForceSerial is a debug function to force instructions to be serialize instead of parrallel running, by doing so we can isolate some parallel problem or do performance compare between parallel and serialize. But this function have some problem, once get enabled by set debug flag, vta would stuck when running on pynq board. Analysis: once enable RewriteForceSerial, the dependency logic is different with default one, but we still use same logic to generate FINISH and other logic, this would cause dead lock. Solution: give a different dependency settings when enable RewriteForceSerial.
Hua Jiang committed
-
- 26 Aug, 2019 1 commit
-
-
* initial virtual memory; * initial integration; * include the header file in cmake; * implement allocation with virtual to logical address mapping; * virtual memory for tsim_driver; * implement the missing memory release function; * readability improvement; * readability improvement; * address review comments; * improved robustness in virtual memory allocation; * remove VTA_TSIM_USE_VIRTUAL_MEMORY macro and use virtual memory for tsim by default; * link tvm against vta library; * merge with master * build virtual memory system without linking tvm against vta; * minor change; * reuse VTA_PAGE_BYTES; * using DRAM class from sim_driver as VirtualMemoryManager; * satisfy linter; * add comments in code; * undo changes to Makefile * undo changes to Makefile * retrigger ci; * retrigger ci; * directly call into VirtualMemoryManager::Global()
Liangfu Chen committed
-
- 14 Aug, 2019 1 commit
-
-
* [VTA][Chisel] scale dram base address in hardware instead of runtime * remove trailing spaces
Luis Vega committed
-
- 06 Aug, 2019 1 commit
-
-
Liangfu Chen committed
-
- 30 Jul, 2019 1 commit
-
-
* fix in IR pass to support padding on 6-d tensors * support for both N>1 and N==1 for padding * batch size > 1 tuning and base config * output formatting * batch conv2d * print all category results * revert to single-batch config * pick record best * fix conv test * improving reporting * address batching bug in fast simulator * fix
Thierry Moreau committed
-
- 29 Jul, 2019 1 commit
-
-
* hardware refactor for increased FPGA coverage, small optimizations * fix header * cleaning up parameters that won't be needed for now * streamlining makefile, and simplifying tcl scripts * moving parameter derivation into pkg_config.py, keeping tcl scripts lightweight * refactoring tcl script to avoid global variables * deriving AXI signals in pkg_config.py * unifying address map definition for hardware and software drivers * single channel design for ultra96 to simplify build * enable alu by default, no mul opcode for now * hardware fix * new bitstream; vta version * avoid error when env variable is not set * ultra96 cleanup * further cleaning up tcl script for bitstream generation * preliminary rpc server support on ultra96 * rpc server tracker scripts * ultra96 ldflag * ultra96 support * ultra96 support * cleanup line * cmake support for ultra96 * simplify memory instantiation * cleaning up IP parameter initialization * fix queue instantiation * 2019.1 transition * fix macro def * removing bus width from config * cleanup * fix * turning off testing for now * cleanup ultra96 ps insantiation * minor refactor * adding comments * upgrading to tophub v0.6 * model used in TVM target now refers to a specific version of VTA for better autoTVM scheduling * revert change due to bug * rename driver files to be for zynq-type devices * streamlining address mapping * unifying register map offset values between driver and hardware generator * rely on cma library for cache flush/invalidation * coherence management * not make buffer packing depend on data types that can be wider than 64bits * refactor config derivation to minimize free parameters * fix environment/pkg config interaction * adding cfg dump property to pkgconfig: * fix rpc reconfig * fix spacing * cleanup * fix spacing * long line fix * fix spacing and lint * fix line length * cmake fix * environment fix * renaming after pynq since the driver stack relies on the pynq library - see pynq.io * update doc * adding parameterization to name * space * removing reg width * vta RPC * update doc on how to edit vta_config.json * fix path * fix path
Thierry Moreau committed
-
- 22 Jul, 2019 1 commit
-
-
* updated runtime to support non-shared memory FPGAs for instruction and micro-op kernels * adding driver-defined memcpy function to handle F1 cases * refactor to include flush/invalidate in memcpy driver function * update tsim driver * bug fixes * cleanup * pre-allocate fpga readable buffers to improve perf * fix * remove instruction stream address rewrite pass for micro op kernels * fix: * white spaces * fix lint * avoid signed/unsigned compilation warning * avoid signed/unsigned compilation warning * fix * fix * addressing comments * whitespace * moving flush/invalidate out of memmove * clearnup * fix * cosmetic * rename API * comment fix
Thierry Moreau committed
-
- 08 Jul, 2019 1 commit
-
-
* add tsim init function * add sim device * test wait and resume * launch simulation thread from DPILoader * add VTASimDPI module to handle all simulation related stuff * test tsim init * move exit to simdpi module * update vta driver * add chisel DPI module * get back simshell * update vta to support dpi sim * update unittests * add tsim to integration-conv2d test * run resnet on tsim * remove max-cycles * match tsim counters with sim counters * use env in simulator to switch between sim and tsim * update unittest * rollback conv2d test * update resnet * add stats to matrix multiply * add stats * print stats after assert * update other tests * add stats to gemm * add return and remove unused libs * add missing arg * return lib * update comments for linter * add more comments to VTASimDPI module * remove trailing spaces * remove trailing spaces
Luis Vega committed
-
- 28 Jun, 2019 1 commit
-
-
Thierry Moreau committed
-
- 13 Jun, 2019 1 commit
-
-
* add support to event counters in VTA * fix comment * fix event-counter interface parameter * no longer needed * add sim back * add docs to event counters * fix docs * add more details about event counting * make dpi-module docs more accurate
Luis Vega committed
-
- 05 Jun, 2019 1 commit
-
-
Luis Vega committed
-
- 04 Jun, 2019 1 commit
-
-
* [Bugfix] [VTA] VTA DRAM Have A Logic Issue May Cause GEMM Output Wrong. Symptom: after change “LOG_BLOCK_IN” and “LOG_BLOCK_OUT” from vta_config.json into 7, run vta "Simple Matrix Multiply" in "simulator", the vta calculate result for GEMM is wrong. Sometime VTA crash with error “Check failed: phy_addr != 0 (0 vs. 0) : trying to get address that is nullptr” Analysis: Simulator hardcode kPageSize into 1<<12 and physical address calculate based on this size, when doing “insn->dram_base” calculation , because GetElemBytes(dst_memory_type) larger than page size, different physcial address may get same dram_base, than caused logic issue and finally trigger GEMM out put is wrong. Solution: add logic to check if PAGE SIZE larger then "GetElemBytes" return value. * address review comments.
Hua committed
-
- 20 May, 2019 1 commit
-
-
Issue: One of existing illegal dependency check's condition always true, the correct logic actually should be such check for store and load. Solution: Fix the said logic issue.
Hua committed
-
- 08 May, 2019 1 commit
-
-
* merge files * move verilator to the right place * change name to tsim * add default rule to be build and run * add README for tsim * Update README.md * add some structural feedback * change name of VTASim to VTADPISim * more renaming * update comment * add license * fix indentation * add switch for vta-tsim * add more licenses * update readme * address some of the new feedback * add some feedback from cpplint * add one more whitespace * pass pointer so linter is happy * pass pointer so linter is happy * README moved to vta documentation * create types for dpi functions, so they can be handle easily * fix pointer style * add feedback from docs * parametrize width data and pointers * fix comments * fix comment * add comment to class * add missing parameters * move README back to tsim example * add feedback * add more comments and remove un-necessary argument in finish * update comments * fix cpplint * fix doc
Luis Vega committed
-
- 08 Apr, 2019 1 commit
-
-
* [HEADER] ASF header dir=include * [HEADER] ASF Header dir=src * [HEADER] ASF Header -dir=python * [HEADER] ASF header dir=topi * [HEADER] ASF Header dir=nnvm * [HEADER] ASF Header -dir=tutorials * [HEADER] ASF Header dir=tests * [HEADER] ASF Header -dir=docker * fix whitespace * [HEADER] ASF Header -dir=jvm * [HEADER] ASF Header -dir=web * [HEADER] ASF Header --dir=apps * [HEADER] ASF Header --dir=vta * [HEADER] ASF Header -dir=go * temp * [HEADER] ASF Header --dir=rust * [HEADER] Add ASF Header --dir=cmake * [HEADER] ASF Header --dir=docs * [HEADER] Header for Jenkinsfile * [HEADER] ASF Header to toml and md * [HEADER] ASF Header to gradle * Finalize rat cleanup * Fix permission * Fix java test * temporary remove nnvm onnx test
Tianqi Chen committed
-
- 03 Feb, 2019 1 commit
-
-
Tianqi Chen committed
-
- 29 Jan, 2019 1 commit
-
-
Anthony Mai committed
-
- 21 Oct, 2018 1 commit
-
-
Thierry Moreau committed
-
- 19 Sep, 2018 1 commit
-
-
Tianqi Chen committed
-
- 23 Aug, 2018 1 commit
-
-
MORITA Kazutaka committed
-
- 24 Jul, 2018 1 commit
-
-
Tianqi Chen committed
-
- 12 Jul, 2018 13 commits
-
-
tqchen committed
-
Tianqi Chen committed
-
* bug fix for new drivers in new PYNQ image v2.1 * updating instructions for resnet inference * updated the instructions for starting the RPC server * deriving host/port from env for unit tests
Thierry Moreau committed -
* fix graph transform for batch dimension * fix * fix
Tianqi Chen committed -
* Migrate to json based config. Move gemm test to integration. * temp checkin * checkin example json
Tianqi Chen committed -
* [RUNTIME] Simplify dynamic library and code path. * reword the readme
Tianqi Chen committed -
Tianqi Chen committed
-
Tianqi Chen committed
-
* Hardware generation fixes/sweep, auto scheduling for VTA conv2d * Hardware generation fixes/sweep, auto scheduling for VTA conv2d * derive hw spec from config file * up to date hardware spec
Thierry Moreau committed -
Tianqi Chen committed
-
* VTA python library * Python unit tests * End to end example with Resnet18 * README instructions * Bug fixes
Thierry Moreau committed -
* code refactoring * code refactoring * code refactoring * code refactoring * fixing macro * refactoring, tests, makefile * style - making sure lint test pass * prefixed macros with VTA, fixed bugs
Thierry Moreau committed -
Thierry Moreau committed
-