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wenyuanbo
tic
Commits
c1c7b9b1
Commit
c1c7b9b1
authored
Sep 01, 2019
by
Alexey Golunov
Committed by
Jared Roesch
Aug 31, 2019
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[NNVM][FRONTEND][ONNX] Fix PReLU conversion (#3813)
parent
d08c74ca
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nnvm/python/nnvm/frontend/onnx.py
+1
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nnvm/python/nnvm/frontend/onnx.py
View file @
c1c7b9b1
...
@@ -307,10 +307,7 @@ class Prelu(OnnxOpConverter):
...
@@ -307,10 +307,7 @@ class Prelu(OnnxOpConverter):
def
_impl_v1
(
cls
,
inputs
,
attr
,
params
):
def
_impl_v1
(
cls
,
inputs
,
attr
,
params
):
assert
len
(
inputs
)
==
2
,
"Prelu need 2 inputs, {} given"
.
format
(
assert
len
(
inputs
)
==
2
,
"Prelu need 2 inputs, {} given"
.
format
(
len
(
inputs
))
len
(
inputs
))
channels
=
infer_channels
(
inputs
[
1
],
params
,
False
)
return
_sym
.
prelu
(
inputs
[
0
],
inputs
[
1
])
if
channels
==
1
:
return
inputs
[
0
]
*
inputs
[
1
]
return
_sym
.
broadcast_mul
(
inputs
[
0
],
inputs
[
1
])
class
Reciprocal
(
OnnxOpConverter
):
class
Reciprocal
(
OnnxOpConverter
):
...
...
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