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AOCL Backend Example
====================
TVM supports Intel FPGA SDK for OpenCL also known as AOCL. Here is a tutorial for how to use TVM with AOCL.
***Note***: This feature is still experimental. We cannot use AOCL to deploy an end to end neural networks for now. In addition, we only tested compilation for emulation mode of AOCL.
We use two python scripts for this tutorial.
- build.py - a script to synthesize FPGA bitstream.
```
import tvm
from tvm import te
tgt_host="llvm"
tgt="aocl_sw_emu"
n = te.var("n")
A = te.placeholder((n,), name='A')
B = te.placeholder((n,), name='B')
C = te.compute(A.shape, lambda i: A[i] + B[i], name="C")
- Launch an instance using the FPGA Developer AMI. We don't need an F1 instance for emulation and synthesis, so it is recommended to use a lower cost instance for them.
- Setup AWS FPGA development kit.
```bash
git clone https://github.com/aws/aws-fpga.git
cd aws-fpga
source sdaccel_setup.sh
source${XILINX_SDX}/settings64.sh
```
.. code:: bash
git clone https://github.com/aws/aws-fpga.git
cd aws-fpga
source sdaccel_setup.sh
source ${XILINX_SDX}/settings64.sh
- Setup TVM with OpenCL enabled.
...
...
@@ -95,76 +101,83 @@ Emulation
---------
- Create emconfig.json for emulation.
```bash
emconfigutil --platform${AWS_PLATFORM}--nd 1
```
.. code:: bash
emconfigutil --platform ${AWS_PLATFORM} --nd 1
- Copy emconfig.json to the python binary directory. It is because the current Xilinx toolkit assumes that both host binary and the emconfig.json file are in the same path.
