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Commit 52160f99 by Liangfu Chen Committed by Thierry Moreau
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fix multiple transfer issue in loaduop (#4442)

parent bcd33d8c
Showing with 2 additions and 2 deletions
vta/hardware/chisel/src/main/scala/core/LoadUop.scala
......@@ -173,7 +173,7 @@ class LoadUop(debug: Boolean = false)(implicit p: Parameters) extends Module {
}
}
.elsewhen(io.vme_rd.data.fire()) {
when(xcnt === xlen - 1.U) {
when((xcnt === xlen - 1.U) && (xrem === 0.U)) {
wmask := "b_01".U.asTypeOf(wmask)
}.otherwise {
wmask := "b_11".U.asTypeOf(wmask)
......@@ -183,7 +183,7 @@ class LoadUop(debug: Boolean = false)(implicit p: Parameters) extends Module {
when(io.vme_rd.cmd.fire()) {
wmask := "b_10".U.asTypeOf(wmask)
}.elsewhen(io.vme_rd.data.fire()) {
when(sizeIsEven && xcnt === xlen - 1.U) {
when(sizeIsEven && (xcnt === xlen - 1.U) && (xrem === 0.U)) {
wmask := "b_01".U.asTypeOf(wmask)
}.otherwise {
wmask := "b_11".U.asTypeOf(wmask)
......
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