Commit 3116eeec by Luis Vega Committed by Tianqi Chen

bugfix function args order in alu instruction generation (#3592)

parent 1a00cab9
......@@ -227,9 +227,9 @@ VTAGenericInsn getGEMMInsn(int uop_offset, int batch, int in_feat, int out_feat,
/*!
* \brief Returns a VTA ALU instruction for map type operation.
* \param opcode Opcode of the ALU instruction.
* \param vector_size Vector size of the ALU operation size.
* \param use_imm Use immediate.
* \param imm Immediate value (int16).
* \param vector_size Vector size of the ALU operation size.
* \param uop_compression Apply micro-op compression.
* \param pop_prev_dep Pop dependence from previous stage.
* \param pop_next_dep Pop dependence from next stage.
......@@ -237,7 +237,7 @@ VTAGenericInsn getGEMMInsn(int uop_offset, int batch, int in_feat, int out_feat,
* \param push_next_dep Push dependence to next stage.
* \return A VTAGenericInsn for a ALU op.
*/
VTAGenericInsn getALUInsn(int opcode, bool use_imm, int imm, int vector_size, bool uop_compression,
VTAGenericInsn getALUInsn(int opcode, int vector_size, bool use_imm, int imm, bool uop_compression,
int pop_prev_dep, int pop_next_dep, int push_prev_dep, int push_next_dep);
/*!
......
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