* add initial support to cycle counter to accelerator

* remove prints from c

* add event counter support to chisel tsim example

* make it more readable

* use a config class

* update driver

* add individual Makefile to chisel

* add rule for installing vta package

* add makefile for verilog backend

* update drivers

* update

* rename

* update README

* put default sim back

* set counter to zero