Commit 0a60c893 by songxinkai

add checking request send result

parent 230065be
bazel-* bazel-*
*.swp *.swp
log
...@@ -115,20 +115,22 @@ void Ram<T>::WaitFor(const double time){ ...@@ -115,20 +115,22 @@ void Ram<T>::WaitFor(const double time){
// memory_->send() and memory_->tick() // memory_->send() and memory_->tick()
template<typename T> template<typename T>
void Ram<T>::AccessCommand(const long req_addr, const Request::Type req_type){ bool Ram<T>::AccessCommand(const long req_addr, const Request::Type req_type, int message){
bool data_return = false; bool data_return = false;
long req_addr_param = req_addr; long req_addr_param = req_addr;
auto req_type_param = req_type; auto req_type_param = req_type;
auto clk = this->clk_; auto clk = this->clk_;
auto callback = std::function<void(Request&)>( auto callback = std::function<void(Request&)>(
[&data_return, clk, this](Request& rq){ [&data_return, message, clk, this](Request& rq){
data_return = true; data_return = true;
std::cout << "send at: " << clk << ", recieve at: " << this->clk_ << " (" << this->clk_-clk << ")" << std::endl; std::cout << "request id " << message << ", send at: " << clk << ", recieve at: " << this->clk_ << " (" << this->clk_-clk << ")" << std::endl;
}); });
Request req(req_addr_param, req_type_param, callback, 0); Request req(req_addr_param, req_type_param, callback, 0);
memory_->send(req); bool res = memory_->send(req);
cout << "request id " << message << ", send result: " << res << endl;
memory_->tick(); memory_->tick();
clk_++; clk_++;
return res;
} }
template<typename T> template<typename T>
...@@ -173,6 +175,17 @@ long Ram<T>::GetClockRam(){ ...@@ -173,6 +175,17 @@ long Ram<T>::GetClockRam(){
return this->clk_; return this->clk_;
} }
template<typename T>
void Ram<T>::PrintCtrlsQueuesSize(){
cout << memory_->ctrls.size() << ", "
<< memory_->ctrls[0]->readq.size() << ", "
<< memory_->ctrls[0]->writeq.size() << ", "
<< memory_->ctrls[0]->otherq.size() << ", "
<< memory_->ctrls[0]->actq.size() << ", "
<< memory_->ctrls[0]->pending.size() << endl;
}
// yet not implement: SALP-MASA, WideIO2, DSARP, TLDRAM // yet not implement: SALP-MASA, WideIO2, DSARP, TLDRAM
template class Ram<ramulator::DDR3>; template class Ram<ramulator::DDR3>;
template class Ram<ramulator::DDR4>; template class Ram<ramulator::DDR4>;
......
...@@ -36,7 +36,7 @@ public: ...@@ -36,7 +36,7 @@ public:
void WaitUntil(const double time); void WaitUntil(const double time);
void WaitFor(const double time); void WaitFor(const double time);
// memory_->send() and memory_->tick() // memory_->send() and memory_->tick()
void AccessCommand(const long req_addr, const Request::Type req_type); bool AccessCommand(const long req_addr, const Request::Type req_type, int message);
// memory_->send() and Loop: memory_->tick(), return: realtime from send to return // memory_->send() and Loop: memory_->tick(), return: realtime from send to return
double AccessAndWaitUntilReturn(const long req_addr, const Request::Type req_type); double AccessAndWaitUntilReturn(const long req_addr, const Request::Type req_type);
double ConvertRamCycle2Realtime(const long ram_cycle); double ConvertRamCycle2Realtime(const long ram_cycle);
...@@ -44,6 +44,8 @@ public: ...@@ -44,6 +44,8 @@ public:
void SetFrequency(const double r); void SetFrequency(const double r);
double GetClockRealtime(); // unit: ns double GetClockRealtime(); // unit: ns
long GetClockRam(); // unit: ram cycle long GetClockRam(); // unit: ram cycle
const std::shared_ptr<Memory<T, Controller> >& GetMemory(){ return memory_; }
void PrintCtrlsQueuesSize();
protected: protected:
void InitMemory(const Config& configs, T* spec); void InitMemory(const Config& configs, T* spec);
double frequency_; // unit: Ghz double frequency_; // unit: Ghz
......
...@@ -13,10 +13,13 @@ int main(int argc, const char *argv[]){ ...@@ -13,10 +13,13 @@ int main(int argc, const char *argv[]){
} }
Ram<ramulator::DDR3> ram(argv[1]); Ram<ramulator::DDR3> ram(argv[1]);
ram.SetFrequency(1.0); ram.SetFrequency(1.0);
ram.PrintCtrlsQueuesSize();
int addr_interval = std::stoi(argv[2]); int addr_interval = std::stoi(argv[2]);
for (int i = 0; i < 1000; ++i){ for (int i = 0; i < 16; ++i){
ram.AccessCommand(long(20734016 + i * addr_interval), ramulator::Request::Type::READ); while (!ram.AccessCommand(long(20734016 + i * addr_interval), ramulator::Request::Type::READ, i)){
ram.WaitFor(10); ram.WaitFor(0);
}
//ram.PrintCtrlsQueuesSize();
} }
ram.WaitUntil(80000); ram.WaitUntil(80000);
std::cout << "total cycles: " << ram.GetClockRealtime() << std::endl; std::cout << "total cycles: " << ram.GetClockRealtime() << std::endl;
......
#!/bin/bash #!/bin/bash
./bazel-bin/ramulator/testram ./configs/DDR3-config.cfg $1 #./bazel-bin/ramulator/testram ./configs/DDR4-config.cfg $1
./bazel-bin/ramulator/testram_break ./configs/DDR3-config.cfg $1 ./bazel-bin/ramulator/testram_break ./configs/DDR4-config.cfg $1
./bazel-bin/ramulator/main ./configs/DDR3-config.cfg $1 #./bazel-bin/ramulator/main ./configs/DDR4-config.cfg $1
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