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architecture | ||
backends | ||
bigsim | ||
frontends | ||
misc | ||
regression | ||
simple | ||
verific | ||
.gitignore | ||
Makefile | ||
README.md |
backends ======= 1. backends/firrtl/firrtl.cc – skipped because of error: ERROR: Unclocked write port 0 on memory top.ram. Add model with memory block too, so you can cover line block starting at line 419 simple ========= + 1. passes/techmap/attrmap.cc There is example in help block create example with (* keep="true" *) attribute and run example + 2. passes/techmap/dff2dffe.cc execute with -unmap parameter + 3. passes/techmap/dff2dffs.cc + 4. passes/techmap/extract.cc Lot of variations of input parameters is not excersised ? 5. passes/techmap/extract_counter.cc This is specific to greenpak4 architecture, but idea is to have counter in design and call this after synth_greenpak + 6. passes/techmap/shregmap.cc. This also seams to be greenpak4 specific, but extracting shift register misc ======== 1. passes/techmap/insbuf.cc Testing problems: 1. backends/firrtl/firrtl.cc – skipped because of error: ERROR: Unclocked write port 0 on memory top.ram. Add model with memory block too, so you can cover line block starting at line 419 2.dff2dffe -direct - skipped: ERROR: Found error in internal cell \dffe.$procdff$47 ($dffe) at 3.insbuf -buf $_BUF_ in out - skipped: ERROR: Found error in internal cell
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