Commit efa1a513 by Eddie Hung

Failures to exit with nonzero, add ice40_abc9

parent 5560220a
...@@ -36,6 +36,10 @@ case "$2" in ...@@ -36,6 +36,10 @@ case "$2" in
yosys -ql synthlog.txt -p "synth_ice40 -top $TOP; write_verilog synth.v" $rtl_files yosys -ql synthlog.txt -p "synth_ice40 -top $TOP; write_verilog synth.v" $rtl_files
iverilog_cmd="$iverilog_cmd synth.v $TECHLIBS_PREFIX/ice40/cells_sim.v" iverilog_cmd="$iverilog_cmd synth.v $TECHLIBS_PREFIX/ice40/cells_sim.v"
;; ;;
ice40_abc9)
yosys -ql synthlog.txt -p "synth_ice40 -abc9 -top $TOP; write_verilog synth.v" $rtl_files
iverilog_cmd="$iverilog_cmd synth.v $TECHLIBS_PREFIX/ice40/cells_sim.v"
;;
*) *)
exit 1 exit 1
;; ;;
...@@ -48,19 +52,20 @@ $iverilog_cmd ...@@ -48,19 +52,20 @@ $iverilog_cmd
if [ $? != 0 ] ; then if [ $? != 0 ] ; then
echo FAIL > ${1}_${2}.status echo FAIL > ${1}_${2}.status
touch .stamp touch .stamp
exit 0 exit 1
fi fi
vvp -N sim | pv -l > output.txt vvp -N sim | pv -l > output.txt
if [ $? != 0 ] ; then if [ $? != 0 ] ; then
echo FAIL > ${1}_${2}.status echo FAIL > ${1}_${2}.status
touch .stamp touch .stamp
exit 0 exit 1
fi fi
if [ "$2" = "falsify" ]; then if [ "$2" = "falsify" ]; then
if cmp output.txt ../work_sim/output.txt; then if cmp output.txt ../work_sim/output.txt; then
echo FAIL > ../../${1}_${2}.status echo FAIL > ../../${1}_${2}.status
exit 1
else else
echo PASS > ../../${1}_${2}.status echo PASS > ../../${1}_${2}.status
fi fi
...@@ -69,6 +74,7 @@ elif [ "$2" != "sim" ]; then ...@@ -69,6 +74,7 @@ elif [ "$2" != "sim" ]; then
echo PASS > ../../${1}_${2}.status echo PASS > ../../${1}_${2}.status
else else
echo FAIL > ../../${1}_${2}.status echo FAIL > ../../${1}_${2}.status
exit 1
fi fi
elif [ "$2" == "sim" ]; then elif [ "$2" == "sim" ]; then
echo PASS > ../../${1}_${2}.status echo PASS > ../../${1}_${2}.status
......
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