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lvzhengyang
yosys-tests
Commits
d37f4c67
Commit
d37f4c67
authored
Aug 30, 2019
by
Eddie Hung
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Remove -tech greenpak4 as that sets -clkpol
parent
5bdf83fc
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simple/scripts/shregmap_match_enpol.ys
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d37f4c67
read_verilog ../top.v
read_verilog ../top.v
synth_greenpak4 -run begin:map_luts
synth_greenpak4 -run begin:map_luts
shregmap -
tech greenpak4 -
match -enpol any
shregmap -match -enpol any
design -reset
design -reset
read_verilog ../top.v
read_verilog ../top.v
write_verilog synth.v
write_verilog synth.v
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