Megre commit: "Fix tests according to latest yosys and proper gitignore files"

Merge commit "Fix tests according to latest yosys and proper gitignore files". Make the same changes for 'regression'.

Megre commit: "Fix tests according to latest yosys and proper gitignore files"
Merge commit "Fix tests according to latest yosys and proper gitignore files". Make the same changes for 'regression'.
9de0c3b5 · SergeyDegtyar · e0c895b0 · 9de0c3b5 · 9de0c3b5 · 9de0c3b5
Commit 9de0c3b5 authored Jan 25, 2019 by SergeyDegtyar
9 changed files
--- a/Makefile
+++ b/Makefile

-SUBDIRS := architecture backends bigsim simple
+SUBDIRS := architecture backends bigsim frontends regression simple

 ifeq ($(VERIFIC),1)
 export VERIFIC=1

--- a/architecture/.gitignore
+++ b/architecture/.gitignore
+*/work_*/
 /.stamp
--- a/architecture/scripts/synth_achronix_noflatten.ys
+++ b/architecture/scripts/synth_achronix_noflatten.ys
 read_verilog ../top.v
-synth_achronix -flatten
+synth_achronix -noflatten
 write_verilog synth.v 
--- a/architecture/scripts/synth_intel_noflatten.ys
+++ b/architecture/scripts/synth_intel_noflatten.ys
 read_verilog ../top.v
-synth_intel -flatten
+synth_intel -noflatten
 write_verilog synth.v 
--- a/backends/.gitignore
+++ b/backends/.gitignore
+*/work_*/
 /.stamp
--- a/frontends/.gitignore
+++ b/frontends/.gitignore
-/alu/work_*/
+*/work_*/
 /.stamp
--- a/regression/.gitignore
+++ b/regression/.gitignore
-/alu/work_*/
+*/work_*/
 /.stamp
--- a/simple/.gitignore
+++ b/simple/.gitignore
-/alu/work_*/
+*/work_*/
 /.stamp
--- a/simple/scripts/tristate.ys
+++ b/simple/scripts/tristate.ys
 read_verilog ../top.v
-synth_sf2 -top top
+synth -top top
 write_verilog synth.v