Commit 6e06f5d2 by SergeyDegtyar

Remove test "write_btor_no_driver"; Fix test "write_btor_init_assert"

parent d40d6d5d
...@@ -44,7 +44,7 @@ $(eval $(call template,write_btor_pmux,write_btor_pmux)) ...@@ -44,7 +44,7 @@ $(eval $(call template,write_btor_pmux,write_btor_pmux))
$(eval $(call template,write_btor_and_or,write_btor_and_or)) $(eval $(call template,write_btor_and_or,write_btor_and_or))
$(eval $(call template,write_btor_shiftx,write_btor write_btor_v write_btor_s)) $(eval $(call template,write_btor_shiftx,write_btor write_btor_v write_btor_s))
$(eval $(call template,write_btor_init_assert,write_btor write_btor_v write_btor_s)) $(eval $(call template,write_btor_init_assert,write_btor write_btor_v write_btor_s))
$(eval $(call template,write_btor_error, write_btor_no_top_module write_btor_unsupported_cell_type write_btor_no_driver)) $(eval $(call template,write_btor_error, write_btor_no_top_module write_btor_unsupported_cell_type))
#write_edif #write_edif
$(eval $(call template,write_edif,write_edif write_edif_top write_edif_nogndvcc write_edif_pvector_par write_edif_pvector_bra write_edif_pvector_ang write_edif_attrprop )) $(eval $(call template,write_edif,write_edif write_edif_top write_edif_nogndvcc write_edif_pvector_par write_edif_pvector_bra write_edif_pvector_ang write_edif_attrprop ))
......
read_verilog ../top.v
memory
write_btor btor.btor
...@@ -29,8 +29,8 @@ always @(posedge x) begin ...@@ -29,8 +29,8 @@ always @(posedge x) begin
assume(too); assume(too);
assume(s_eventually too); assume(s_eventually too);
end end
always @(negedge x) begin always @(posedge x) begin
if ($initstate) if ($initstate)
cout <= 0; cout <= 0;
cout <= y + A + foo; cout <= y + A + foo;
assert(ASSERT); assert(ASSERT);
......
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