Add picorv32 from cliffordwolf/picorv32 @ d046cbf

5d602ff0 · Eddie Hung · b79541a7 · 5d602ff0 · 5d602ff0 · 5d602ff0
Commit 5d602ff0 authored Jul 13, 2019 by Eddie Hung
Showing with 15 additions and 0 deletions

bigsim/picorv32/README.md
+4 -0

bigsim/picorv32/config
+11 -0

bigsim/picorv32/rtl/picorv32.v
+0 -0

bigsim/picorv32/sim/firmware.hex
+0 -0

bigsim/picorv32/sim/testbench.v
+0 -0

No files found.
--- a/bigsim/picorv32/README.md
+++ b/bigsim/picorv32/README.md
+PicoRV32 - A Size-Optimized RISC-V CPU
+https://github.com/cliffordwolf/picorv32
+
+https://github.com/cliffordwolf/picorv32/tree/d046cbfa4986acb50ef6b6e5ff58e9cab543980b
--- a/bigsim/picorv32/config
+++ b/bigsim/picorv32/config
+TOP="picorv32_axi"
+RTL="picorv32.v"
+SIM="testbench.v"
+BUGMACRO="PICORV32_TESTBUG_001"
+PRESYN="chparam -set COMPRESSED_ISA 1 -set ENABLE_MUL 1 -set ENABLE_DIV 1 -set ENABLE_IRQ 1 -set ENABLE_TRACE 1 picorv32_axi"
+if [ "$2" == "sim" ]; then
+    SIMARGS="-DCOMPRESSED_ISA=1"
+else
+    SIMARGS="-DSYNTH_TEST"
+fi
+PLUSARGS="+firmware=../sim/firmware.hex"
--- a/bigsim/picorv32/rtl/picorv32.v
+++ b/bigsim/picorv32/rtl/picorv32.v
--- a/bigsim/picorv32/sim/firmware.hex
+++ b/bigsim/picorv32/sim/firmware.hex
--- a/bigsim/picorv32/sim/testbench.v
+++ b/bigsim/picorv32/sim/testbench.v