Reduce DSP tests

architecture/synth_xilinx_dsp/assert_area.py

@@ -11,6 +11,7 @@ for fn in glob.glob('*.v'):
     if not m: continue
 
     macc = m.group(1) == 'macc'
+    muladd = m.group(1) == 'muladd'
     A,B = map(int, m.group(2,4))
     Asigned,Bsigned = m.group(3,5)
     if m.group(6):
@@ -47,7 +48,10 @@ for fn in glob.glob('*.v'):
                            #   expect last slice to absorb at least one register
     # TODO: More assert on number of CARRY and LUTs
     count_CARRY = ''
-    if not macc and (A <= 25 or B <= 18):
+    if macc or muladd:
+        if A <= 25 and B <= 18:
+            count_CARRY = '; select t:XORCY -assert-none; select t:LUT* -assert-none';
+    elif A <= 25 or B <= 18:
         count_CARRY = '; select t:XORCY -assert-none; select t:LUT* -assert-none';
 
     bn,_ = os.path.splitext(fn)

architecture/synth_xilinx_dsp/generate_macc.py

@@ -6,4 +6,5 @@ ARange = ['17','17s','18','18s','19','19s','24','24s','25','25s','36','36s','49'
 BRange = ['17','17s','18','18s','19','19s','27','27s','34','34s','35','35s','36','36s']
 
 if __name__ == "__main__":
-    gen_macc(ARange, BRange, reg="ABM")
+    gen_macc(['24','49s'], ['17','36s'], reg="ABMP")
+    gen_macc(ARange, BRange, reg="")

architecture/synth_xilinx_dsp/generate_mul.py

@@ -6,4 +6,5 @@ ARange = ['17','17s','18','18s','19','19s','24','24s','25','25s','36','36s','49'
 BRange = ['17','17s','18','18s','19','19s','27','27s','34','34s','35','35s','36','36s']
 
 if __name__ == "__main__":
-    gen_mul(ARange, BRange, reg="ABMP")
+    gen_mul(['24','49s'], ['17','36s'], reg="ABMP")
+    gen_mul(ARange, BRange, reg="")

architecture/synth_xilinx_dsp/generate_muladd.py

@@ -4,7 +4,8 @@ from common_muladd import gen_muladd
 
 ARange = ['24','24s','25','25s','36','36s']
 BRange = ['17','17s','18','18s','19','19s']
-CRange = ['32','32s','40','40s','48','48s']
+CRange = ['32','32s','48','48s','96','96s']
 
 if __name__ == "__main__":
-    gen_muladd(ARange, BRange, CRange, reg="ABMP")
+    gen_muladd(['24','49s'], ['17','36s'], ['47','96s'], reg="ABMP")
+    gen_muladd(ARange, BRange, CRange, reg="")