fixed splice test

38626b9f · Miodrag Milanovic · 7d94b22e · 38626b9f
Commit 38626b9f authored May 24, 2019 by Miodrag Milanovic
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misc/scripts/splice_port.ys
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--- a/misc/scripts/splice_port.ys
+++ b/misc/scripts/splice_port.ys
 read_verilog ../top.v
 synth
-splice -port data_a
+splice -port WR_EN
 tee -o result.log dump