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yosys-tests
Commit 139c5af3 by Eddie Hung
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Update tests after removal of LUT3 instantiation

parent 2959ad33
Showing with 3 additions and 3 deletions
architecture/synth_xilinx_srl/test16.ys
......@@ -132,6 +132,6 @@ cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[124].sr; select
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[125].sr; select t:FD* -assert-count 0; select t:SRL16E -assert-count 0; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT3 -assert-count 1; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[126].sr; select t:FD* -assert-count 0; select t:SRL16E -assert-count 0; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT3 -assert-count 1; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[127].sr; select t:FD* -assert-count 0; select t:SRL16E -assert-count 0; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT3 -assert-count 1; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[128].sr; select t:FD* -assert-count 1; select t:SRL16E -assert-count 0; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT3 -assert-count 2; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[129].sr; select t:FD* -assert-count 0; select t:SRL16E -assert-count 1; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT3 -assert-count 2; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[130].sr; select t:FD* -assert-count 0; select t:SRL16E -assert-count 1; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT3 -assert-count 2; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[128].sr; select t:FD* -assert-count 1; select t:SRL16E -assert-count 0; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT5 -assert-count 1; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[129].sr; select t:FD* -assert-count 0; select t:SRL16E -assert-count 1; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT5 -assert-count 1; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
cd synth; cd neg_clk_with_enable_with_init_inferred_var_len_long[130].sr; select t:FD* -assert-count 0; select t:SRL16E -assert-count 1; select t:SRLC32E -assert-count 8; select t:MUXF7 -assert-count 4; select t:MUXF8 -assert-count 2; select t:LUT5 -assert-count 1; select t:FD* t:SRL16E t:SRLC32E t:LUT* t:MUXF* %% %n t:* %i -assert-none
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