Commit 0d4925da by Miodrag Milanovic

Fix tests according to latest yosys and proper gitignore files

parent ca10650b
read_verilog ../top.v
synth_achronix -flatten
synth_achronix -noflatten
write_verilog synth.v
read_verilog ../top.v
synth_intel -flatten
synth_intel -noflatten
write_verilog synth.v
/alu/work_*/
*/work_*/
/.stamp
/alu/work_*/
*/work_*/
/.stamp
read_verilog ../top.v
synth_sf2 -top top
synth -top top
write_verilog synth.v
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