Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
Y
yosys-tests
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
yosys-tests
Repository
fdc77d0416b6c78d5a1a27cd9f8a6edbfb770135
Switch branch/tag
yosys-tests
architecture
synth_intel_cycloneive
testbench.v
Find file
Blame
History
Permalink
Add tests for "II architecture" and "III backends"; fix testbench for simple/memory;
· f7c7f7c7
SergeyDegtyar
committed
Jan 15, 2019
f7c7f7c7
testbench.v
569 Bytes
Edit