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lvzhengyang
yosys-tests
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f3acf17b03ff50f7736a9a9bba904b66c1b93d44
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yosys-tests
architecture
xilinx_ug901_synthesis_examples
ram_simple_dual_one_clock.ys
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Move tests for Xilinx UG901 examples from tests/xilinx_ug901 to yosys-tests
· 2d5dab20
SergeyDegtyar
committed
Sep 10, 2019
2d5dab20
ram_simple_dual_one_clock.ys
588 Bytes
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