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write_smt2_memtest.ys 78 Bytes
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Add tests for "II architecture" and "III backends"; fix testbench for simple/memory;
f7c7f7c7
 
SergeyDegtyar committed
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read_verilog ../top.v
proc
Fix failed tests
5fee7bf3
 
SergeyDegtyar committed
3 
memory
Add tests for "II architecture" and "III backends"; fix testbench for simple/memory;
f7c7f7c7
 
SergeyDegtyar committed
4 5 
write_smt2 smt2.smt2
write_verilog synth.v