Blame · simple/scripts/expose_cut.ys · 73abab3bec1367fcd18c700db76c4a65785124ce · lvzhengyang / yosys-tests · GitLab

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Add new tests to 'simple' and 'misc' groups

committed 5 years ago

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read_verilog ../top.v
synth -top top
proc
flatten
opt
opt_rmdff
expose -cut
write_verilog synth.v