Blame · backends/scripts/write_ilang.ys · 3cd495618c9ae4eaf4e583f9857220116084cd6c · lvzhengyang / yosys-tests · GitLab

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Add tests for "II architecture" and "III backends"; fix testbench for simple/memory; f7c7f7c7 SergeyDegtyar committed 6 years ago	1	`read_verilog ../top.v`
Add new tests to backends and architecture; 10f53cb1 SergeyDegtyar committed 5 years ago	2	`write_ilang ilang.ilang`
Add tests for "II architecture" and "III backends"; fix testbench for simple/memory; f7c7f7c7 SergeyDegtyar committed 6 years ago	3 4	`proc dump -o file.il`
Fix test script 5560220a Miodrag Milanovic committed 5 years ago	5	`write_ilang ilang.ilang`
Add tests for "II architecture" and "III backends"; fix testbench for simple/memory; f7c7f7c7 SergeyDegtyar committed 6 years ago	6	`dump -n -o file1.il`
Fix failed tests 5fee7bf3 SergeyDegtyar committed 5 years ago	7	`synth`
Add new tests to backends and architecture; 10f53cb1 SergeyDegtyar committed 5 years ago	8	`write_verilog synth.v`