Skip to content

S
sv2v
Commit ff0c7b02 by Zachary Snow
Options

properly distinguish nets and variables internally 

- new net decl to replace net pseudo-type
- support nets with complex base types, including typenames
- support var declaration type prefix for all data types
- support var as lone type shorthand
- refactor AST representation of strengths
- traversal helpers for treating nets as variables
- use decl traversals where appropriate
parent d32c0a1b
Showing with 249 additions and 125 deletions
src/Convert/Cast.hs
......@@ -61,6 +61,12 @@ traverseDeclM decl = do
else do
insertElem x Nil
return $ Variable d t x a e'
Net d n s t x a e -> do
enterStmt
e' <- traverseExprM e
exitStmt
insertElem x Nil
return $ Net d n s t x a e'
Param _ _ x _ ->
insertElem x Nil >> return decl
ParamType _ _ _ -> return decl
......
src/Convert/DimensionQuery.hs
......@@ -113,7 +113,6 @@ convertBits (Left t) =
case elaborateType t of
IntegerVector _ _ rs -> dimensionsSize rs
Implicit _ rs -> dimensionsSize rs
Net _ _ rs -> dimensionsSize rs
Struct _ fields rs ->
BinOp Mul
(dimensionsSize rs)
......
src/Convert/ImplicitNet.hs
......@@ -40,6 +40,7 @@ traverseDeclM :: Decl -> Scoper () Decl
traverseDeclM decl = do
case decl of
Variable _ _ x _ _ -> insertElem x ()
Net _ _ _ _ x _ _ -> insertElem x ()
Param _ _ x _ -> insertElem x ()
ParamType{} -> return ()
CommentDecl{} -> return ()
......@@ -81,15 +82,14 @@ needsIdent defaultNetType x = do
when (details == Nothing) $ do
insertElem x ()
injectItem decl
where
t = impliedNetType x defaultNetType Unspecified []
decl = MIPackageItem $ Decl $ Variable Local t x [] Nil
where decl = MIPackageItem $ Decl $ impliedNet x defaultNetType
impliedNetType :: String -> DefaultNetType -> Signing -> [Range] -> Type
impliedNetType var Nothing =
impliedNet :: Identifier -> DefaultNetType -> Decl
impliedNet var Nothing =
error $ "implicit declaration of " ++
show var ++ " but default_nettype is none"
impliedNetType _ (Just netType) = Net (NetType netType)
impliedNet var (Just netType) =
Net Local netType DefaultStrength UnknownType var [] Nil
parseDefaultNetType :: String -> DefaultNetType
parseDefaultNetType "tri" = Just TTri
......
src/Convert/Interface.hs
......@@ -74,6 +74,7 @@ convertDescription parts (Part attrs extern Module lifetime name ports items) =
traverseDeclM decl = do
case decl of
Variable _ _ x _ _ -> insertElem x DeclVal
Net _ _ _ _ x _ _ -> insertElem x DeclVal
Param _ _ x _ -> insertElem x DeclVal
ParamType _ x _ -> insertElem x DeclVal
CommentDecl{} -> return ()
......@@ -324,10 +325,13 @@ convertDescription _ other = other
-- produce the implicit modport decls for an interface bundle
impliedModport :: [ModuleItem] -> [ModportDecl]
impliedModport =
execWriter . mapM (collectNestedModuleItemsM collectModportDecls)
execWriter . mapM
(collectNestedModuleItemsM $ collectDeclsM collectModportDecls)
where
collectModportDecls :: ModuleItem -> Writer [ModportDecl] ()
collectModportDecls (MIPackageItem (Decl (Variable _ _ x _ _))) =
collectModportDecls :: Decl -> Writer [ModportDecl] ()
collectModportDecls (Variable _ _ x _ _) =
tell [(Inout, x, Ident x)]
collectModportDecls (Net _ _ _ _ x _ _) =
tell [(Inout, x, Ident x)]
collectModportDecls _ = return ()
......@@ -384,15 +388,17 @@ inlineInstance global ranges modportBindings items partName
rewriteItem :: ModuleItem -> ModuleItem
rewriteItem =
traverseDecls $
removeModportInstance .
removeDeclDir .
traverseDecls overrideParam
overrideParam
traverseDeclM :: Decl -> Scoper Expr Decl
traverseDeclM decl = do
decl' <- traverseDeclExprsM substituteExprM decl
case decl' of
Variable _ _ x _ _ -> insertElem x Nil
Net _ _ _ _ x _ _ -> insertElem x Nil
Param _ _ x e -> insertElem x e
ParamType _ x _ -> insertElem x Nil
CommentDecl{} -> return ()
......@@ -507,9 +513,8 @@ inlineInstance global ranges modportBindings items partName
++ "\" resolvable when it wasn't previously"
_ -> id
removeModportInstance :: ModuleItem -> ModuleItem
removeModportInstance (MIPackageItem (Decl (Variable d t x a e))) =
MIPackageItem $ Decl $
removeModportInstance :: Decl -> Decl
removeModportInstance (Variable d t x a e) =
if maybeModportBinding == Nothing then
Variable d t x a e
else if makeBindingBaseExpr modportE == Nothing then
......@@ -525,16 +530,17 @@ inlineInstance global ranges modportBindings items partName
bindingBaseExpr = Ident $ bindingBaseName ++ x
modportDims = a ++ snd (typeRanges t)
[modportDim] = modportDims
removeModportInstance other = other
removeDeclDir :: ModuleItem -> ModuleItem
removeDeclDir (MIPackageItem (Decl (Variable _ t x a e))) =
MIPackageItem $ Decl $ Variable Local t' x a e
removeDeclDir :: Decl -> Decl
removeDeclDir (Variable _ t x a e) =
Variable Local t' x a e
where t' = case t of
Implicit Unspecified rs ->
IntegerVector TLogic Unspecified rs
_ -> t
removeDeclDir decl @ Net{} =
traverseNetAsVar removeDeclDir decl
removeDeclDir other = other
-- capture the lower bound for each modport array binding
......@@ -599,6 +605,8 @@ inlineInstance global ranges modportBindings items partName
collectDeclDir (Variable dir _ ident _ _) =
when (dir /= Local) $
tell $ Map.singleton ident dir
collectDeclDir net @ Net{} =
collectNetAsVarM collectDeclDir net
collectDeclDir _ = return ()
findDeclDir :: Identifier -> Direction
findDeclDir ident =
......
src/Convert/Logic.hs
......@@ -63,6 +63,8 @@ convert =
(_, InterfaceT{}) -> tell [(ident, Local)]
(Local, _) -> return ()
_ -> tell [(ident, dir)]
collectDeclDirsM (MIPackageItem (Decl net @ Net{})) =
collectNetAsVarM (collectDeclDirsM . MIPackageItem . Decl) net
collectDeclDirsM _ = return ()
convertDescription :: Ports -> Description -> Description
......@@ -112,13 +114,14 @@ traverseModuleItem ports scopes =
then Assign AssignOptionNone lhs expr
else
Generate $ map GenModuleItem
[ MIPackageItem (Decl (Variable Local t x [] Nil))
[ MIPackageItem $ Decl decl
, Assign AssignOptionNone (LHSIdent x) expr
, always_comb $ Asgn AsgnOpEq Nothing lhs (Ident x)
]
where
t = Net (NetType TWire) Unspecified
[(DimsFn FnBits $ Right $ lhsToExpr lhs, RawNum 1)]
decl = Net Local TWire DefaultStrength t x [] Nil
t = Implicit Unspecified [r]
r = (DimsFn FnBits $ Right $ lhsToExpr lhs, RawNum 1)
x = "sv2v_tmp_" ++ shortHash (lhs, expr)
-- rewrite port bindings to use temporary nets where necessary
fixModuleItem (Instance moduleName params instanceName rs bindings) =
......@@ -143,10 +146,11 @@ traverseModuleItem ports scopes =
portDir = maybeModulePorts >>= lookup portName
tmp = "sv2v_tmp_" ++ instanceName ++ "_" ++ portName
tmpExpr = Ident tmp
t = Net (NetType TWire) Unspecified
[(DimsFn FnBits $ Right expr, RawNum 1)]
decl = Net Local TWire DefaultStrength t tmp [] Nil
t = Implicit Unspecified [r]
r = (DimsFn FnBits $ Right expr, RawNum 1)
items =
[ MIPackageItem $ Decl $ Variable Local t tmp [] Nil
[ MIPackageItem $ Decl decl
, always_comb $ Asgn AsgnOpEq Nothing lhs tmpExpr]
lhs = case exprToLHS expr of
Just l -> l
......@@ -160,26 +164,35 @@ traverseModuleItem ports scopes =
traverseDeclM :: Decl -> ST Decl
traverseDeclM (decl @ (Variable _ t x _ _)) =
insertElem x t >> return decl
traverseDeclM (decl @ (Net _ _ _ t x _ _)) =
insertElem x t >> return decl
traverseDeclM decl = return decl
rewriteDeclM :: Decl -> ST Decl
rewriteDeclM (Variable d t x a e) = do
(d', t') <- case t of
IntegerVector TLogic sg rs -> do
insertElem x t
details <- lookupElemM x
let Just (accesses, _, _) = details
let location = map accessName accesses
usedAsReg <- lift $ gets $ Set.member location
blockLogic <- withinProcedureM
if usedAsReg || blockLogic || e /= Nil
then do
let dir = if d == Inout then Output else d
return (dir, IntegerVector TReg sg rs)
else return (d, Net (NetType TWire) sg rs)
_ -> return (d, t)
insertElem x t'
return $ Variable d' t' x a e
rewriteDeclM (Variable d (t @ (IntegerVector TLogic sg rs)) x a e) = do
insertElem x t
details <- lookupElemM x
let Just (accesses, _, _) = details
let location = map accessName accesses
usedAsReg <- lift $ gets $ Set.member location
blockLogic <- withinProcedureM
if usedAsReg || blockLogic || e /= Nil
then do
let d' = if d == Inout then Output else d
let t' = IntegerVector TReg sg rs
insertElem x t'
return $ Variable d' t' x a e
else do
let t' = Implicit sg rs
insertElem x t'
return $ Net d TWire DefaultStrength t' x a e
rewriteDeclM (decl @ (Variable _ t x _ _)) =
insertElem x t >> return decl
rewriteDeclM (Net d n s (IntegerVector _ sg rs) x a e) =
insertElem x t >> return (Net d n s t x a e)
where t = Implicit sg rs
rewriteDeclM (decl @ (Net _ _ _ t x _ _)) =
insertElem x t >> return decl
rewriteDeclM (Param s (IntegerVector _ sg []) x e) =
return $ Param s (Implicit sg [(zero, zero)]) x e
where zero = RawNum 0
......
src/Convert/MultiplePacked.hs
......@@ -52,6 +52,8 @@ traverseDeclM :: Decl -> Scoper TypeInfo Decl
traverseDeclM (Variable dir t ident a e) = do
t' <- traverseTypeM t a ident
traverseDeclExprsM traverseExprM $ Variable dir t' ident a e
traverseDeclM net @ Net{} =
traverseNetAsVarM traverseDeclM net
traverseDeclM (Param s t ident e) = do
t' <- traverseTypeM t [] ident
traverseDeclExprsM traverseExprM $ Param s t' ident e
......
src/Convert/Package.hs
......@@ -314,6 +314,7 @@ processItems topName packageName moduleItems = do
>>= traverseDeclExprsM traverseExprM
case decl' of
Variable d t x a e -> declHelp x $ \x' -> Variable d t x' a e
Net d n s t x a e -> declHelp x $ \x' -> Net d n s t x' a e
Param p t x e -> declHelp x $ \x' -> Param p t x' e
ParamType p x t -> declHelp x $ \x' -> ParamType p x' t
CommentDecl c -> return $ CommentDecl c
......@@ -660,6 +661,7 @@ writeDeclIdents :: Decl -> IdentWriter Decl
writeDeclIdents decl = do
case decl of
Variable _ _ x _ _ -> insertElem x ()
Net _ _ _ _ x _ _ -> insertElem x ()
Param _ _ x _ -> insertElem x ()
ParamType _ x _ -> insertElem x ()
CommentDecl{} -> return ()
......@@ -744,6 +746,7 @@ piNames (Decl (ParamType _ ident (Enum _ enumItems _))) =
piNames (Function _ _ ident _ _) = [ident]
piNames (Task _ ident _ _) = [ident]
piNames (Decl (Variable _ _ ident _ _)) = [ident]
piNames (Decl (Net _ _ _ _ ident _ _)) = [ident]
piNames (Decl (Param _ _ ident _)) = [ident]
piNames (Decl (ParamType _ ident _)) = [ident]
piNames (Decl (CommentDecl _)) = []
......
src/Convert/ParamType.hs
......@@ -224,7 +224,6 @@ isSimpleType typ =
IntegerVector{} -> True
IntegerAtom {} -> True
NonInteger {} -> True
Net {} -> True
Implicit {} -> True
Struct _ fields _ -> all (isSimpleType . fst) fields
Union _ fields _ -> all (isSimpleType . fst) fields
......
src/Convert/Scoper.hs
......@@ -451,6 +451,7 @@ scopeModuleItemT declMapper moduleItemMapper genItemMapper stmtMapper =
if d == Local
then Nothing
else Just $ \i -> Variable d t (show i) a e
argIdxDecl Net{} = Nothing
argIdxDecl Param{} = Nothing
argIdxDecl ParamType{} = Nothing
argIdxDecl CommentDecl{} = Nothing
......
src/Convert/Stream.hs
......@@ -36,6 +36,7 @@ traverseDeclM (Variable d t x [] (expr @ (Stream StreamL chunk exprs))) = do
fnName = streamerFuncName x
func = streamerFunc fnName chunk (TypeOf $ Concat exprs) t
expr' = Call (Ident fnName) (Args [Concat exprs] [])
traverseDeclM decl @ Net{} = traverseNetAsVarM traverseDeclM decl
traverseDeclM decl = return decl
traverseModuleItemM :: ModuleItem -> Scoper () ModuleItem
......
src/Convert/Struct.hs
......@@ -105,6 +105,8 @@ convertType t1 =
-- write down the types of declarations
traverseDeclM :: Decl -> Scoper Type Decl
traverseDeclM decl @ Net{} =
traverseNetAsVarM traverseDeclM decl
traverseDeclM decl = do
decl' <- case decl of
Variable d t x a e -> do
......@@ -119,8 +121,7 @@ traverseDeclM decl = do
let e' = convertExpr t e
let t' = convertType t
return $ Param s t' x e'
ParamType{} -> return decl
CommentDecl{} -> return decl
_ -> return decl
traverseDeclExprsM traverseExprM decl'
where
isRangeable :: Type -> Bool
......
src/Convert/TFBlock.hs
......@@ -66,6 +66,7 @@ declNames = filter (not . null) . map declName
declName :: Decl -> Identifier
declName (Variable _ _ x _ _) = x
declName (Net _ _ _ _ x _ _) = x
declName (Param _ _ x _) = x
declName (ParamType _ x _) = x
declName CommentDecl{} = ""
......
src/Convert/Traverse.hs
......@@ -101,6 +101,9 @@ module Convert.Traverse
, traverseSinglyNestedStmtsM
, traverseSinglyNestedStmts
, collectSinglyNestedStmtsM
, traverseNetAsVarM
, traverseNetAsVar
, collectNetAsVarM
) where
import Data.Functor.Identity (Identity, runIdentity)
......@@ -576,7 +579,7 @@ traverseNodesM exprMapper declMapper typeMapper lhsMapper stmtMapper =
moduleItemMapper (Assign opt lhs expr) = do
opt' <- case opt of
AssignOptionNone -> return $ AssignOptionNone
AssignOptionDrive ds -> return $ AssignOptionDrive ds
AssignOptionDrive s0 s1 -> return $ AssignOptionDrive s0 s1
AssignOptionDelay delay ->
exprMapper delay >>= return . AssignOptionDelay
lhs' <- lhsMapper lhs
......@@ -814,7 +817,6 @@ traverseSinglyNestedTypesM mapper = tm
vals' <- mapM typeOrExprMapper $ map snd pm
let pm' = zip (map fst pm) vals'
return $ CSAlias ps pm' xx rs
tm (Net kw sg rs) = return $ Net kw sg rs
tm (Implicit sg rs) = return $ Implicit sg rs
tm (IntegerVector kw sg rs) = return $ IntegerVector kw sg rs
tm (IntegerAtom kw sg ) = return $ IntegerAtom kw sg
......@@ -946,6 +948,11 @@ traverseDeclExprsM exprMapper =
a' <- mapM (mapBothM exprMapper) a
e' <- exprMapper e
return $ Variable d t' x a' e'
declMapper (Net d n s t x a e) = do
t' <- typeMapper t
a' <- mapM (mapBothM exprMapper) a
e' <- exprMapper e
return $ Net d n s t' x a' e'
declMapper (CommentDecl c) =
return $ CommentDecl c
......@@ -961,6 +968,8 @@ traverseDeclTypesM mapper (ParamType s x t) =
mapper t >>= \t' -> return $ ParamType s x t'
traverseDeclTypesM mapper (Variable d t x a e) =
mapper t >>= \t' -> return $ Variable d t' x a e
traverseDeclTypesM mapper (Net d n s t x a e) =
mapper t >>= \t' -> return $ Net d n s t' x a e
traverseDeclTypesM _ (CommentDecl c) = return $ CommentDecl c
traverseDeclTypes :: Mapper Type -> Mapper Decl
......@@ -1128,3 +1137,17 @@ traverseFiles
traverseFiles fileCollectorM fileMapper files =
runIdentity (traverseFilesM fileCollectorM fileMapperM files)
where fileMapperM = (\w -> return . fileMapper w)
traverseNetAsVarM :: Monad m => MapperM m Decl -> MapperM m Decl
traverseNetAsVarM func net = do
let Net d n s t x a e = net
let var = Variable d t x a e
var' <- func var
let Variable d' t' x' a' e' = var'
let net' = Net d' n s t' x' a' e'
return net'
traverseNetAsVar :: Mapper Decl -> Mapper Decl
traverseNetAsVar = unmonad traverseNetAsVarM
collectNetAsVarM :: Monad m => CollectorM m Decl -> CollectorM m Decl
collectNetAsVarM = collectify traverseNetAsVarM
src/Convert/TypeOf.hs
......@@ -41,6 +41,8 @@ type ST = Scoper Type
-- insert the given declaration into the scope, and convert an TypeOfs within
traverseDeclM :: Decl -> ST Decl
traverseDeclM decl @ Net{} =
traverseNetAsVarM traverseDeclM decl
traverseDeclM decl = do
decl' <- traverseDeclExprsM traverseExprM decl
>>= traverseDeclTypesM traverseTypeM
......@@ -65,8 +67,7 @@ traverseDeclM decl = do
where t' = IntegerVector TLogic sg rs
Param _ t ident _ ->
insertType ident t >> return decl'
ParamType{} -> return decl'
CommentDecl{} -> return decl'
_ -> return decl'
-- rewrite and store a non-genvar data declaration's type information
insertType :: Identifier -> Type -> ST ()
......@@ -155,13 +156,8 @@ lookupTypeOf expr = do
then IntegerAtom TInteger Unspecified
else TypeOf expr
_ -> return $ TypeOf expr
Just (_, replacements, typ) -> do
let typ' = toVarType typ
return $ replaceInType replacements typ'
where
toVarType :: Type -> Type
toVarType (Net _ sg rs) = IntegerVector TLogic sg rs
toVarType other = other
Just (_, replacements, typ) ->
return $ replaceInType replacements typ
-- determines the type of an expression based on the available scope information
-- according the semantics defined in IEEE 1800-2017, especially Section 11.6
......@@ -248,7 +244,6 @@ typeSignednessOverride fallback sg t =
case t of
IntegerVector base _ rs -> IntegerVector base sg rs
IntegerAtom base _ -> IntegerAtom base sg
Net base _ rs -> Net base sg rs
_ -> fallback
-- type of a unary operator expression
......@@ -319,7 +314,6 @@ binopSignedness Signed Signed = Signed
-- returns the signedness of the given type, if possible
typeSignedness :: Type -> Signing
typeSignedness (Net _ sg _) = signednessFallback Unsigned sg
typeSignedness (IntegerVector _ sg _) = signednessFallback Unsigned sg
typeSignedness (IntegerAtom t sg ) = signednessFallback fallback sg
where fallback = if t == TTime then Unsigned else Signed
......@@ -389,7 +383,6 @@ typeCastUnneeded t1 t2 =
sz1 = typeSize t1
sz2 = typeSize t2
typeSize :: Type -> Maybe Expr
typeSize (Net _ _ rs) = Just $ dimensionsSize rs
typeSize (IntegerVector _ _ rs) = Just $ dimensionsSize rs
typeSize (t @ IntegerAtom{}) =
typeSize $ tf [(RawNum 1, RawNum 1)]
......
src/Convert/Typedef.hs
......@@ -76,6 +76,7 @@ traverseDeclM decl = do
>>= traverseDeclTypesM traverseTypeM
case decl' of
Variable{} -> return decl'
Net{} -> return decl'
Param _ _ x _ ->
insertElem x UnknownType >> return decl'
ParamType Localparam x t -> do
......
src/Convert/UnbasedUnsized.hs
......@@ -105,6 +105,9 @@ determinePortSize portName instanceParams moduleItems =
then substituteExpr (reverse mapping) size
else step mapping rest
where size = BinOp Mul (dimensionsSize a) (DimsFn FnBits $ Left t)
step mapping (MIPackageItem (Decl (Net d _ _ t x a e)) : rest) =
step mapping $ item : rest
where item = MIPackageItem $ Decl $ Variable d t x a e
step mapping (_ : rest) = step mapping rest
step _ [] = error $ "could not find size of port " ++ portName
......
src/Convert/UnnamedGenBlock.hs
......@@ -48,6 +48,7 @@ traverseDeclM :: Decl -> S Decl
traverseDeclM decl =
case decl of
Variable _ _ x _ _ -> declaration x decl
Net _ _ _ _ x _ _ -> declaration x decl
Param _ _ x _ -> declaration x decl
ParamType _ x _ -> declaration x decl
CommentDecl{} -> return decl
......
src/Convert/UnpackedArray.hs
......@@ -44,6 +44,8 @@ traverseDeclM ports (decl @ (Variable _ _ x _ e)) = do
then flatUsageM x
else return ()
return decl
traverseDeclM ports decl @ Net{} =
traverseNetAsVarM (traverseDeclM ports) decl
traverseDeclM _ other = return other
-- pack decls marked for packing
......@@ -62,6 +64,7 @@ rewriteDeclM (decl @ (Variable d t x a e)) = do
let t' = tf $ shifted ++ rs
return $ Variable d t' x rest e
Nothing -> return decl
rewriteDeclM decl @ Net{} = traverseNetAsVarM rewriteDeclM decl
rewriteDeclM other = return other
traverseModuleItemM :: ModuleItem -> ST ModuleItem
......
src/Convert/Unsigned.hs
......@@ -23,7 +23,6 @@ convert =
convertType :: Type -> Type
convertType (Implicit Unsigned rs) = Implicit Unspecified rs
convertType (IntegerVector t Unsigned rs) = IntegerVector t Unspecified rs
convertType (Net t Unsigned rs) = Net t Unspecified rs
convertType (IntegerAtom TInteger Unsigned) =
IntegerVector TReg Unspecified [(RawNum 31, RawNum 0)]
convertType other = other
src/Language/SystemVerilog/AST/Decl.hs
......@@ -16,14 +16,15 @@ module Language.SystemVerilog.AST.Decl
import Data.List (intercalate)
import Text.Printf (printf)
import Language.SystemVerilog.AST.ShowHelp (showPad, unlines')
import Language.SystemVerilog.AST.Type (Type(TypedefRef, UnpackedType), Identifier, pattern UnknownType)
import Language.SystemVerilog.AST.ShowHelp (showPad, showPadBefore, unlines')
import Language.SystemVerilog.AST.Type (Type(TypedefRef, UnpackedType), Identifier, pattern UnknownType, NetType, Strength)
import Language.SystemVerilog.AST.Expr (Expr, Range, showRanges, showAssignment)
data Decl
= Param ParamScope Type Identifier Expr
| ParamType ParamScope Identifier Type
| Variable Direction Type Identifier [Range] Expr
| Net Direction NetType Strength Type Identifier [Range] Expr
| CommentDecl String
deriving Eq
......@@ -37,6 +38,7 @@ instance Show Decl where
show (ParamType s x t) = printf "%s type %s%s;" (show s) x tStr
where tStr = if t == UnknownType then "" else " = " ++ show t
show (Variable d t x a e) = printf "%s%s%s%s%s;" (showPad d) (showPad t) x (showRanges a) (showAssignment e)
show (Net d n s t x a e) = printf "%s%s%s %s%s%s%s;" (showPad d) (show n) (showPadBefore s) (showPad t) x (showRanges a) (showAssignment e)
show (CommentDecl c) =
if elem '\n' c
then "// " ++ show c
......
src/Language/SystemVerilog/AST/ModuleItem.hs
......@@ -28,7 +28,7 @@ import Language.SystemVerilog.AST.Expr (Expr(Nil), pattern Ident, Range, showRan
import Language.SystemVerilog.AST.GenItem (GenItem)
import Language.SystemVerilog.AST.LHS (LHS)
import Language.SystemVerilog.AST.Stmt (Stmt, AssertionItem, Timing(Delay))
import Language.SystemVerilog.AST.Type (Identifier, DriveStrength)
import Language.SystemVerilog.AST.Type (Identifier, Strength0, Strength1)
data ModuleItem
= MIAttr Attr ModuleItem
......@@ -140,11 +140,11 @@ instance Show NOutputGateKW where
data AssignOption
= AssignOptionNone
| AssignOptionDelay Expr
| AssignOptionDrive DriveStrength
| AssignOptionDelay Expr
| AssignOptionDrive Strength0 Strength1
deriving Eq
instance Show AssignOption where
show AssignOptionNone = ""
show (AssignOptionDelay de) = printf "#(%s)" (show de)
show (AssignOptionDrive ds) = show ds
show (AssignOptionDrive s0 s1) = printf "(%s, %s)" (show s0) (show s1)
src/Language/SystemVerilog/AST/Type.hs
......@@ -17,8 +17,7 @@ module Language.SystemVerilog.AST.Type
, IntegerVectorType (..)
, IntegerAtomType (..)
, NonIntegerType (..)
, NetTypeAndStrength (..)
, DriveStrength (..)
, Strength (..)
, Strength0 (..)
, Strength1 (..)
, ChargeStrength (..)
......@@ -41,7 +40,6 @@ data Type
= IntegerVector IntegerVectorType Signing [Range]
| IntegerAtom IntegerAtomType Signing
| NonInteger NonIntegerType
| Net NetTypeAndStrength Signing [Range]
| Implicit Signing [Range]
| Alias Identifier [Range]
| PSAlias Identifier Identifier [Range]
......@@ -59,7 +57,6 @@ instance Show Type where
show (Alias xx rs) = printf "%s%s" xx (showRanges rs)
show (PSAlias ps xx rs) = printf "%s::%s%s" ps xx (showRanges rs)
show (CSAlias ps pm xx rs) = printf "%s#%s::%s%s" ps (showParams pm) xx (showRanges rs)
show (Net kw sg rs) = printf "%s%s%s" (show kw) (showPadBefore sg) (showRanges rs)
show (Implicit sg rs) = printf "%s%s" (showPad sg) (dropWhile (== ' ') $ showRanges rs)
show (IntegerVector kw sg rs) = printf "%s%s%s" (show kw) (showPadBefore sg) (showRanges rs)
show (IntegerAtom kw sg ) = printf "%s%s" (show kw) (showPadBefore sg)
......@@ -101,7 +98,6 @@ instance Eq (Signing -> [Range] -> Type) where
typeRanges :: Type -> ([Range] -> Type, [Range])
typeRanges typ =
case typ of
Net kw sg rs -> (Net kw sg, rs)
Implicit sg rs -> (Implicit sg, rs)
IntegerVector kw sg rs -> (IntegerVector kw sg, rs)
Enum t v rs -> (Enum t v, rs)
......@@ -237,22 +233,15 @@ instance Show Packing where
show (Unpacked) = ""
show (Packed s) = "packed" ++ (showPadBefore s)
data NetTypeAndStrength
= NetType NetType
| NetTypeDrive NetType DriveStrength
| NetTypeCharge NetType ChargeStrength
data Strength
= DefaultStrength
| DriveStrength Strength0 Strength1
| ChargeStrength ChargeStrength
deriving (Eq, Ord)
instance Show NetTypeAndStrength where
show (NetType nt ) = show nt
show (NetTypeDrive nt ds) = printf "%s %s" (show nt) (show ds)
show (NetTypeCharge nt cs) = printf "%s %s" (show nt) (show cs)
data DriveStrength
= DriveStrength Strength0 Strength1
deriving (Eq, Ord)
instance Show DriveStrength where
instance Show Strength where
show DefaultStrength = ""
show (ChargeStrength cs) = printf "(%s)" (show cs)
show (DriveStrength s0 s1) = printf "(%s, %s)" (show s0) (show s1)
data Strength0
......@@ -292,6 +281,6 @@ data ChargeStrength
deriving (Eq, Ord)
instance Show ChargeStrength where
show Small = "(small)"
show Medium = "(medium)"
show Large = "(large)"
show Small = "small"
show Medium = "medium"
show Large = "large"
src/Language/SystemVerilog/Parser/Parse.y
......@@ -399,6 +399,8 @@ time { Token Lit_time _ _ }
-- operator precedences, from *lowest* to *highest*
%nonassoc DefaultStrength
%nonassoc DriveStrength ChargeStrength
%nonassoc Asgn
%nonassoc NoElse
%nonassoc "else"
......@@ -456,16 +458,11 @@ TypeAlias :: { Type }
: Identifier Dimensions { Alias $1 $2 }
| Identifier "::" Identifier Dimensions { PSAlias $1 $3 $4 }
| Identifier ParamBindings "::" Identifier Dimensions { CSAlias $1 $2 $4 $5 }
PartialTypeAlias :: { Signing -> [Range] -> Type }
: Identifier { \Unspecified -> Alias $1 }
| Identifier "::" Identifier { \Unspecified -> PSAlias $1 $3 }
| Identifier ParamBindings "::" Identifier { \Unspecified -> CSAlias $1 $2 $4 }
TypeNonIdent :: { Type }
: PartialType OptSigning Dimensions { $1 $2 $3 }
| "type" "(" Expr ")" { TypeOf $3 }
PartialType :: { Signing -> [Range] -> Type }
: NetTypeAndStrength { Net $1 }
| IntegerVectorType { IntegerVector $1 }
: IntegerVectorType { IntegerVector $1 }
| IntegerAtomType { \sg -> \[] -> IntegerAtom $1 sg }
| NonIntegerType { \Unspecified -> \[] -> NonInteger $1 }
| "enum" EnumBaseType "{" EnumItems "}" { \Unspecified -> Enum $2 $4 }
......@@ -480,11 +477,6 @@ EnumBaseType :: { Type }
: Type { $1 }
| Dimensions { Implicit Unspecified $1 }
NetTypeAndStrength :: { NetTypeAndStrength }
: NetType %prec "+" { NetType $1 }
| NetType DriveStrength %prec "*" { NetTypeDrive $1 $2 }
| NetType ChargeStrength %prec "*" { NetTypeCharge $1 $2 }
Signing :: { Signing }
: "signed" { Signed }
| "unsigned" { Unsigned }
......@@ -623,6 +615,11 @@ Identifiers :: { [Identifier] }
: Identifier { [$1] }
| Identifiers "," Identifier { $1 ++ [$3] }
Strength :: { Strength }
: {- empty -} %prec DefaultStrength { DefaultStrength }
| DriveStrength %prec DriveStrength { uncurry DriveStrength $1 }
| ChargeStrength %prec ChargeStrength { ChargeStrength $1 }
-- uses delimiter propagation hack to avoid conflicts
DeclTokens(delim) :: { [DeclToken] }
: DeclTokensBase(DeclTokens(delim), delim) { $1 }
......@@ -635,21 +632,22 @@ DeclTokensBase(repeat, delim) :: { [DeclToken] }
DeclToken :: { DeclToken }
: "," {% posInject \p -> DTComma p }
| "[" "]" {% posInject \p -> DTAutoDim p }
| "const" {% posInject \p -> DTConst p }
| "var" {% posInject \p -> DTVar p }
| PartSelect {% posInject \p -> DTRange p $1 }
| Identifier {% posInject \p -> DTIdent p $1 }
| Direction {% posInject \p -> DTDir p $1 }
| "[" Expr "]" {% posInject \p -> DTBit p $2 }
| LHSConcat {% posInject \p -> DTConcat p $1 }
| PartialType {% posInject \p -> DTType p $1 }
| NetType Strength {% posInject \p -> DTNet p $1 $2 }
| "." Identifier {% posInject \p -> DTDot p $2 }
| PortBindings {% posInject \p -> DTInstance p $1 }
| Signing {% posInject \p -> DTSigning p $1 }
| "automatic" {% posInject \p -> DTLifetime p Automatic }
| "const" PartialType {% posInject \p -> DTType p $2 }
| "const" PartialTypeAlias {% posInject \p -> DTType p $2 }
| "{" StreamOp StreamSize Concat "}" {% posInject \p -> DTStream p $2 $3 (map toLHS $4) }
| "{" StreamOp Concat "}" {% posInject \p -> DTStream p $2 (RawNum 1) (map toLHS $3) }
| opt("var") "type" "(" Expr ")" {% posInject \p -> DTType p (\Unspecified -> \[] -> TypeOf $4) }
| "type" "(" Expr ")" {% posInject \p -> DTType p (\Unspecified -> \[] -> TypeOf $3) }
| IncOrDecOperator {% posInject \p -> DTAsgn p (AsgnOp $1) Nothing (RawNum 1) }
| "<=" opt(DelayOrEvent) Expr %prec Asgn {% posInject \p -> DTAsgn p AsgnOpNonBlocking $2 $3 }
| Identifier "::" Identifier {% posInject \p -> DTPSIdent p $1 $3 }
......@@ -711,7 +709,7 @@ NonGenerateModuleItem :: { [ModuleItem] }
AssignOption :: { AssignOption }
: {- empty -} { AssignOptionNone }
| DelayControl { AssignOptionDelay $1 }
| DriveStrength { AssignOptionDrive $1 }
| DriveStrength { uncurry AssignOptionDrive $1 }
-- for ModuleItem, for now
AssertionItem :: { AssertionItem }
......@@ -816,13 +814,13 @@ NOutputGateKW :: { NOutputGateKW }
: "buf" { GateBuf }
| "not" { GateNot }
DriveStrength :: { DriveStrength }
: "(" Strength0 "," Strength1 ")" { DriveStrength $2 $4 }
| "(" Strength1 "," Strength0 ")" { DriveStrength $4 $2 }
| "(" Strength0 "," "highz1" ")" { DriveStrength $2 Highz1 }
| "(" Strength1 "," "highz0" ")" { DriveStrength Highz0 $2 }
| "(" "highz0" "," Strength1 ")" { DriveStrength Highz0 $4 }
| "(" "highz1" "," Strength0 ")" { DriveStrength $4 Highz1 }
DriveStrength :: { (Strength0, Strength1) }
: "(" Strength0 "," Strength1 ")" { ($2 , $4 ) }
| "(" Strength1 "," Strength0 ")" { ($4 , $2 ) }
| "(" Strength0 "," "highz1" ")" { ($2 , Highz1) }
| "(" Strength1 "," "highz0" ")" { (Highz0, $2 ) }
| "(" "highz0" "," Strength1 ")" { (Highz0, $4 ) }
| "(" "highz1" "," Strength0 ")" { ($4 , Highz1) }
Strength0 :: { Strength0 }
: "supply0" { Supply0 }
| "strong0" { Strong0 }
......
src/Language/SystemVerilog/Parser/ParseDecl.hs
......@@ -54,6 +54,8 @@ import Language.SystemVerilog.Parser.Tokens (Position(..))
data DeclToken
= DTComma Position
| DTAutoDim Position
| DTConst Position
| DTVar Position
| DTAsgn Position AsgnOp (Maybe Timing) Expr
| DTRange Position (PartSelectMode, Range)
| DTIdent Position Identifier
......@@ -61,6 +63,7 @@ data DeclToken
| DTCSIdent Position Identifier [ParamBinding] Identifier
| DTDir Position Direction
| DTType Position (Signing -> [Range] -> Type)
| DTNet Position NetType Strength
| DTParams Position [ParamBinding]
| DTInstance Position [PortBinding]
| DTBit Position Expr
......@@ -130,6 +133,11 @@ parseDTsAsPortDecls' pieces =
where
decl = Variable dir t x a e
dir = if currDir == Local then lastDir else currDir
propagateDirections lastDir (Net currDir n s t x a e : decls) =
decl : propagateDirections dir decls
where
decl = Net dir n s t x a e
dir = if currDir == Local then lastDir else currDir
propagateDirections dir (decl : decls) =
decl : propagateDirections dir decls
propagateDirections _ [] = []
......@@ -138,6 +146,7 @@ parseDTsAsPortDecls' pieces =
portNames = filter (not . null) . map portName
portName :: Decl -> Identifier
portName (Variable _ _ ident _ _) = ident
portName (Net _ _ _ _ ident _ _) = ident
portName CommentDecl{} = ""
portName decl =
error $ "unexpected non-variable port declaration: " ++ (show decl)
......@@ -271,11 +280,12 @@ parseDTsAsDeclOrStmt tokens =
lhs = case takeLHS lhsToks of
Nothing -> error $ "could not parse as LHS: " ++ show lhsToks
Just l -> l
hasLeadingDecl = tokens /= l4 && tripLookahead l4
hasLeadingDecl = tokens /= l5 && tripLookahead l5
(_, l1) = takeDir tokens
(_, l2) = takeLifetime l1
(_, l3) = takeType l2
(_, l4) = takeRanges l3
(_, l3) = takeVarOrNet l2
(_, l4) = takeType l3
(_, l5) = takeRanges l4
traceStmt :: Position -> Stmt
traceStmt pos = CommentStmt $ "Trace: " ++ show pos
......@@ -366,12 +376,13 @@ takeLHSStep _ _ = Nothing
-- batches together separate declaration lists
type DeclBase = Direction -> Identifier -> [Range] -> Expr -> Decl
type Triplet = (Identifier, [Range], Expr)
type Component = (Direction, Type, [Triplet])
type Component = (Direction, DeclBase, [Triplet])
finalize :: (Position, Component) -> [Decl]
finalize (pos, (dir, typ, trips)) =
finalize (pos, (dir, base, trips)) =
CommentDecl ("Trace: " ++ show pos) :
map (\(x, a, e) -> Variable dir typ x a e) trips
map (\(x, a, e) -> base dir x a e) trips
-- internal; entrypoint of the critical portion of our parser
......@@ -387,18 +398,19 @@ parseDTsAsComponent [] = error "parseDTsAsComponent unexpected end of tokens"
parseDTsAsComponent l0 =
if l /= Nothing && l /= Just Automatic then
error $ "unexpected non-automatic lifetime: " ++ show l0
else if dir == Local && tf rs == Implicit Unspecified [] then
else if dir == Local && length l2 == length l5 then
error $ "declaration(s) missing type information: "
++ show (position, tps)
else
(position, component, l5)
(position, component, l6)
where
(dir, l1) = takeDir l0
(l , l2) = takeLifetime l1
(tf , l3) = takeType l2
(rs , l4) = takeRanges l3
(tps, l5) = takeTrips l4 True
component = (dir, tf rs, tps)
(von, l3) = takeVarOrNet l2
(tf , l4) = takeType l3
(rs , l5) = takeRanges l4
(tps, l6) = takeTrips l5 True
component = (dir, von $ tf rs, tps)
position = tokPos $ head l0
takeTrips :: [DeclToken] -> Bool -> ([Triplet], [DeclToken])
......@@ -449,6 +461,13 @@ takeLifetime :: [DeclToken] -> (Maybe Lifetime, [DeclToken])
takeLifetime (DTLifetime _ l : rest) = (Just l, rest)
takeLifetime rest = (Nothing, rest)
takeVarOrNet :: [DeclToken] -> (Type -> DeclBase, [DeclToken])
takeVarOrNet (DTConst _ : DTConst pos : _) =
error $ "unexpected const after const at " ++ show pos
takeVarOrNet (DTConst _ : tokens) = takeVarOrNet tokens
takeVarOrNet (DTNet _ n s : tokens) = (\t d -> Net d n s t, tokens)
takeVarOrNet tokens = (flip Variable, tokens)
takeType :: [DeclToken] -> ([Range] -> Type, [DeclToken])
takeType (DTIdent _ a : DTDot _ b : rest) = (InterfaceT a b , rest)
takeType (DTType _ tf : DTSigning _ sg : rest) = (tf sg , rest)
......@@ -469,6 +488,13 @@ takeType (DTIdent pos tn : rest) =
(_, Nothing) -> True
-- if comma is first, then this ident is a declaration
(Just a, Just b) -> a < b
takeType (DTVar _ : DTVar pos : _) =
error $ "unexpected var after var at " ++ show pos
takeType (DTVar _ : rest) =
case tf [] of
Implicit sg [] -> (IntegerVector TLogic sg, rest')
_ -> (tf, rest')
where (tf, rest') = takeType rest
takeType rest = (Implicit Unspecified, rest)
takeRanges :: [DeclToken] -> ([Range], [DeclToken])
......@@ -526,6 +552,8 @@ isComma _ = False
tokPos :: DeclToken -> Position
tokPos (DTComma p) = p
tokPos (DTAutoDim p) = p
tokPos (DTConst p) = p
tokPos (DTVar p) = p
tokPos (DTAsgn p _ _ _) = p
tokPos (DTRange p _) = p
tokPos (DTIdent p _) = p
......@@ -533,6 +561,7 @@ tokPos (DTPSIdent p _ _) = p
tokPos (DTCSIdent p _ _ _) = p
tokPos (DTDir p _) = p
tokPos (DTType p _) = p
tokPos (DTNet p _ _) = p
tokPos (DTParams p _) = p
tokPos (DTInstance p _) = p
tokPos (DTBit p _) = p
......
test/core/net_or_var.sv 0 → 100644
`include "net_or_var.vh"
module top;
typedef struct packed {
logic [3:0] a;
logic [2:0] b;
} t;
`TEST_ALL(logic, logic)
`TEST_ALL(wire, wire)
`TEST_ALL(wire logic, wire_logic)
`TEST_ALL(wand, wand)
`TEST_ALL(wand logic, wand_logic)
`TEST_ALL(var, var)
`TEST_ALL(var logic, var_logic)
`TEST_ALL(reg, reg)
`TEST_ALL(var reg, var_reg)
`TEST_BASE(t, t)
`TEST_BASE(wire t, wire_t)
`TEST_BASE(wand t, wand_t)
`TEST_BASE(var t, var_t)
endmodule
test/core/net_or_var.v 0 → 100644
`include "net_or_var.vh"
module top;
`TEST_ALL(reg, logic)
`TEST_ALL(wire, wire)
`TEST_ALL(wire logic, wire_logic)
`TEST_ALL(wand, wand)
`TEST_ALL(wand logic, wand_logic)
`TEST_ALL(reg, var)
`TEST_ALL(reg, var_logic)
`TEST_ALL(reg, reg)
`TEST_ALL(reg, var_reg)
`TEST_BASE(reg [6:0], t)
`TEST_BASE(wire [6:0], wire_t)
`TEST_BASE(wand [6:0], wand_t)
`TEST_BASE(reg [6:0], var_t)
endmodule
test/core/net_or_var.vh 0 → 100644
`define TEST_BASE(keywords, identifier) \
keywords a_``identifier = 1'sb1; \
keywords [1:0] a_ranged_``identifier = 1'sb1;
`define TEST_ALL(keywords, identifier) \
`TEST_BASE(keywords, identifier) \
keywords signed a_signed_``identifier = 1'sb1; \
keywords unsigned a_unsigned_``identifier = 1'sb1; \
keywords signed [1:0] a_signed_ranged_``identifier = 1'sb1; \
keywords unsigned [1:0] a_unsigned_ranged_``identifier = 1'sb1;
test/core/port_typename.sv
typedef wire b_t;
typedef logic b_t;
module top(
input a [1:0],
input b_t b
);
initial $display("%d %d %1d %1d", a, b, $bits(a), $bits(b));
initial $display("%b %b %b %1d %1d", a[0], a[1], b, $bits(a), $bits(b));
endmodule
test/core/port_typename.v
module top(
input [1:0] a,
input wire [1:0] a,
input wire b
);
initial $display("%d %d %1d %1d", a, b, $bits(a), $bits(b));
initial $display("%b %b %b %1d %1d", a[0], a[1], b, $bits(a), $bits(b));
endmodule
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment